Controlling power factor in a switching power converter operating in discontinuous conduction mode

Information

  • Patent Grant
  • 9325236
  • Patent Number
    9,325,236
  • Date Filed
    Wednesday, November 12, 2014
    10 years ago
  • Date Issued
    Tuesday, April 26, 2016
    8 years ago
Abstract
A power system includes a controller to control a switching power converter, and the controller is configured to automatically transition operation of the switching power converter, during each cycle of an input voltage to the switching power converter, between operating in discontinuous conduction mode and critical conduction mode.
Description
BACKGROUND OF THE INVENTION

1. Field of the Invention


The present invention relates in general to the field of electronics, and more specifically to a system and method for controlling power factor in a switching power converter operating in discontinuous conduction mode.


2. Description of the Related Art


Various standards bodies establish consumer product energy efficiency standards, such as power quality. Power Factor (PF) is one measure of power quality and represents a measure of how efficiently energy is drawn from an alternating current (AC) source. For example, the Energy Start 80 Plus Platinum standard specifies that products must exceed a power factor of 0.9 from 50% to 100% of maximum power load. Power supply designers often use active power factor correction (PFC) circuits to meet the PF requirements.



FIG. 1 depicts a boost-type switching power converter, which converts an input voltage from an AC voltage source into a boosted output voltage supplied of the load. The AC input voltage passes through an optional electro-magnetic interference (EMI) filter and then a rectifier. The rectified AC voltage is the input to the boost converter which includes the input and output capacitors (respectively, Cin and Clink), the complimentary switches (Q1 and D1) and the inductor (LBoost). The output voltage of the boost converter, VLink, is a DC regulated voltage that is commonly used as the input voltage to an isolated DC-DC converter stage.


The key principle that drives the boost converter is the tendency of an inductor to resist changes in current. When being charged, the inductor LBoost accumulates energy, when being discharged the inductor LBoost transfers the accumulated energy acting like a source. The voltage produced by the inductor LBoost during the discharge phase is related to the rate of change of current and not to the original charging voltage, thus allowing different input and output voltages.


FET Q1 is driven by a pulse width modulated signal, having a frequency of FSW, applied at the gate of the FET Q1. In a charging phase, the FET Q1 is ON, resulting in an increase in the inductor current (di=v/L·dt). In the discharging phase, the FET Q1 is OFF and the only path for the inductor current is through the fly-back diode D1, the capacitor Clink and the load (DC-DC converter), which results in transferring the energy accumulated by the inductor LBoost during the charging phase into the output capacitor Clink. The input current is the same as the inductor current.



FIG. 2 depicts representative waveforms associated with two different operating modes for the boost converter depending on the inductor current shape. If the current through the inductor LBoost at the end of the discharging phase does not fall to zero, the boost converter operates in continuous mode (CCM); otherwise, the boost converter operates is discontinuous conduction mode (DCM).


The respective CCM and DCM control techniques have their advantages and disadvantages, however, for low power applications, less than 200-300 watts, DCM offers significant performances and efficiency benefits with simpler control algorithms.





BRIEF DESCRIPTION OF THE DRAWINGS

The present invention may be better understood, and its numerous objects, features and advantages made apparent to those skilled in the art by referencing the accompanying drawings. The use of the same reference number throughout the several figures designates a like or similar element.



FIG. 1 depicts a boost-type switching power converter.



FIG. 2 depicts representative waveforms associated with two different operating modes for the boost converter of FIG. 1.



FIG. 3 depicts an electronic system with a boost-type switching power converter.



FIG. 4 depicts an exemplary rectified input voltage, ON-TIME t1, and switching period TSW.



FIG. 5 depicts a switching algorithm that calculates a pulse width t1 and switching period T for the nth switching cycle of a switch of the switching power converter of FIG. 3.



FIGS. 6 and 7 depict DCM and CRM simulation results for a full load and minimum input voltage.





DETAILED DESCRIPTION

In at least one embodiment, a power system includes a controller to control a switching power converter, and the controller is configured to automatically transition operation of the switching power converter, during each cycle of an input voltage to the switching power converter, between operating in discontinuous conduction mode and critical conduction mode.



FIG. 3 depicts an electronic system 300 with a boost-type switching power converter. DCM & CRM Operation Mode:


The input filter capacitor Cin and EMI filter absorb the high-frequency component of the inductor current iL, which makes the input current Iin a low frequency signal in DCM mode given by:










I

i





n


=


i

L
,
avg


=


i

L
,

p





k







t
1

+

t
2



2






T

S





W










Equation





1








where Iin is the input current to the switching power converter 300, iL,avg is the average inductor current, iL,pk is the peak inductor current, t1 is the ON TIME of the switch Q1, t2 is the OFF TIME of the switch Q1, and TSW is the switching period of the switch Q1. The input impedance Zin in DCM mode is given by:











Z

i





n


=



V

i





n



I

i





n



=



V

i





n




L

V

i





n






2






T

S





W





t
1



(


t
1

+

t
2


)




=


2





L






T

S





W





t
1



(


t
1

+

t
2


)













where
:





i

L
,





p





k




=



V

i





n


L



t
1







Equation





2

a








where Vin is the input voltage to the switching power converter 300 and Iin is the input current to the switching power converter 300. Power factor correction requires the boost controller to maintain the input impedance constant (or slowly varying). Making t3 zero (where t3 is the time from when the inductor current iL stops flowing and when the next t1 begins), which is a special case of DCM, simplifies eq. (2a):











T

S





W


=


t
1

+

t
2










i

L
,
pk


=



V

i





n


L



t
1








hence







I

i





n


=



V

i





n



2





L




t
1










Z

i





n


=



V

i





n



I

i





n



=


2





L


t
1








Equation





2

b








This special DCM mode is called Critical Conduction Mode, CRM. CRM operates at the boundary between DCM and CCM mode.


As seen in eq. (2b), CRM control is very simple; PFC is achieved by simply keeping t1 constant. Most of the conunercial DCM PFC controllers operate in CRM mode. NOTE: references to CRM mode means time t3 equals 0. If time t3 is non-zero, the switching power converter operates in DCM mode. DCM needs higher peak inductor current iL comparing to CRM for the same power. Thus, CRM is generally preferred at around the sinusoidal peak but to avoid high switching frequencies DCM is preferred close to the line troughs.


Maximum Power


Regardless of the operational mode, to limit the maximum peak current to the same level as for a CRM controller, at minimum input voltage VIN, min and maximum power demand Pmax, the controller operates the switching power converter in CRM mode at the peak of the line input voltage. Assuming a perfect power factor correction and 100% efficiency, the maximum power is given by:










P

m





a





x


=


1
2




V


i





n

,





m





i





n

,

r





m





s


2


L






f


s





w

,

m





a





x







(


V
link



V
link

-

V


i





n

,

m





i





n

,

p





k





)






Equation





3








Where VIN,min is the Minimum input voltage, •Vlink is the output voltage of the switching power converter, L is Boost Inductor inductance value. and fsw,max is the switching frequency 1/TSW at the peak of the line input voltage.


The switching frequency is a constant and not generally accessible by a user of the controller, thus, the maximum power for a specific application is setup by the value of the boost inductor. Any positive variation on the inductor, due to manufacture tolerances and/or in the input line, due to demand peaks in the power distribution network, will limit the maximum power available. To compensate, the designers often oversize the inductor value L, sometimes by more than 40%, resulting in non-optimal operating conditions with performance degradation especially in efficiency and EMI compatibility.


In at least one embodiment, to solve the maximum power problem and maintain the same inductor peak current levels compared to a CRM solution, a switching algorithm, such as the switching algorithm 500 (FIG. 5), controls the switching frequency of switch Q1 in FIG. 3 and auto-adapts the switching frequency of switch Q1 and operates the switching power converter 300 in, or close to, CRM mode (i.e. constant t1 and variable switching frequency fsw) when the power demand by the load is larger than the power available in DCM mode. The next section describes the original and modified algorithm.


Original Algorithm Control Rules


For each switching cycle, the controller calculates:

    • The switching period Tsw, using the DCM switching period rule of Equation 4. The switching frequency basically follows the input line voltage profile; minimum at the trough and maximum at the peak of the line voltage.
    • The FET ON Time, t1, using the DCM ON-TIME control rule. The ON-TME includes 2 parts, slow (Equation 5) and fast (Equation 6) varying parts compared to the input line voltage period. The slow part (Equation 5), calculated twice per input line voltage period, includes the DC link voltage, RMS input voltage and load demand. The fast part (Equation 6), calculated once per switching period, includes instantaneous input/link voltages and calculated switching period.











T

S





W




(
n
)


=

T







T

m





i





n




(

2
-



v

i





n




(
n
)



V


i





n

,

p





k





)







Equation





4















C
halflinecycle

=

T







T

m





i





n





(


V


i





n

,

p





k

,

m





i





n




V


i





n

,

p





k




)

2



(



V
link

-

V


i





n

,

p





k

,

m





i





n





V
link
2


)



P
u







Equation





5
















t
1



(
n
)


=



C
halflinecycle




T

S





W




(
n
)




(



V
link



(
n
)


-


v

i





n




(
n
)



)







Equation





6








FIG. 4 depicts an exemplary rectified input voltage, ON-TIME t1, and switching period TSW for a specific input line and load configuration.


New Algorithm Control Rules


The relationship between ON-TIME, t1 of switch Q1 of FIG. 3, and switching period, Tsw,cr in critical mode of switch Q1 is given by:










T


S





W

,

c





r



=


t
1




V
link



V
link

-

v

i





n









Equation





7







An increase on the power demand increases the ON-TIME (Equation 6), which increases the critical switching period (Equation 7). The critical switching period is used if larger than the calculated DCM switching period (Equation 4). Using the larger period results in more power transferred (Equation 3). FIG. 5 depicts the switching algorithm 500 that calculates a pulse width t1 and switching period T for the nth switching cycle of switch Q1 in FIG. 3. For the cases where the critical switching period is selected, the ON-TIME t1(n) for the nth cycle of the switch Q1 is defined as:

t1(n)=ChalflinecycleVlink(n)   Equation 8)


Because Vlink is a slow moving signal, the ON-TIME can be approximated to a constant which fills the power factor correction requirement. The new algorithm fulfills:


Auto adapts between CRM and DCM mode depending on power transfer requirements.


Performs power factor correction independent on operating mode.


The switching algorithm 500 begins at operation 502 and proceeds to operation 504. Operation 504 calculates the nth switching period using the DCM control rule (TSW,DCM,n). Operation 506 calculates the nth critical switching period using the CRM control rule (TSW,cr,n). Operation 508 determines if the switching period using the DCM control rule TSW,DCM,n is greater than the switching period using the CRM control rule TSW,cr,n. If the nth switching period using the DCM control rule TSW,DCM,n is greater than the nth switching period using the CRM control rule TSW,cr,n, then operation 510 selects the nth switching period TSW,n to equal the switching period TSW,cr,n calculated using the CRM control rule. If the nth switching period using the DCM control rule TSW,DCM,n is less than the nth switching period using the CRM control rule TSW,cr,n, then operation 510 selects the nth switching period TSW,n to equal the switching period TSW,DCM,n calculated using the DCM control rule. Operation 514 then calculates the on-time t1,n for the nth switching period using the control rule associated with the switching period determined in operation 508.



FIGS. 6 and 7 depict DCM and CRM simulation results for a full load and minimum input voltage. The boost inductor value L was increased by 20% to reduce available power. To deliver the requested power of 120% of maximum rated power near the peak of the line input voltage, the controller of FIG. 3 switches to CRM mode as indicated by an approximately constant t1 and increased switching period TSW. The inductor peak current iL,pk increases but the inductor average current iL,avg (i.e. input current) retains a sinusoidal shape.


Although embodiments have been described in detail, it should be understood that various changes, substitutions, and alterations can be made hereto without departing from the spirit and scope of the invention as defined by the appended claims.

Claims
  • 1. An apparatus comprising: a controller to control a switching power converter, wherein the controller is configured to automatically transition operation of the switching power converter, during each cycle of an input voltage to the switching power converter, between operating in discontinuous conduction mode and critical conduction mode, wherein during each cycle of a control signal to a switch that controls power delivered to a load coupled to the switching power converter, to automatically transition operation of the switching power converter between operating in discontinuous conduction mode and critical conduction mode, the controller is configured to: determine a first period of a control signal to a switch of the switching power converter in accordance with a discontinuous conduction mode control rule, wherein the switch controls power delivered to an output of the switching power converter;determine a second period of the control signal in accordance with a critical conduction mode control rule;compare the first period and the second period;set an actual period of the control signal equal to the first period if the first period is less than the second period and set an actual period of the control signal equal to the second period if the first period is greater than the second period; andcalculate an ON time of the switch in accordance with one of: (i) the discontinuous conduction mode control rule if the actual period is set to the first period and (ii) the critical conduction mode control rule if the actual period is set to the second period.
  • 2. The apparatus of claim 1 wherein the controller is further configured to operate the switching power converter in critical conduction mode when a determined switching period of the switch in the switching power converter that controls power delivered to the load of the switching power converter is more efficient than a determined switching period of the switch for operating the switching power converter in discontinuous conduction mode.
  • 3. The apparatus of claim 1 further comprising: the switching power converter coupled to the controller, andthe load coupled to the switching power converter.
  • 4. The apparatus of claim 3 wherein the load comprises a light emitting diode.
  • 5. A method comprising: controlling a switching power converter to automatically transition operation of the switching power converter, during each cycle of an input voltage to the switching power converter, between operating in discontinuous conduction mode and critical conduction mode, wherein to automatically transition operation of the switching power converter, during each cycle of an input voltage to the switching power converter, between operating in discontinuous conduction mode and critical conduction mode comprises: determining a first period of a control signal to a switch of the switching power converter in accordance with a discontinuous conduction mode control rule, wherein the switch controls power delivered to an output of the switching power converter;determining a second period of the control signal in accordance with a critical conduction mode control rule;comparing the first period and the second period;setting an actual period of the control signal equal to the first period if the first period is less than the second period and set an actual period of the control signal equal to the second period if the first period is greater than the second period; andcalculating an ON time of the switch in accordance with one of: (i) the discontinuous conduction mode control rule if the actual period is set to the first period and (ii) the critical conduction mode control rule if the actual period is set to the second period.
  • 6. The method of claim 5 wherein the method further comprises: operating the switching power converter in critical conduction mode when a determined switching period of a switch in the switching power converter that controls power delivered to a load of the switching power converter is more efficient than a determined switching period of the switch for operating the switching power converter in discontinuous conduction mode.
  • 7. The method of claim 5 further comprising: providing power from the switching power converter to a load.
  • 8. The method of claim 7 wherein the load comprises a light emitting diode.
  • 9. A lighting system comprising: a switching power converter, wherein the switching power converter include an inductor, a link capacitor coupled to the inductor, and a switch having a first terminal coupled between the inductor and the link capacitor;a load coupled to the link capacitor, anda controller coupled to a conduction control terminal of the switch, wherein the controller is configured to: (a) determine a first period of a control signal for the switch in accordance with a discontinuous conduction mode control rule;(b) determine a second period of the control signal for the switch in accordance with a critical conduction mode control rule;(c) compare the first period and the second period;(d) set an actual period of the control signal equal to the first period if the first period is less than the second period and set an actual period of the control signal equal to the second period if the first period is greater than the second period;(e) calculate an ON time of the switch in accordance with one of: (i) the discontinuous conduction mode control rule if the actual period is set to the first period and (ii) the critical conduction mode control rule if the actual period is set to the second period; and(f) provide a control signal to the switch, wherein the control signal comprises a period equal to the actual period and a pulse width equal to the ON time calculated.
  • 10. The lighting system of claim 9 wherein the load comprises one or more light emitting diodes.
  • 11. The lighting system of claim 9 wherein the controller is configured to perform (a)-(f) for each cycle of the switch.
  • 12. A method to control a switching power converter and provide power to a load, the method comprising: (a) determining a first period of a control signal to a switch of the switching power converter in accordance with a discontinuous conduction mode control rule, wherein the switch controls power delivered to an output of the switching power converter;(b) determining a second period of the control signal in accordance with a critical conduction mode control rule;(c) comparing the first period and the second period;(d) setting an actual period of the control signal equal to the first period if the first period is less than the second period and set an actual period of the control signal equal to the second period if the first period is greater than the second period;(e) calculating an ON time of the switch in accordance with one of: (i) the discontinuous conduction mode control rule if the actual period is set to the first period and (ii) the critical conduction mode control rule if the actual period is set to the second period; and(f) providing a control signal to the switch, wherein the control signal comprises a period equal to the actual period and a pulse width equal to the ON time calculated.
  • 13. The method of claim 12 wherein the load comprises one or more light emitting diodes.
  • 14. The method of claim 12 further comprising: performing (a)-(f) for each cycle of the switch.
US Referenced Citations (144)
Number Name Date Kind
3790878 Brokaw Feb 1974 A
4677366 Wilkinson et al. Jun 1987 A
4683529 Bucher Jul 1987 A
4737658 Kronmuller et al. Apr 1988 A
4739462 Farnsworth et al. Apr 1988 A
4937728 Leonardi Jun 1990 A
4940929 Williams Jul 1990 A
4977366 Powell Dec 1990 A
5001620 Smith Mar 1991 A
5003454 Bruning Mar 1991 A
5055746 Hu et al. Oct 1991 A
5109185 Ball Apr 1992 A
5173643 Sullivan et al. Dec 1992 A
5264780 Bruer et al. Nov 1993 A
5278490 Smedley Jan 1994 A
5383109 Maksimovic et al. Jan 1995 A
5424932 Inou et al. Jun 1995 A
5430635 Liu Jul 1995 A
5479333 McCambridge et al. Dec 1995 A
5481178 Wilcox et al. Jan 1996 A
5565761 Hwang Oct 1996 A
5638265 Gabor Jun 1997 A
5691890 Hyde Nov 1997 A
5747977 Hwang May 1998 A
5757635 Seong May 1998 A
5764039 Choi et al. Jun 1998 A
5783909 Hochstein Jul 1998 A
5798635 Hwang et al. Aug 1998 A
5808453 Lee Sep 1998 A
5874725 Yamaguchi Feb 1999 A
5960207 Brown Sep 1999 A
5994885 Wilcox et al. Nov 1999 A
6043633 Lev et al. Mar 2000 A
6084450 Smith et al. Jul 2000 A
6091233 Hwang et al. Jul 2000 A
6160724 Hemena et al. Dec 2000 A
6229292 Redl et al. May 2001 B1
6259614 Ribarich et al. Jul 2001 B1
6300723 Wang et al. Oct 2001 B1
6304066 Wilcox et al. Oct 2001 B1
6304473 Telefus et al. Oct 2001 B1
6343026 Perry Jan 2002 B1
6356040 Preis et al. Mar 2002 B1
6445600 Ben-Yaakov Sep 2002 B2
6469484 L'Hermite et al. Oct 2002 B2
6510995 Muthu et al. Jan 2003 B2
6531854 Hwang Mar 2003 B2
6580258 Wilcox et al. Jun 2003 B2
6583550 Itwasa Jun 2003 B2
6628106 Batarseh et al. Sep 2003 B1
6657417 Hwang Dec 2003 B1
6696803 Tao et al. Feb 2004 B2
6724174 Esteves et al. Apr 2004 B1
6768655 Yang et al. Jul 2004 B1
6781351 Mednik et al. Aug 2004 B2
6839247 Yang Jan 2005 B1
6882552 Telefus et al. Apr 2005 B2
6894471 Corva et al. May 2005 B2
6933706 Shih Aug 2005 B2
6940733 Schie et al. Sep 2005 B2
6944034 Shteynberg et al. Sep 2005 B1
6956750 Eason et al. Oct 2005 B1
6975523 Kim et al. Dec 2005 B2
6980446 Simada et al. Dec 2005 B2
7072191 Nakao et al. Jul 2006 B2
7099163 Ying Aug 2006 B1
7161816 Shteynberg et al. Jan 2007 B2
7221130 Ribeiro et al. May 2007 B2
7233135 Noma et al. Jun 2007 B2
7266001 Notohamiprodjo et al. Sep 2007 B1
7292013 Chen et al. Nov 2007 B1
7295452 Liu Nov 2007 B1
7411379 Chu Aug 2008 B2
7554473 Melanson Jun 2009 B2
7606532 Wuidart Oct 2009 B2
7667986 Artusi et al. Feb 2010 B2
7684223 Wei Mar 2010 B2
7719246 Melanson May 2010 B2
7719248 Melanson May 2010 B1
7746043 Melanson Jun 2010 B2
7804480 Jeon et al. Sep 2010 B2
7834553 Hunt et al. Nov 2010 B2
7872883 Elbanhawy Jan 2011 B1
7894216 Melanson Feb 2011 B2
8008898 Melanson et al. Aug 2011 B2
8169806 Sims et al. May 2012 B2
8193717 Leiderman Jun 2012 B2
8222772 Vinciarelli Jul 2012 B1
8242764 Shimizu et al. Aug 2012 B2
8369109 Niedermeier et al. Feb 2013 B2
8441210 Shteynberg et al. May 2013 B2
8536799 Grisamore et al. Sep 2013 B1
8610364 Melanson et al. Dec 2013 B2
8803439 Stamm et al. Aug 2014 B2
8816593 Lys et al. Aug 2014 B2
20030090252 Hazucha May 2003 A1
20030111969 Konishi et al. Jun 2003 A1
20030160576 Suzuki Aug 2003 A1
20030174520 Bimbaud Sep 2003 A1
20030214821 Giannopoulos et al. Nov 2003 A1
20030223255 Ben-Yaakov Dec 2003 A1
20040046683 Mitamura et al. Mar 2004 A1
20040196672 Amei Oct 2004 A1
20050057237 Clavel Mar 2005 A1
20050207190 Gritter Sep 2005 A1
20050231183 Li et al. Oct 2005 A1
20050270813 Zhang et al. Dec 2005 A1
20050275354 Hausman Dec 2005 A1
20060013026 Frank et al. Jan 2006 A1
20060022648 Zeltser Feb 2006 A1
20060214603 Oh et al. Sep 2006 A1
20070103949 Tsuruya May 2007 A1
20080018261 Kastner Jan 2008 A1
20080043504 Ye Feb 2008 A1
20080062584 Freitag et al. Mar 2008 A1
20080062586 Apfel Mar 2008 A1
20080117656 Clarkin May 2008 A1
20080130336 Taguchi Jun 2008 A1
20080175029 Jung et al. Jul 2008 A1
20080259655 Wei et al. Oct 2008 A1
20080278132 Kesterson et al. Nov 2008 A1
20080310194 Huang et al. Dec 2008 A1
20090059632 Li et al. Mar 2009 A1
20090067204 Ye et al. Mar 2009 A1
20090108677 Walter et al. Apr 2009 A1
20090184665 Femo Jul 2009 A1
20090243582 Irissou et al. Oct 2009 A1
20090295300 King Dec 2009 A1
20100128501 Huang et al. May 2010 A1
20100238689 Fei et al. Sep 2010 A1
20100244793 Caldwell Sep 2010 A1
20110110132 Rausch May 2011 A1
20110199793 Kuang et al. Aug 2011 A1
20110276938 Perry et al. Nov 2011 A1
20110291583 Shen Dec 2011 A1
20110309760 Beland et al. Dec 2011 A1
20120056551 Zhu et al. Mar 2012 A1
20120146540 Khayat et al. Jun 2012 A1
20120153858 Melanson et al. Jun 2012 A1
20120187997 Liao et al. Jul 2012 A1
20120248998 Yoshinaga Oct 2012 A1
20120320640 Baurle et al. Dec 2012 A1
20130181635 Ling Jul 2013 A1
20140218978 Heuken et al. Aug 2014 A1
Foreign Referenced Citations (18)
Number Date Country
0536535 Apr 1993 EP
0636889 Jan 1995 EP
1213823 Jun 2002 EP
1289107 Aug 2002 EP
1962263 Aug 2008 EP
2232949 Sep 2010 EP
2257124 Dec 2010 EP
2008053181 Mar 2006 JP
0184697 Nov 2001 WO
2004051834 Jun 2004 WO
20060013557 Feb 2006 WO
2006022107 Mar 2006 WO
2007016373 Feb 2007 WO
2008004008 Jan 2008 WO
20080152838 Dec 2008 WO
2010011971 Jan 2010 WO
2010065598 Jun 2010 WO
2011008635 Jan 2011 WO
Non-Patent Literature Citations (77)
Entry
Su, et al, Ultra Fast Fixed-Frequency Hysteretic Buck Converter with Maximum Charging Current Control and Adaptive Delay Compensation for DVS Applications, IEEE Journal of Solid-State Circuits, vol. 43, No. 4, Apr. 2008, pp. 815-822, Hong Kong University of Science and Technology, Hong Kong, China.
Wong, et al, “Steady State Analysis of Hysteretic Control Buck Converters”, 2008 13th International Power Electronics and Motion Control Conference (EPE-PEMC 2008), pp. 400-404, 2008, National Semiconductor Corporation, Power Management Design Center, Hong Kong, China.
Zhao, et al, Steady-State and Dynamic Analysis of a Buck Converter Using a Hysteretic PWM Control, 2004 35th Annual IEEE Power Electronics Specialists Conference, pp. 3654-3658, Department of Electrical & Electronic Engineering, Oita University, 2004, Oita, Japan.
Texas Instruments, High Performance Power Factor Preregulator, UC2855A/B and UC3855A/B, SLUS328B, Jun. 1998, Revised Oct. 2005, pp. 1-14, Dallas, TX, USA.
Balogh, Laszlo, et al,Power-Factor Correction with Interleaved Boost Converters in Continuous-Inductr-Current Mode, 1993, IEEE, pp. 168-174, Switzerland.
Cheng, Hung L., et al, A Novel Single-Stage High-Power-Factor Electronic Ballast with Symmetrical Topology, Power Electronics and Motion Control Conference, 2006. IPEMC 2006. CES/IEEE 5th International, Aug. 14-16, 2006, vol. 50, No. 4, Aug. 2003, pp. 759-766, Nat. Ilan Univ., Taiwan.
Fairchild Semiconductor, Theory and Application of the ML4821 Average Current Mode PFC Controllerr, Fairchild Semiconductor Application Note 42030, Rev. 1.0, Oct. 25, 2000, pp. 1-19, San Jose, California, USA.
Garcia, O., et al, High Efficiency PFC Converter to Meet EN610000302 and A14, Industrial Electronics, 2002. ISIE 2002. Proceedings of the 2002 IEEE International Symposium, vol. 3, pp. 975-980, Div. de Ingenieria Electronica, Univ. Politecnica de Madrid, Spain.
Infineon Technologies AG, Standalone Power Factor Correction (PFC) Controller in Continuous Conduction Mode (CCM), Infineon Power Management and Supply, CCM-PFC, ICE2PCS01, ICE2PCS01G, Version 2.1, Feb. 6, 2007, p. 1-22, Munchen, Germany.
Lu, et al, Bridgeless PFC Implementation Using One Cycle Control Technique, International Rectifier, 2005, pp. 1-6, Blacksburg, VA, USA.
Brown, et al, PFC Converter Design with IR1150 One Cycle Control IC, International Rectifier, Application Note AN-1077, pp. 1-18, El Segundo CA, USA.
International Rectifer, PFC One Cycle Control PFC IC, International Rectifier, Data Sheet No. PD60230 rev. C, IR1150(S)(PbF), IR11501(S)(PbF), Feb. 5, 2007, pp. 1-16, El Segundo, CA, USA.
International Rectifier, IRAC1150=300W Demo Board, User's Guide, Rev 3.0, International Rectifier Computing and Communications SBU—AC-DC Application Group, pp. 1-18, Aug. 2, 2005, El Segundo, CO USA.
Lai, Z., et al, A Family of Power-Factor-Correction Controller, Applied Power Electronics Conference and Exposition, 1997. APEC '97 Conference Proceedings 1997., Twelfth Annual, vol. 1, pp. 66-73, Feb. 23-27, 1997, Irvine, CA.
Lee, P, et al, Steady-State Analysis of an Interleaved Boost Converter with Coupled Inductors, IEEE Transactions on Industrial Electronics, vol. 47, No. 4, Aug. 2000, pp. 787-795, Hung Hom, Kowloon, Hong Kong.
Linear Technology, Single Switch PWM Controller with Auxiliary Boost Converter, Linear Technology Corporation, Data Sheet LT1950, pp. 1-20, Milpitas, CA, USA.
Linear Technology, Power Factor Controller, Linear Technology Corporation, Data Sheet LT1248, pp. 1-12, Milpitas, CA, USA.
Supertex, Inc., HV9931 Unity Power Factor LED Lamp Driver, Supertex, Inc., Application Note AN-H52, 2007, pp. 1-20, Sunnyvale, CA, USA.
Ben-Yaakov, et al, The Dynamics of a PWM Boost Converter with Resistive Input, IEEE Transactions on Industrial Electronics, vol. 46., No. 3, Jun. 1999, pp. 1-8, Negev, Beer-Sheva, Israel.
Erickson, Robert W., et al, Fundamentals of Power Electronics, Second Edition, Chapter 6, 2001, pp. 131-184, Boulder CO, USA.
STMicroelectronics, CFL/TL Ballast Driver Preheat and Dimming L6574, Sep. 2003, pp. 1-10, Geneva, Switzerland.
Fairchild Semiconductor, 500W Power-Factor-Corrected (PFC) Converter Design with FAN4810, Application Note 6004, Rev. 1.0.1, Oct. 31, 2003, pp., 1-14, San Jose, CA, USA.
Fairfield Semiconductor, Power Factor Correction (PFC) Basics, Application Note 42047, Rev. 0.9.0, Aug. 19, 2004, pp. 1-11, San Jose, CA, USA.
Fairchild Semiconductor, Design of Power Factor Correction Circuit Using FAN7527B, Application Note AN4121, Rev. 1.0.1, May 30, 2002, pp. 1-12, San Jose, CA, USA.
Fairchild Semiconductor, Low Start-Up Current PFC/PWM Controller Combos FAN4800, Rev. 1.0.6, Nov. 2006, pp. 1-20, San Jose, CA, USA.
Prodic, Aleksander, Compensator Design and Stability Assessment for Fast Voltage Loops of Power Factor Correction Rectifiers, IEEE Transactions on Power Electronics, vol. 22, Issue 5, Sep. 2007, pp. 1719-1730, Toronto, Canada.
Fairchild Semiconductor, ZVS Average Current PFC Controller Fan 4822, Rev. 1.0.1, Aug. 10, 2001, pp. 1-10, San Jose, CA, USA.
Prodic, et al, Dead-Zone Digital Controller for Improved Dynamic Response of Power Factor Preregulators, Applied Power Electronics Conference and Exposition, 2003, vol. 1, pp. 382-388, Boulder CA, USA.
Philips Semiconductors, 90W Resonant SMPS with TEA1610 Swing Chip, Application Note AN99011, Sep. 14, 1999, pp. 1-28, The Netherlands.
STMicroelectronics, Advanced Transition-Mode PFC Controller L6563 and L6563A, Mar. 2007, pp. 1-40, Geneva, Switzerland.
ON Semiconductor, Power Factor Controller for Compact and Robust, Continuous Conduction Mode Pre-Converters, NCP1654, Mar. 2007, Rev. PO, pp. 1-10, Denver, CO, USA.
Fairchild Semicondctor, Simple Ballast Controller, KA7541, Rev. 1.0.3, Sep. 27, 2001, pp. 1-14, San Jose, CA, USA.
Fairchild Semiconductor, Power Factor Controller, ML4812, Rev. 1.0.4, May 31, 2001, pp. 1-18, San Jose, CA, USA.
Prodic, et al, Digital Controller for High-Frequency Rectifiers with Power Factor Correction Suitable for On-Chip Implementation, Power Conversion Conference—Nagoya, 2007. PCC '07, Apr. 2-5, 2007, pp. 1527-1531, Toronto, Canada.
Freescale Semiconductor, Dimmable Light Ballast with Power Factor Correction, Designer Reference Manual, DRM067, Rev. 1, Dec. 2005, M68HC08 Microcontrollers, pp. 1-72, Chandler, AZ, USA.
Freescale Semiconductor, Design of Indirect Power Factor Correction Using 56F800/E, Freescale Semiconductor Application Note, AN1965, Rev. 1, Jul. 2005, pp. 1-20, Chandler, AZ, USA.
Freescale Semiconductor, Implementing PFC Average Current Mode Control using the MC9S12E128, Application Note AN3052, Addendum to Reference Design Manual DRM064, Rev. 0, Nov. 2005, pp. 1-8, Chandler, AZ, USA.
Hirota, et al, Analysis of Single Switch Delta-Sigma Modulated Pulse Space Modulation PFC Converter Effectively Using Switching Power Device, Power Electronics Specialists Conference, 2002. pesc 02. 2002 IEEE 33rd Annual, vol. 2, pp. 682-686, Hyogo Japan.
Madigan, et al, Integrated High-Quality Rectifier-Regulators, Industrial Electronics, IEEE Transactions, vol. 46, Issue 4, pp. 749-758, Aug. 1999, Cary, NC, USA.
Renesas, Renesas Technology Releases Industry's First Critical-Conduction-Mode Power Factor Correction Control IC Implementing Interleaved Operations, R2A20112, pp. 1-4, Dec. 18, 2006, Tokyo, Japan.
Renesas, PFC Control IC R2A20111 Evaluation Board, Application Note R2A20111 EVB, all pages, Feb. 2007, Rev. 1.0, pp. 1-39, Tokyo, Japan.
Miwa, et al, High Efficiency Power Factor Correction Using Interleaving Techniques, Applied Power Electronics Conference and Exposition, 1992. APEC '92. Conference Proceedings 1992., Seventh Annual, Feb. 23-27, 1992, pp. 557-568, MIT, Cambridge, MA, USA.
Noon, Jim, High Performance Power Factor Preregulator UC3855A/B, Texas Instruments Application Report, SLUA146A, May 1996—Revised Apr. 2004, pp. 1-35, Dallas TX, USA.
NXP Semiconductors, TEA1750, GreenChip III SMPS Control IC Product Data Sheet, Rev.01, Apr. 6, 2007, pp. 1-29, Eindhoven, The Netherlands.
Turchi, Joel, Power Factor Correction Stages Operating in Critical Conduction Mode, ON Semiconductor, Application Note AND8123/D, Sep. 2003—Rev. 1 , pp. 1-20, Denver, CO, USA.
ON Semiconductor, GreenLine Compact Power Factor Controller: Innovative Circuit for Cost Effective Solutions, MC33260, Semiconductor Components Industries, Sep. 2005—Rev. 9, pp. 1-22, Denver, CO, USA.
ON Semiconductor, Enhanced, High Voltage and Efficient Standby Mode, Power Factor Controller, NCP1605, Feb. 2007, Rev. 1, pp. 1-32, Denver, CO, USA.
ON Semiconductor, Cost Effective Power Factor Controller, NCP1606, Mar. 2007, Rev. 3, pp. 1-22, Denver, CO, USA.
Renesas, Power Factor Correction Controller IC, HA16174P/FP, Rev. 1.0, Jan. 6, 2006, pp. 1-38, Tokyo, Japan.
Seidel, et al, A Practical Comparison Among High-Power-Factor Electronic Ballasts with Similar Ideas, IEEE Transactions on Industry Applications, vol. 41, No. 6, Nov./Dec. 2005, pp. 1574-1583, Santa Maria, Brazil.
STMicroelectronics, Electronic Ballast with PFC using L6574 and L6561, Application Note AN993, May 2004, pp. 1-20, Geneva, Switzerland.
Maksimovic, et al, Impact of Digital Control in Power Electronics, International Symposium on Power Semiconductor Devices and ICS, 2004, pp. 2-22, Boulder, Colorado, USA.
Fairchild Semiconductor, Ballast Control IC, FAN 7711, Rev. 1.0.3, 2007, pp. 1-23, San Jose,California, USA.
Yao, Gang et al, Soft Switching Circuit for Interleaved Boost Converters, IEEE Transactions on Power Electronics, vol. 22, No. 1, Jan. 2007, pp. 1-8, Hangzhou China.
STMicroelectronics, Transition Mode PFC Controller, Datasheet L6562, Rev. 8, Nov. 2005, pp. 1-16, Geneva, Switzerland.
Zhang, Wanfeng et al, A New Duty Cycle Control Strategy for Power Factor Correction and FPGA Implementation, IEEE Transactions on Power Electronics, vol. 21, No. 6, Nov. 2006, pp. 1-10, Kingston, Ontario, Canada.
STMicroelectronics, Power Factor Connector L6561, Rev 16, Jun. 2004, pp. 1-13, Geneva, Switzerland.
Texas Instruments, Avoiding Audible Noise at Light Loads when Using Leading Edge Triggered PFC Converters, Application Report SLUA309A, Mar. 2004—Revised Sep. 2004, pp. 1-4, Dallas, Texas, USA.
Texas Instruments, Startup Current Transient of the Leading Edge Triggered PFC Controllers, Application Report SLUA321, Jul. 2004, pp. 1-4, Dallas, Texas, USA.
Texas Instruments, Current Sense Transformer Evaluation UCC3817, Application Report SLUA308, Feb. 2004, pp. 1-3, Dallas, Texas, USA.
Texas Instruments, BiCMOS Power Factor Preregulator Evaluation Board UCC3817, User's Guide, SLUU077C, Sep. 2000—Revised Nov. 2002, pp. 1-10, Dallas, Texas, USA.
Texas Instruments, Interleaving Continuous Conduction Mode PFC Controller, UCC28070, SLUS794C, Nov. 2007—Revised Jun. 2009, pp. 1-45, Dallas, Texas, USA.
Texas Instruments, 350-W Two-Phase Interleaved PFC Pre-regulator Design Review, Application Report SLUA369B, Feb. 2005—Revised Mar. 2007, pp. 1-22, Dallas, Texas, USA.
Texas Instruments, Average Current Mode Controlled Power Factor Correction Converter using TMS320LF2407A, Application Report SPRA902A, Jul. 2005, pp. 1-15, Dallas, Texas, USA.
Texas Instruments, Transition Mode PFC Controller, UCC28050, UCC28051, UCC38050, UCC38051, Application Note SLUS515D, Sep. 2002—Revised Jul. 2005, pp. 1-28, Dallas, Texas, USA.
Unitrode, High Power-Factor Preregulator, UC1852, UC2852, UC3852, Feb. 5, 2007, pp. 1-8, Merrimack, Maine, USA.
Unitrode, Optimizing Performance in UC3854 Power Factor Correction Applications, Design Note DN 39E, 1999, pp. 1-6, Merrimack, Maine, USA.
ON Semiconductor Four Key Steps to Design a Continuous Conduction Mode PFC Stage Using the NCP1653, Application Note AND8184/D, Nov. 2004, pp. 1-8, Phoenix, AZ, USA.
Unitrode, BiCMOS Power Factor Preregulator, Texas Instruments, UCC2817, UCC2818, UCC3817, UCC3818, SLUS3951, Feb. 2000—Revised Feb. 2006, pp. 1-25, Dallas, Texas, USA.
Unitrode, UC3854A/B and UC3855A/B Provide Power Limiting with Sinusoidal Input Current for PFC Front Ends, SLUA196A, Design Note DN-66, Jun. 1995—Revised Nov. 2001, pp. 1-6, Merrimack, Maine, USA.
Unitrode, Programmable Output Power Factor Preregulator, UCC2819, UCC3819, SLUS482B, Apr. 2001—Revised Dec. 2004, pp. 1-16, Merrimack, Maine, USA.
Texas Instruments, UCC281019, 8-Pin Continuous Conduction Mode (CCM) PFC Controller, SLU828B, Revised Apr. 2009, pp. 1-48, Dallas, Texas, USA.
http://toolbarpdf.com/docs/functions-and-features-of=inverters.html, Jan. 20, 2011, pp. 1-8.
Zhou, Jinghai, et al, Novel Sampling Algorithm for DSP Controlled 2kW PFC Converter, IEEE Transactions on Power Electronics, vol. 16, No. 2, Mar. 2001, pp. 1-6, Hangzhou, China.
Mammano, Bob, Current Sensing Solutions for Power Supply Designers, Texas Instruments, 2001, pp. 1-36, Dallas, Texas, USA.
Fairchild Semiconductor, Ballast Control IC FAN7532, Rev. 1.0.3, Jun. 2006, pp. 1-16, San Jose, California, USA.
Fairchild Semiconductor, Simple Ballast Controller, FAN7544, Rev. 1.0.0, Sep. 21, 2004, pp. 1-14, San Jose, California, USA.