Patent Application
20240413838
The present disclosure relates to a line coding technique in digital communication.
A general line code does not have an error correction function, and it is necessary to perform error correction of multiple bits in upper layers of a physical layer and a data link layer. For example, it is difficult to use the 8b/10b line code for bitwise error correction, and a block error correction code such as Reed-Solomon Code is performed on a packet-by-packet basis.
In order to solve this problem, a coding technique of the 4b/10b line code having an error correction function is proposed (Patent Document 1).
However, with respect to the 4b/10b line code, the coding rate is only 60% in comparison with the 8b/10b line code, and the processing performance degrades. Additionally, in the 4b/10b line code, because 4 bits are converted into 10 bits, the overhead (portion not used for data transmission such as control information) for performing additional work is large, which significantly affects the processing performance. Furthermore, for a code that satisfies constraint conditions required for certain functions, such as embedded clock, DC-balancing, and error detection, only 20 codes can be detected in the 4b/10b line code. Therefore, only the minimum special characters can be assigned as the control information, and it is difficult to implement an additional function such as a handshake sequence.
In view of the above problems, it is an object of the present disclosure to provide a line code that satisfies a predetermined constraint condition.
In order to solve the above problem, one aspect of the present disclosure relates to a conversion device including an acquisition unit configured to acquire a first bit string having a first bit length L1; a conversion unit configured to convert, in accordance with conversion information that associates respective bit strings each having the first bit length L1 with bit strings each having a second bit length L2 uniquely assigned to the respective bit strings, the first bit string into a second bit string having the second bit length L2. The conversion information is created by searching for a clique that includes 2L1 or more nodes, from a graph including nodes and an edge representing the bit strings each having the second bit length L2 that satisfy a predetermined constraint condition.
According to the present disclosure, a line code that satisfies a predetermined constraint condition can be provided.
In the following, embodiments of the present invention will be described based on the drawings.
The following embodiments disclose a conversion device that converts a transmission target data into a bit string having a predetermined function such as error correction, and a reverse conversion device that restores a transmitted bit string to original data.
To summarize the embodiments described later, as illustrated in
In the conversion table according to the following embodiments, respective bit strings each having the bit length L1 are uniquely assigned to bit strings each having the bit length L2 that satisfies a constraint condition to have a predetermined function, such as DC-balancing, clock recovery, error detection, and error correction. For example, in 8b/14b transmission line coding, as illustrated, the conversion device 100 converts an 8-bit bit string “x0x1x2x3x4x5x6x7” (where xi=0/1) into a 14-bit bit string “y0y1y2y3y4y5y6y7y8y9y10y11y12y13” (where yi=0/1) in accordance with the conversion information (conversion table) 10.
A reverse conversion device 200 is a communication device including a reverse conversion circuit (decoder) 201 configured to reversely convert the bit string having the bit length L2 converted by the conversion device 100 into the bit string having the bit length L1 in accordance with the conversion information 10. The reverse conversion circuit 201 is implemented by, for example, hardware logic in substantially the same manner of the conversion circuit 101. Here, the conversion information 10 is stored in advance in a storage area that can be read from the reverse conversion circuit 201, for example. When the reverse conversion circuit 201 receives the 14-bit bit string converted by the conversion circuit 101, the reverse conversion circuit 201 restores the original bit string that has an 8-bit length by using the conversion information 10, for example.
Here, the conversion device 100 may further include the reverse conversion circuit 201. For example, the conversion device 100 may be a communication device including a conversion/reverse conversion circuit (codec) including the conversion circuit 101 and the reverse conversion circuit 201 instead of the conversion circuit 101. Similarly, the reverse conversion device 200 may further include the conversion circuit 101. For example, the reverse conversion device 200 may be a communication device having a conversion/reverse conversion circuit including the conversion circuit 101 and the reverse conversion circuit 201 instead of the reverse conversion circuit 201.
According to the present disclosure, the 8b/14b line coding may use 14-bit bit strings that satisfy the following six constraint conditions, as bit strings after conversion in the conversion information 10:
Here, the bit string satisfying the above constraint conditions is determined by finding a clique (a complete subgraph) including 28 or more nodes in a graph in which bit strings satisfying the constraint conditions 1) to 3) are nodes and an edge connecting the nodes satisfying the constraint conditions 4) to 6), particularly by finding the maximal clique. As described, by reducing the determining of the bit string satisfying the predetermined constraint conditions to the maximum clique search problem in the graph, a bit string can be efficiently determined.
As another example, the conversion device 100 and the reverse conversion device 200 may have a hardware configuration of a general computer 20 as illustrated in
Various computer programs including a program for implementing various functions and processes, which will be described later, in the conversion device 100 and the reverse conversion device 200 may be provided by a recording medium 27 such as a compact disk-read only memory (CD-ROM). When the recording medium 27 storing the program is set in the drive device 21, the program is installed in the auxiliary storage device 22 from the recording medium 27 via the drive device 21. However, the program does not necessarily have to be installed from the recording medium 27, and may be downloaded from any external device via a network or the like. The auxiliary storage device 22 stores the installed program and also stores necessary files and data, and the like. The memory device 23 reads the program and data from the auxiliary storage device 22 and stores them when a program activation instruction is issued. The CPU 24, which functions as a processor, performs various functions and processes of the conversion device 100 and the reverse conversion device 200, which will be described later, in accordance with the program and various data such as parameters necessary for executing the program stored in the memory device 23. The interface device 25 is used as a communication interface for connecting to a network or an external device. The communication I/F 26 includes a transmission/reception circuit for communicating with an external device.
Here, the communication I/F 26 may be a communication device including the conversion circuit 101 or the reverse conversion circuit 201 of
Next, the conversion device 100 according to one embodiment of the present disclosure will be described with reference to
As illustrated in
The acquisition unit 110 acquires the bit string having the bit length L1 to be transmitted. Specifically, when data is transmitted, the acquisition unit 110 acquires the data, divides the acquired data into bit strings each having the predetermined bit length L1, and passes the bit strings to the conversion unit 120. For example, in the 8b/14b transmission line coding, the acquisition unit 110 divides the data to be transmitted into 8-bit bit strings, and sequentially passes the divided bit strings to the conversion unit 120.
The conversion unit 120 converts the bit string to be converted that is acquired from the acquisition unit 110 into a bit string for transmission having the bit length L2, in accordance with the conversion information 10 that associates respective bit strings each having the bit length L1 with the bit strings each having the bit length L2 uniquely assigned to the respective bit strings. Here, the conversion information 10 is created by searching for a clique including 2L1 or more nodes in a graph including nodes and edge representing the bit strings each having the bit length L2 that satisfies the predetermined constraint conditions.
A bit string having the bit length L2 having a DC-balancing function, a clock recovery function, and an error detection function and error correction function is used as the conversion information 10.
For example, in the 8b/14b transmission line coding, the conversion information 10 represents a correspondence relationship between respective bit strings each having the 8-bit length and 14-bit bit strings uniquely assigned to the respective bit strings. The 14-bit bit string used as the conversion information 10 satisfies the following six constraint conditions.
The constraint condition 1) relates to the DC balancing function, the constraint conditions 2) to 5) relate to the clock recovery function, and the constraint condition 6) relates to the error detection function and error correction function. Here, the importance of the code is clock recovery function>DC balancing function>=error detection function and error correction function.
That is, the 14-bit bit string having the DC balancing function is composed of the equal number of bits “0” and “1”.
Additionally, the run lengths of all the 14-bit bit strings having the clock recovery function, that is, the maximum lengths of consecutive 0s or 1s are 5 or less.
Further, the run lengths of all the 14-bit bit strings having the clock recovery function is 7 or less in the 1-bit flip. That is, even if any one bit of the bit string is inverted, the run length of the resultant bit string is 12 or less. For example, in the bit string “00010011011101” illustrated in
Further, the run length of the bit string obtained by concatenating two 14-bit bit strings having the clock recovery function is 5 or less. For example, the run length of the bit string “0011101110010000010011011101” obtained by concatenating the two bit strings “00111011100100” and “00010011011101” illustrated in
Further, the run length of the bit string obtained by concatenating two 14-bit bit strings having the clock recovery function is 9 or less in the 2-bit flip in which the distance between two inverted bits is set to 4 bits or greater. That is, even if any two bits of the concatenated bit string are inverted, the run length of the resultant bit string is 12 or less. For example, in the bit string “0011101110000000000011011101” obtained by concatenating the two bit strings “00111011100100” and “00010011011101” illustrated in
Additionally, the hamming distance between two 14-bit bit strings having the error detection function and error correction function is 4 or greater. For example, the hamming distance of the two bit strings “11101100110000” and “00010011011101” illustrated in
Here, the conversion information 10 described above relates to the 8b/14b line coding that achieves the DC-balancing function, the clock recovery function, the error detection function and correction function, but the conversion information 10 according to the present disclosure is not limited thereto. For example, more generally, for L1b/L2b line coding, when L3 is a constant related to the run length, L4 is a constant related to the bit invert distance, and L5 is a constant related to the hamming distance, the following conditions may be used:
Next, a conversion process according to one embodiment of the present disclosure will be described with reference to
As illustrated in
In step S102, the conversion device 100 converts each of the bit strings into a bit string having the bit length L2 in accordance with the conversion information 10. The conversion information 10 is created by searching for a clique including 2L1 or more nodes in a graph including the nodes and the edge representing the bit strings each having the bit length L2 that satisfy the predetermined constraint conditions.
Here, the predetermined constraint conditions are for adding the DC-balancing function, the clock recovery function, and the error detection function and error correction function to the bit string having the bit length L1. For example, in the 8b/14b line coding, the predetermined constraint conditions may include:
The bit string having the bit length L2 converted by the conversion device 100 is transmitted to a transmission destination of the transmission target data.
Next, the reverse conversion device 200 according to one embodiment of the present disclosure will be described with reference to
As illustrated in
The acquisition unit 210 acquires the bit string having the bit length L2. Specifically, the acquisition unit 210 acquires the bit string having the bit length L2 converted by the conversion device 100 from the bit string having the bit length L1 representing the transmission target data. For example, in the 8b/14b line coding, the acquisition unit 210 acquires the 14-bit bit string.
The reverse conversion unit 220 reversely converts the acquired bit string into the bit string having the bit length L1 in accordance with the conversion information 10 that associates the respective bit strings each having the bit length L1 with the bit strings each having the bit length L2 uniquely assigned to the respective bit strings. As described above, the conversion information 10 is created by searching for the clique including 2L1 or more nodes in the graph including the nodes and the edge representing the bit strings each having the bit length L2 that satisfy the predetermined constraint conditions. For example, in the 8b/14b line coding, the reverse conversion unit 220 reversely converts the acquired 14-bit bit string into a corresponding 8-bit bit string in accordance with the conversion information 10. The restored bit strings are combined to restore the transmission target data.
Next, a reverse conversion process according to one embodiment of the present disclosure will be described with reference to
As illustrated in
In step S202, the reverse conversion unit 220 of the reverse conversion device 200 calculates the hamming distances between the bit string (the bit length L2) acquired by the acquisition unit 210 and all the bit strings (the bit length L2) included in the conversion information 10.
In step S203, the reverse conversion unit 220 selects a bit string (the bit length L2) having the minimum hamming distance included in the conversion information 10.
In step S204, the reverse conversion unit 220 determines whether the minimum hamming distance is 0. If the minimum hamming distance is 0, the reverse conversion unit 220 causes the process to transition to step S205. If the minimum hamming distance is not 0, the reverse conversion unit 220 causes the process to transition to step S206.
When the process transitions to step S205, the reverse conversion unit 220 converts the bit string (the bit length L2) selected in step S203 into a bit string (the bit length L1) in accordance with the conversion information 10. For example, in the 8b/14b transmission line coding, the reverse conversion unit 220 converts the 14-bit bit string into the 8-bit bit string.
If the process transitions from step S204 to step S206, the reverse conversion unit 220 determines whether the minimum hamming distance is 1. If the minimum hamming distance is 1, the reverse conversion unit 220 causes the process to transition to step S207. If the minimum hamming distance is not 1, the reverse conversion unit 220 causes the process to transition to step S209.
When the process transitions to step S207, the reverse conversion unit 220 performs 1-bit error correction on the bit string (the bit length L2) acquired in step S201, and converts the corrected bit string (the bit length L2) into a bit string (the bit length L1) in accordance with the conversion information 10. For example, in the 8b/14b line coding, because the hamming distance of arbitrary codes (symbols) is 4 or greater, when what is called a 1-bit error, in which 1 bit in 14 bits is inverted, occurs, there is only one symbol that has a hamming distance different by 1 for matching. Therefore, when the hamming distance is 1, the 1-bit error correction is possible. Here, when the hamming distance is 1, as described above, there is one symbol that has a hamming distance different by 1 for matching, and thus the reverse conversion unit 220 may convert the bit string (the bit length L2) selected in step S203 into the bit string (the bit length L1).
In step S208, the reverse conversion unit 220 notifies the upper layer that the 1-bit error correction has been performed. For example, the reverse conversion unit 220 outputs, to the CPU or the like, an interrupt signal (correct error) indicating that the 1-bit error correction has been performed.
If the process transitions from step S206 to step S209, the reverse conversion unit 220 performs error detection on the bit string acquired in step S201 and notifies a detection result. For example, when a 2-bit error occurs during communication, the minimum hamming distance value becomes 2, and in this case, the hamming distances of multiple bit strings (the bit length L2) included in the conversion information 10 can be 2. That is, error detection can be performed, although error correction cannot be performed because multiple bit strings (the bit length L2) are matched. Here, when an error of three or more bits occurs during communication, the error can be detected or cannot be detected. (There is a possibility that the bit string may erroneously match with another bit string.)
Additionally, the reverse conversion unit 220 notifies the upper layer of the detection result detected by the error detection. For example, the reverse conversion unit 220 outputs an interrupt signal indicating that an error has been detected (a fatal error) to the CPU or the like.
By the process of
Subsequently, a method of creating the conversion information 10 will be described. In the present disclosure, in order to extract a bit string that satisfies the predetermined constraint conditions 1) to 6), the computer 20 as illustrated in
In the 8b/14b line code, the predetermined constraint conditions may include:
In step S301, in the 8b/14b line coding, the computer 20 first extracts a 14-bit bit string that satisfies the above constraint conditions 1) to 3), and sets the extracted bit string as a node of a graph.
In step S302, with respect to a pair of bit strings that satisfy the constraints 4) to 6) for the extracted bit strings, the computer 20 connects these two nodes by an edge. This derives a graph including the nodes representing bit strings that satisfy the constraint conditions 1) to 3) and the edge connecting the pair of nodes that satisfy the constraint conditions 4) to 6) among the nodes.
In step S303, the computer 20 searches for a clique including 23 or more nodes in the graph derived in step S302. The bit string corresponding to the node of the extracted clique satisfies the constraint conditions 1) to 6).
Preferably, the computer 20 searches for a clique including the maximum number of nodes, that is, the maximum clique, so that more transmission control codes such as special characters can be used in addition to 28 8-bit bit strings of the conversion target. With respect to the maximal clique search problem in the graph, several known algorithms are known (e.g., Tomita's MCT algorithm, Battitti and Protasi's Reactive Local Search meta-heuristic based algorithm, and the like), and any of the maximal clique search algorithms may be employed.
Here, the MCT algorithm finds an exact solution, whereas the Reactive Local Search algorithm finds an approximate solution. In the maximum clique problem, as the scale of the problem increases, the required computation time exponentially increases. Thus, in practice, the Reactive Local Search algorithm, which approximately finds the maximum clique, can be used in the computation of the 8b/14b line code. Here, for the sake of simplicity, hereinafter, the exact solution and the approximate solution of the maximum clique are referred to as the maximum clique.
When the Reactive Local Search algorithm is applied to the 8b/14b line coding, 266 bit strings in
The code by the 8b/14b line code found and detected as described has the following characteristics.
The following are characteristics at the time of the error.
In the 8b/14b line coding, the conversion device 100 and the reverse conversion device 200 hold the conversion table (an example of the conversion information 10) as illustrated in
By using this code table, any 8-bit (0 to 255) data and 10 types of K codes can be converted into 14b. For example, 128 in 8-bit is converted into 14 bits “01111001001001” corresponding to D.128 in the conversion table. Similarly, the control code K.7 is converted into 14 bits “11101010100010”. The reverse conversion device 200 calculates all of the hamming distances between the 14-bit data to be converted (generally, received 14-bit data) and all the 14b codes of the code table, and if there is a code having a hamming distance of 0 (that is, if there is a 14b that completely matches), it is determined that there is no error, and the code is selected. If there is no code having a hamming distance of 0 (the code that completely matches), and if there is a code having a hamming distance of 1, it is determined that the 1-bit error is corrected, and the code is selected. (Only one code having a hamming distance of 1 can be present.) If other than the above, an error is detected.
Although the embodiments of the present invention have been described in detail, the present invention is not limited to the above-described specific embodiments, and various modifications and changes can be made within the scope of the spirit of the present invention described in the claims.
This application claims priority to Japanese Patent Application No. 2021-166735 filed on Oct. 11, 2021, the entire contents of which are incorporated herein by reference.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2021-166735 | Oct 2021 | JP | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2022/037497 | 10/6/2022 | WO |
