Claims
- 1. A memory, including a set of instructions, wherein said set of instructions are executable by a processor to operate a file server, said set of instructions comprising:controlling a subset of a set of shared storage devices; receiving and transmitting messages with a second file server, said steps for receiving and transmitting using a communication path including said shared storage devices; monitoring said communication path and said shared storage devices; storing state information about said file server in a persistent memory; and performing a takeover operation of said shared storage device in response to said instructions for monitoring and a state of said persistent memory, wherein said instructions for receiving and transmitting prevent both of said first server and said second server from concurrently performing said takeover operation.
- 2. A memory, as in claim 1, including instructions formanaging at a first server at least part of a shared resource; receiving and transmitting a sequence of messages between said first server to a second server, using said shared resource; and performing a takeover operation at a first server of at least part of said shared resource in response to said sequence of messages; whereby said instructions for receiving and transmitting prevent both of said first server and said second server from concurrently performing said takeover operation.
- 3. A memory as in claim 1, including instructions fordetermining, at said first server, a state for itself and for said second server in response to said communication path; determining, at said second server, a state for itself and for said first server in response to said communication path; whereby said first server and said second server concurrently each determine state for each other, such that it does not occur that each of said first server and said second server both consider the other to be inoperative.
- 4. A memory as in claim 1, also including an instruction for storing state information about said first server in a persistence memory, wherein said first server determines a state for itself in response to a state of said persistent memory.
- 5. A memory as in claim 1, including instructions fortransmitting, from said first server, recovery information relating to a status of said first server on recovery from a service interruption; and performing a giveback operation of at least part of said shared resource is responsive to said recovery information.
- 6. A memory, as in claim 1, including instructions fortransmitting, from said first server, recovery information relating to a status of said server on recovery from a service interruption; wherein said instructions for performing said takeover operation are responsive to said recovery information.
- 7. A memory as in claim 1, whereinsaid shared storage device includes a plurality of storage devices; and said communication path includes at least part of said storage devices; whereby loss of access to said part of said storage devices breaks said communication path.
- 8. A memory as in claim 1, including instructions fortransmitting at least one message from a first said server to a second said server, said message indicating that said first server is attempting said takeover; altering a state of said second server in response to said message; and in said altered state refraining from writing to said shared resource.
- 9. A memory as in claim 1, wherein said communication path includes a plurality of independent communication paths between said pair; and including instructions fornumbering said sequence of messages; determining, at each recipient, a unified order for messages delivered using different ones of said plurality of independent communication paths; and determining, at said first server, a state for itself and for said second server in response to a state of said shared resource and in response to a state of a persistent memory at said first server.
- 10. A memory as in claim 1, wherein said communication path includes a plurality of independent communication paths between said pair; and including instructions fornumbering said sequence of messages; determining, at each recipient, a unified order for messages delivered using different ones of said plurality of independent communication paths; transmitting substantially each message in said sequence on at least two of said plurality of independent communication paths, whereby there is no single point of failure for communication between said pair.
- 11. A method as in claim 1, wherein said communication path includes a plurality of independent communication paths between said pair; and including instructions fornumbering said sequence of messages; determining, at each recipient, a unified order for messages delivered using different ones of said plurality of independent communication paths; wherein said plurality of independent communication paths includes at least two of the group: a packet network, a shared element, a system area network.
- 12. A method as in claim 1, wherein said communication path includes a plurality of independent communication paths between said pair; and including steps fornumbering said sequence of messages; determining, at each recipient, a unified order for messages delivered using different ones of said plurality of independent commuication paths; wherein said steps for numbering include (a) determing a generation number in response to a service interruption and persistent memory for a sender of said message, and (b) providing said generation number in substantialy each message in said sequence.
Parent Case Info
This is a continuation of application Ser. No. 09/139,257, filed Aug. 25, 1998 now U.S. Pat. No. 6,119,244, now allowed.
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Continuations (1)
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Number |
Date |
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Parent |
09/139257 |
Aug 1998 |
US |
Child |
09/657388 |
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US |