Patent Application
20110004817
This application claims the benefit of Korean Patent Application No. 10-2009-0061143 filed on Jul. 6, 2009, the subject matter of which is hereby incorporated by reference.
The inventive concept relates to data storage devices and methods of operating same. More particularly, the inventive concept relates to cyclic redundancy check (CRC) management methods used when a protocol error does not occur in a serial advanced technology attachment (SATA) interface. The inventive concept also relates to a data storage device using this type of CRC management method.
The SATA interface is one type of conventionally understood storage interface protocol that may be used to effectively connect data storage devices with (e.g.) a host bus. In the SATA interface, a user (or payload) data file is divided into units of up to 8 KB and arranged in a frame information structure (FIS) including corresponding one cyclic redundancy check (CRC) code. The CRC code is derived (i.e., calculated) from the data contents of the FIS and then arranged within at least one of the units. The unit including the FIS and CRC code may then be transmitted to a host via a conventionally understood SATA bus. The receiving host then checks whether an error has occurred in the FIS based on the CRC code. If an error is detected, data transmission to the host is halted and an error notification is returned to a data storage device.
Since the CRC code is derived from the data contents of the FIS, it may be used to detect whether a protocol error has occurred during the transmission via the SATA bus. However, if a CRC error does not occur in the SATA interface but instead occurs in the content of the FIS due to some variation in temperature or power supply voltage in the data storage device, or due to some abnormality in a data transmission path, the content of the FIS in which the error is included is recognized as normal data.
The inventive concept provides a cyclic redundancy check (CRC) management method that may effectively be used when a protocol error does not occur in a serial advanced technology attachment (SATA) interface, but instead occurs in some other aspect of the data communication process using the SATA interface.
The inventive concept also provides a data storage device using this type of CRC management method.
According to an aspect of the inventive concept, there is provided a CRC management method performed in a SATA interface between a host and a data storage device, the CRC management method including: determining whether transmitted data includes a header of a data frame information structure (FIS) and a start of frame (SOF) primitive of a data frame to be transmitted to the host and transmitting the transmitted data; performing CRC computation on the transmitted data to generate a first CRC code; if an error is included in the transmitted data, generating a second CRC code that is different from the first CRC code; and selectively carrying the first CRC code or the second CRC code on the transmitted data and transmitting the frame including the transmitted data and one selected from the first CRC code and the second CRC code to the host.
The error included in the transmitted data may be a host interface block error that occurs in internal blocks of a host interface in the data storage device, a data integrity error that occurs along a data path inside the data storage device, an error that occurs during an incorrect operation of internal blocks of the data storage device due to a change in temperature or power supply, or an error that occurs when data of a bad block of a flash memory device used as a storage medium in the data storage device is read out and transmitted to a host interface.
The second CRC code may be generated by adding 1 to the first CRC code or inverting the first CRC code.
According to another aspect of the inventive concept, there is provided a data storage device including: a host interface executing a SATA protocol to communicate with a host, generating a first CRC code and transmitting transmitted data and the first CRC code to the host, and, if an error is included in the transmitted data, generating a second CRC code that is different from the first CRC code and transmitting the transmitted data and the second CRC code to the host; and a storage medium storing or reading data information in the DATA protocol in response to control signals generated from control information and command information that are analyzed by the host interface using the SATA protocol.
Embodiments of the inventive concept will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings in which:
In order to more fully understand operational advantages of the inventive concept and objects attained by embodiments of the inventive concept, the accompanying drawings illustrating exemplary embodiments of the inventive concept and details described in the accompanying drawings should be referred to.
Reference will now be made in some additional detail to certain embodiments of the inventive concept. Throughout the written description and drawings like reference numbers and labels are used to denote like or similar elements.
The host interface 110 enables the execution of the conventionally understood serial advanced technology attachment (SATA) protocol. This protocol allows the data storage device 100 to communicate (i.e., exchange data and corresponding control signals) with a host 200.
Referring to
Referring back to
For example, if output data including an error (where the error is due to operation of the data storage device 100) is communicated from the data storage device to the host 200, the host interface 110 will derive a second CRC code, instead of the first CRC code previously derived for the data when it was received as input data. This second CRC code is then communicated with the output data to the host 200.
In relation to a defined set of data, the second CRC code may be obtained by adding one (+1) to the first CRC code or inverting the first CRC code. However, the inventive concept is not limited to only these possible methods of deriving the second CRC code.
The host controller 120 generates control signals, such as command or address signals in accordance with the control and command information analyzed by the host interface 110. These control signals are passed to the buffer manager 130.
The buffer manager 130 controls access to the memory 150 using the memory interface 140. The memory 150 is configured to temporarily store the data information of the data-device to host FIS or the data-host to device FIS. The memory 150 may be implemented using one or more conventionally available memory device(s), such as static random access memory (SRAM) or dynamic random access memory (DRAM).
The buffer manager 130 also controls access to the media 180 using the media controller 170 and the media controller 160. The media 180 may be any type of storage medium capable of storing the data information of the data-device to host FIS or the data-host to device FIS. In one embodiment of the inventive concept, the media 180 may be implemented using one or more non-volatile memory device(s), such as flash memory.
As is conventionally understood, an error may occur during the operation of any one of the elements forming the data storage device 100. That is, any one of the host interface 110, the host controller 120, the buffer manager 130, the memory interface 140, the memory 150, the media controller 160, the media interface 170, and the media 180 may operate or interoperate in such a manner as to generate an error in the data being communicated. In some instances, an error may occur due to some variation in the operating temperature or some variation in the power supply voltage within the data storage device 100. When output data including such an error is communicated to the host interface 110 and then transmitted to the host 200 using the SATA protocol, the data storage device 100 of
If it is determined in operation 306 that the transmitted data is the last data, the method proceeds to operation 308. In operation 308, it is determined whether a host interface block error occurs in internal blocks of the host interface 110. If it is determined in operation 308 that a host interface block error occurs, the method proceeds to operation 310. In operation 310, the host interface 110 generates a second CRC code CRC 2 that is different from the first code CRC1. In operation 320, the host interface 110 carries an EOF primitive on the transmitted data and transmits the data frame including the transmitted data and the second CRC code CRC2 to the host 200.
If it is determined in operation 308, however, that no host interface block error occurs, the method proceeds to operation 312. In operation 312, the data storage device 100 determines whether a data integrity error occurs on a data path inside the data storage device 100. If it is determined in operation 312 that a data integrity error occurs, the method proceeds to operation 310. In operation 310, the host interface 110 generates the second CRC code CRC2 that is different from the first CRC code CRC1. In operation 320, the host interface 110 carries the EOF primitive on the transmitted data and transmits the data frame including the transmitted data and the second CRC code CRC2 to the host 200.
If it is determined in operation 312, however, that no data integrity error occurs, the method proceeds to operation 314. In operation 314, it is determined whether an error occurs during the operation of internal blocks of the data storage device 100, that is, the host interface 110, the host controller 120, the buffer manager 130, the memory interface 140, the memory 150, the media controller 160, the media interface 170, or the media 180 and it is determined whether the status of the data storage device 100 needs to be reported to the host interface 110. For example, in operation 314, if errors occur during an incorrect operation of the internal blocks of the data storage device 100 due to variation in temperature or power supply voltage, or if errors occur during the operation of the media 180 and data of a bad block in the flash memory device is read out and transmitted to the host interface 110, the status of each of the internal blocks of the data storage device 100 is reported to the host interface 110. In operation 310, the host interface 110 generates the second CRC code CRC2 that is different from the first CRC code CRC1. In operation 320, the host interface 110 carries the EOF primitive on the transmitted data and transmits the data frame including the transmitted data and the second CRC code CRC2 to the host 200.
If it is determined in operation 314, however, that the status of the data storage device 100 does not need to be reported to the host interface 110, the method proceeds to operation 316. In operation 316, the host interface 110 performs CRC computation on the transmitted data to generate the first CRC code CRC1. In operation 320, the host interface 110 carries the EOF primitive on the transmitted data and transmits the data frame including the transmitted data and the first CRC code CRC 1 to the host 200.
Accordingly, according to the CRC management method of
While the inventive concept has been particularly shown and described with reference to embodiments thereof, it will be understood that various changes in form and details may be made therein without departing from the scope of the following claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2009-0061143 | Jul 2009 | KR | national |
