Patent Application
20140022834
None
Modern antennas are designed to focus a radiated beam in a desired direction and suppress the beam in an undesired direction. While this can be achieved by mechanical means such as parabolic antenna or lens, there is a growing tendency to do this electronically because electronic beams can be steered quickly. Electronic beam forming is achieved by providing an array of circuit-elements that are physically spaced and radiate in varied relative phases and amplitudes such that the radiation pattern is reinforced in the desired direction and suppressed in the undesired direction. Such array elements (typically 64×64 elements or more) form a phased array. Each army element needs to be programmed to give the right phase and amplitude, thereby forming the desired beam pattern.
The array elements of phased array have built in memory (in form of buffers, latches or flip-flops) that need to be programmed. The memory in turns programs the array element to provide right phases and amplitudes. A shift register (or memory) for the array elements has a number of stages that are daisy chained in a FIFO (first-in-first-out) manner. The programming is achieved by sending an pre-arranged digital data stream (comprising “1s” and “0s”) though the daisy chain until all of the shift register stages are programmed with their intended values. This approach is highly favored in phased arrays because it avoids extra lines on the phased array's printed circuit board. However, it has a major drawback: it is not possible to address individual array element as they do not have respective unique digital addresses. Thus to program one array element, a long data stream must be supplied to fill up the entire daisy-chained shift register stages for the array. As a result the programming process is very slow.
Besides the phased array elements, there are additional electronic components that need to be programmed. Monolithic Integrated circuits (MICs, also known as chips or silicon ICs) include many circuits formed in a single piece of silicon. Typically MICs can be programmed to provide varying output performance. For example a synthesizer MIC (such as ADF4350 from Analog Devices, Inc., 3 Technology Way, Norwood, Mass. 02062), can generate many different frequencies depending upon a programmed counter value. Usually, an external microcontroller or microprocessor is used to program the counter value to provide the correct frequency. However, as ICs become ubiquitous there is a need to program ICs without the use of the expensive external components such as microcontroller or microprocessor.
Typically phased arrays have large number of elements in the form of Transmit and Receive modules. (T/R modules are also referred as array elements or active elements.) Such modules typically are arranged in an orthogonal or X-Y direction. For example the Terminal High Altitude Air Defense (THAAD) Radar (AN/TPY-2) has 25,000 active elements (see Principles of Modern Radar Vol 1 by M A. Richards, J. A Scheer, W. A Holm, Scitech Publishing Inc., 2010). During the operation of the radar it is highly desirable to access each of the array elements to control its phase and amplitude to form digital-beam steering. This can improve radar performance by improving search/detect, target tracking, and imaging. In addition beam steering and shaping can greatly enhance communication systems as well Such systems include the 60 GHz links demonstrated by SiBeam in 2009-2010 (SiBEAM, Inc., 555 N. Mathilda Ave., Sunnyvale, Calif. 94085).
Unique addressing of the active elements of array elements can be achieved by (1) an Electrically Erasable Programmable Read-Only Memory (EEPROM), and (2) fuses that are burned (opened), thereby to wire or hard-programmed the circuit. Each of these approaches is explained below and has a number of short comings.
In theory an EEPROM would work well as each chip can be programmed with a unique address. Unfortunately, many high frequency IC fabrication processes, such as SBC18HA (process from TowerJazz USA, a subsidiary of Jazz Semiconductor) and IBM's BiCMOS 8HP process (from IBM Systems and Technology Group) do not have an EEPROM option. Very often an EEPROM cell requires extra space, thereby taking up expensive area on the MIC.
Fuses are available as a process option for both SBC 18HA and IBM BiCMOS 8HP processes. Leaving the fuse connected could form a “1” and blowing the fuse a “0”, and by having a number of fuses, a unique address pattern in “1s” and “0s” can be programmed. Unfortunately, the fuses too have a limitation as they need a very high current to be blown. In addition, the fuses can occupy substantial space and are unreliable.
In addition, in big array there is a problem of replacement. When a part fails it needs to be replaced. For a 1024×1024 array few sites fail in a routine manner. These failures are related to mean time between failure statistics and for large arrays such failure becomes statistically more probable. The replacement process for the part can be very tedious and time consuming.
Prior approaches using microcontrollers or microprocessors is expensive, daisy chain programming of the array element is time consuming and inefficient, and EEPROM or fuses for assigning permanent memory states are not universally applicable. Thus we have found that heretofore there has not been any easy way to program the array elements of phased arrays.
This specification outlines methods and concepts such that a unique digital word can be created by proper choice of external components and used to control a digitally controllable circuit. Accordingly one or more aspects of the present system have the following advantages: A unique address for array element, a chip, circuit, or module is provided and made from an external location by a user-selected inexpensive part. Thus no internal memory or fuses are required to create a unique address for each army element. Since this approach avoids the use of microcontrollers and processors, it is very inexpensive. In a phased array application external resistors can be used to generate local address of the array component. Thus chips can be easily repaired when failure occurs since each chip is uniquely defined. Another advantage is that the address is non-volatile; it remains the same when the device is restarted and does not need to be reprogrammed.
Further advantages of various embodiments and aspects will be apparent from the ensuing description and drawings.
The present system relates generally to a circuit that creates a unique digital word useful for providing a unique digital address that can be stored and assigned to each element of a phased array. The assigned address can be used to individually access the array element and control it digitally. Thus, because each element has a unique address, all of the array elements can be connected in parallel to same programming lines without being daisy chained. Each array element can be accessed individually through its unique address.
A unique address is provided for each chip of an array by feeding a voltage from DC voltage supply to an external resistance ladder to create an analog voltage that is fed back into the chip. In the chip, the analog voltage is converted to a digital word using an analog-to-digital converter. The digital word is used by a digitally controllable circuit or active element to determine its state, including but not limited to its digital address.
Alternative, a component is placed outside of a chip. The value of the component creates a unique signature that falls in the range of a multitude of possibilities. Based on the unique signature, a unique bit sequence is selected by the chip as its unique address or state.
In another embodiment, a circuit that controls a digitally controllable component comprises a first circuit means that creates a unique analog signal and a second circuit means that convert the unique analog signal into a unique digital word, which then controls the digitally controllable component.
A supply voltage 105 (Vcc) supplies power for the circuit. A capacitor 104 is used to further stabilize the supply voltage. The supply voltage is fed to the top of a resistor chain comprising variable precision discrete resistors 101 and 102, thereby generating an analog voltage 106 (Van).
Voltage Van is fed to an Analog-to-Digital (A/D) converter 103. Converter 103 converts the analog voltage to a digital bit stream that is equivalent to its digital value. Typically A/D converters are made by bank of comparators elements (refer to The Art of Electronics, by P. Horowitz and W. Hill, Second Edition, Cambridge Press, 1989 pg 612-629). If the level is beyond a certain threshold a bit “1” is generated. For multiple bits, a number of comparisons are done with different levels generating a multiple bit word. The number of bits generated depends upon the number of comparison. In the preferred embodiment the A/D conversion results in eight bits but in general there can be any number of bits.
The digital bits may be stored in a digital buffer 111 composed of an array of digital latches (or flip-flops) in a chip register 107, which is part of circuit 108. Digital latches typically include a feedback circuit and are well known. This digital latch can be used for a number of purposes, including but not limited to controlling digitally controlled circuit 108 or using it as the digital address for the unit. Thus, by choosing the right values for discrete resistors 101 and 102, a prescribed value can be generated for Van, resulting in a prescribed digital word which is usable for controlling the digitally controllable circuit. Typically discrete resistors 101 and 102 are mounted on a surface of a printed-circuit broad and can attached using epoxy or solder.
Due to cost, it is advantageous to form all of the components shown in a single integrated circuit. A/D circuit 103 and digitally controllable circuit 108 can be integrated together to form a single package 110, either on same silicon chip (MIC) or as separate components packaged together (Hybrid IC). Such a part is usually packaged in a plastic package, including but not limited to a quad-flat no-lead (QFN) package. (See for example http://en.wikipedia.org/wiki/Quad-flat_no-leads_package). Thus a low-cost option is to have a single QFN and two external resistors.
To understand how the circuit works consider Vcc to be 3.1V. Further assume that the value for resistor 101 is 200 kilo-ohms (200 k) and resistor 102 is 101 k. Thus voltage Van is (3.1×200)/(101+200)=2V. In A/D converter 103 the 3.1 V is subdivided into 28−1 divisions or 255 divisions. Each division is thus (3.1/255) V in size. The first division goes from 0 to 12.157 mV, the second division from 12.157 mV to 24.314 mV, and so on. The 165th division goes from 1.993725 V to 2.005882 V. Since Van is 2 volts and it falls in 165th division, the A/D converter's output 165 in 8-bits, as well as the generated digital word from 2V, is [10100101]. This may be stored in chip register 108 and becomes the digital word to be used by the chip. By changing either or both of resistors 101 and 102 to vary Van, differing address can be generated. Thus each chip can be uniquely programmed or have a unique digital word based on the values of resistors 101 and 102.
In a phased array, the array elements can now be accessed individually as each has a unique address. The digital lines will first send a header containing the address followed by the command to set array element to its right state or configuration. The array element (or the chip) would logically combine or “AND” the header and stored address bit-by-bit. When the result is a “1” it accept the digital command; it will not accept it at any other time. Thus, the same digital line will be able to control any of the array elements.
Due to noise and resistance value inaccuracies, the number of bits that can be created from one set of resistors is limited. Typically, an eight-bit resolution can be achieved with high precision resistors and A/D converters; however, this can only address 64 elements. To address a greater number of elements multiple sets of resistors (like the set comprising resistors 101 and 102), multiple A/D converters, and multiple chip address registers can be connected in parallel. Each set of resistors can provide a unique eight-bit resolution. Thus we can provide the first two resistors to generate an eight-bit address and then next two generate another eight-bit address, and thereby providing sixteen bits or 64×64=65536 bits of addressing capability.
While the exact value of supply voltage, Vcc, is not important, it is important to use the same Vcc for the resistive ladder(s) and for the A/D converter(s). Since the A/D subdivides the Vcc range into subdivisions, each subdivision is proportional to Vcc. Similarly Van is also proportional to Vcc. Thus a change in Vcc does not change the digital word.
To understand how the circuit works consider that unique ID creating circuit 204 is capacitance meter and unique components 201 and 202 are two different capacitors. Since the capacitance meter would determine the capacitance value of components 201 and 202 based on the value it can generate two unique digital word corresponding to each of the capacitance value. Although just one example of device is cited here, it is possible to use many different types of unique devices with a corresponding unique ID-creating circuit. Further each of the unique components can be a combination of two different components, such as a resistor and a capacitor. Clearly there are a number of possibilities and many well know measurement methods can be used with each of the unique components.
Thus it is seen that I have provided that a unique digital word can be created by proper choice of external components and used to control a digitally controllable circuit. Accordingly one or more aspects of the present system have the following advantages: A unique address for a chip, circuit or module is provided and made externally by a user-selected inexpensive part. Thus no internal memory or fuses are required to create a unique address for an array element. Since this approach avoids the use of microcontrollers and processors, it is very inexpensive. In a phased array application external resistors can be used to generate local address of the array component, thereby simplifying array programming.
While the above description contains many specificities, these are given by way of example and can be varied. For example, although the preferred embodiment uses two external resistors with voltage as reference, there are alternative ways for doing this. First instead of voltage a current source can be used with external resistors to help in diverting that current and determining a ratio. Although it will likely consume more current, the approach is less prone to noise. Similarly while the preferred approach uses two resistors outside of the chip, it is possible to use only one resistance. With one external component to create the voltage Van, we would need another resistor inside the chip. Since the resistor inside the chip would have lower accuracy, the number of bits would decrease. Thus the concepts can be realized in variety of ways.
Therefore the scope should be determined by the appended claims and their legal equivalents and not by the specifics given.
This application claims the benefit of provisional patent application Ser. No. 61/409,878, filed 2010 Nov. 3 by the present inventor.
Missile Defense Agency contract HQ0006-10-C-7397
| Number | Date | Country | |
|---|---|---|---|
| 61409878 | Nov 2010 | US |
