Claims
- 1. An apparatus comprising:a circuit board; a plurality of termination resistors mounted on the circuit board; and a socket connector mounted on the circuit board, the socket connector being electrically coupled to the termination resistors, the socket connector having: a card-edge receiving area to receive a card-edge of a circuit card; and a plurality of opposing signal pins within the card-edge receiving area, at least some of the plurality of opposing signal pins being coupled to respective termination resistors of the plurality of termination resistors, and the opposing signal pins being in contact with each other when no card-edge is present in the card-edge receiving area, and the opposing signal pins being separated from each other when the card-edge is present in the card-edge receiving area such that the electrical coupling of the termination resistors and the socket connector is disconnected when the card-edge is inserted.
- 2. The apparatus of claim 1 whereinthe card-edge includes a plurality of signal contacts such that each signal pin of the plurality of signal pins contacts one signal contact of the signal contacts when the card edge is inserted in the card edge receiving area, each signal contact of the signal contacts being one of a conductive pad and a null contact.
- 3. The apparatus of claim 1 wherein the circuit card includes memory.
- 4. The apparatus of claim 1 wherein the circuit card includes a processor.
- 5. The apparatus of claim 1 wherein the card-edge is adapted for the card-edge receiving area, wherein the card-edge has one of:conductive pads on a first side and null contacts on an opposing side; conductive pads and null contacts on the first side and conductive pads on the opposing side; and conductive pads on the first side and conductive pads on the opposing side.
- 6. The apparatus of claim 1 whereinthe circuit card has a first side and an opposing side, each of the first side and the opposing side having a corresponding conductive surface; and the circuit card electrically couples the conductive surface of each of the first side and the opposing side to a circuit board signal of the circuit board through the opposing signal pins when the circuit card-edge is inserted into the card-edge receiving area.
- 7. The apparatus of claim 1, whereinthe plurality of opposing signal pins includes: a first plurality of adjacent pairs of opposing signal pins aligned in at least a first dimension; and a second plurality of adjacent pairs of opposing signal pins aligned with the first plurality in at least a second dimension, the second dimension being perpendicular relative to the first dimension.
- 8. The apparatus of claim 7 whereinthe circuit card when inserted into the receiving area physically separates the opposing signal pins of each adjacent pair of the first plurality from each other and physically separates the opposing signal pins of each adjacent pair of the second plurality from each other.
- 9. The apparatus of claim 1 further comprising:a bus that is electrically coupled to the opposing signal pins of the socket connector.
- 10. The apparatus of claim 9 whereina bus signal of the bus is connected via the opposing signal pins such that a bus signal of the bus reaches the termination resistors when no card-edge is present.
- 11. The apparatus of claim 9 whereinthe insertion of the card-edge into the card-edge receiving area adds additional circuitry to the bus while maintaining continuity of the bus.
- 12. The apparatus of claim 9 whereinthe insertion of the card-edge into the socket connector electrically couples a bus signal of the bus to the circuit card.
- 13. The apparatus of claim 12 whereinthe insertion of the card-edge into the socket connector electrically disconnects the bus signal from the termination resistors.
- 14. The apparatus of claim 1 whereinthe socket connector is a first socket connector of a plurality of socket connectors, wherein each socket connector of the socket connectors is mounted on the circuit board; and at least one of the socket connectors is electrically coupled to the termination resistors; and further comprising: a plurality of signal lines electrically coupling the first socket connector in series to at least a second socket connector of the socket connectors, each signal line of the signal lines being electrically coupled to the first and second socket connectors when no card-edge is present.
- 15. The apparatus of claim 14 whereinthe plurality of signal lines is a memory bus.
- 16. The apparatus of claim 14 whereinthe plurality of signal lines is a processor bus.
- 17. The apparatus of claim 1 whereinthe socket connector is a first socket connector of a plurality of socket connectors; the first socket connector holds a processor; and each socket connector of the socket connectors is electrically coupled to a processor bus signal of a processor bus for the processor.
- 18. A computer system comprising:at least a first processor; a memory coupled to the first processor; a circuit board coupled to the at least a first processor and the memory; a plurality of termination resistors mounted on the circuit board; and a socket connector mounted on the circuit board, the socket connector being electrically coupled to the termination resistors, the socket connector having: a card-edge receiving area to receive a card-edge of a circuit card; and a plurality of opposing signal pins within the card-edge receiving area, at least some of the plurality of opposing signal pins being coupled to respective termination resistors of the plurality of termination resistors, and the opposing signal pins being in contact with each other when no card-edge is present in the card-edge receiving area, and the opposing signal pins being separated from each other when the card-edge is present in the card-edge receiving area such that the electrical coupling of the termination resistors and the socket connector is disconnected when the card-edge is inserted.
- 19. The computer system of claim 18 whereinthe card-edge includes a plurality of signal contacts such that each signal pin of the plurality of signal pins contacts one signal contact of the signal contacts when the card edge is inserted in the card edge receiving area, each signal contact of the signal contacts being one of a conductive pad and a null contact.
- 20. The computer system of claim 18 wherein the circuit card includes the memory.
- 21. The computer system of claim 18 wherein the circuit card includes the first processor.
- 22. The computer system of claim 18 wherein the card-edge is adapted for the card-edge receiving area, wherein the card-edge has one of:conductive pads on a first side and null contacts on an opposing side; conductive pads and null contacts on the first side and conductive pads on the opposing side; and conductive pads on the first side and conductive pads on the opposing side.
- 23. The computer system of claim 18 whereinthe circuit card has a first side and an opposing side, each of the first side and the opposing side having a corresponding conductive surface; and the circuit card electrically couples the conductive surface of each of the first side and the opposing side to a circuit board signal of the circuit board through the opposing signal pins when the circuit card-edge is inserted into the card-edge receiving area.
- 24. The computer system of claim 18 whereinthe plurality of opposing signal pins includes: a first plurality of adjacent pairs of opposing signal pins aligned in at least a first dimension; and a second plurality of adjacent pairs of opposing signal pins aligned with the first plurality in at least a second dimension, the second dimension being perpendicular relative to the first dimension.
- 25. The computer system of claim 24 whereinthe circuit card when inserted into the receiving area physically separates the opposing signal pins of each adjacent pair of the first plurality from each other and physically separates the opposing signal pins of each adjacent pair of the second plurality from each other.
- 26. The computer system of claim 18 further comprising:a bus that is electrically coupled to the opposing signal pins of the socket connector.
- 27. The computer system of claim 26 whereina bus signal of the bus is connected via the opposing signal pins such that a bus signal of the bus reaches the termination resistors when no card-edge is present.
- 28. The computer system of claim 26 whereinthe insertion of the card-edge into the card-edge receiving area adds additional circuitry to the bus while maintaining continuity of the bus.
- 29. The computer system of claim 26 whereinthe insertion of the card-edge into the socket connector electrically couples a bus signal of the bus to the circuit card.
- 30. The computer system of claim 29 whereinthe insertion of the card-edge into the socket connector electrically disconnects the bus signal from the termination resistors.
- 31. The computer system of claim 18 whereinthe socket connector is a first socket connector of a plurality of socket connectors, wherein each socket connector of the socket connectors is mounted on the circuit board; and at least one of the socket connectors is electrically coupled to the termination resistors; and further comprising: a plurality of signal lines electrically coupling the first socket connector in series to at least a second socket connector of the socket connectors, each signal line of the signal lines being electrically coupled to the first and second socket connectors when no card-edge is present.
- 32. The computer system of claim 31 whereinthe plurality of signal lines is a memory bus.
- 33. The computer system of claim 31 whereinthe plurality of signal lines is a processor bus.
- 34. The computer system of claim 18 whereinthe socket connector is a first socket connector of a plurality of socket connectors; the first socket connector holds a processor; and each socket connector of the socket connectors is electrically coupled to a processor bus signal of a processor bus for the processor.
Parent Case Info
This is a division of application Ser. No 09/128,554, filed Aug. 3, 1998 now abandoned.
US Referenced Citations (21)