Patent Application
20090134394
This application is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2007-305325, filed Nov. 27, 2007, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a crystal silicon array, and a manufacturing method of a thin film transistor. More particularly, it relates to a manufacturing method of a thin film transistor for use in a liquid crystal display, an organic EL display or the like, and a crystal silicon array suitable for the formation of the thin film transistor.
2. Description of the Related Art
A driving circuit of a display such as a liquid crystal display is usually formed by an amorphous semiconductor film formed on a glass substrate. With the enlargement of an IT market, information to be handled is digitized, and the processing of the information is speeded up. Hence, the high image quality of such a display has been demanded. To satisfy this demand, for example, there is known a means which forms a switching transistor for switching respective pixels by using a crystal semiconductor so that the switching can be speeded up and the high image quality can be achieved.
As a technique of crystallizing an amorphous silicon layer formed on the glass substrate, an excimer laser annealing process (the ELA process) is known. Crystals obtained by this ELA process have very small grain diameters of about 0.1 μm. Therefore, the transistor cannot be formed only in one single crystal, and a thin film transistor (TFT) has to be formed in a crystallized region constituted of a plurality of single crystals. In the case of the thus formed thin film transistor, a number of crystal grain boundaries are included in a channel region of this transistor. Consequently, the thin film transistor has a low field effect mobility of about 100 cm2/Vs, which is noticeably poor as compared with that of an MOS transistor (more than 800 cm2/Vs) formed on single-crystal silicon (Si).
To improve the mobility of the thin film transistor, various investigations have heretofore been made. For example, in a sequential lateral solidification (SLS) process, a phenomenon referred to as super lateral growth is utilized to obtain crystals having large grain diameters in excess of 1 μm (e.g., Appl. Phys. Lett., Vol. 69, p. 2864 to 2866, 1996). The crystals having such large grain diameters can improve the mobility of the thin film transistors formed in the respective crystals, but they have a disadvantage that the growth directions of the crystals fluctuate to make the characteristics of the thin film transistors uneven.
To eliminate this disadvantage, elongate crystals having grain boundaries mainly in parallel with a channel direction are disclosed (e.g., Jpn. J. Appl. Phys., Vol. 41, L311, 2002). According to the above elongate crystals, the problems of the mobility and the uneven characteristics can be solved. However, in a future circuit such as a so-called system-on-glass circuit in which a peripheral circuit is formed on one glass plate, or in a current driving type device, it is demanded that the unevenness of the characteristics is further decreased.
To further improve the mobility of the thin film transistor and decrease the unevenness of the characteristics, it is preferable to employ a structure in which a plurality of transistors are arranged in one crystal grain, that is, a pair transistor structure. As the size of one crystal grain necessary for this structure, a size of about 5 μm square which has heretofore been reported is insufficient.
An object of the present invention is to provide a crystal silicon array including a plurality of crystals having such large grain diameters that a plurality of thin film transistors can be arranged in one crystal grain.
According to one aspect of the present invention, there is provided a crystal silicon array having a crystallized unit region obtained by crystallizing at least a part of a non-single crystal semiconductor film,
wherein the crystallized unit region includes at least one square two-dimensional crystal portion having a size of 7 μm square or more, and at least one needle crystal portion having a grain length of 3.5 μm or more.
According to another aspect of the present invention, there is provided a manufacturing method of a thin film transistor by positioning a transistor device so that at least one channel is put in the two-dimensional crystal portion of the crystal silicon array according to the one aspect of the invention.
In the present application, each crystallized unit region of a crystal silicon array obtained by crystallizing an amorphous silicon thin film includes a two-dimensional crystal portion having such a size including a square region of 7 μm square or more, and a needle crystal portion having a grain length of 3.5 μm or more. Therefore, when the thin film transistors are formed by positioning transistor devices in the two-dimensional crystal portion, for example, a pair transistor structure can be realized in which a plurality of transistors are arranged in one crystal grain. In other words, according to the present invention, it is possible to realize a crystal silicon array including crystals having such large grain diameters that permit arranging the plurality of thin film transistors in one crystal grain.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.
The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the invention, and together with the general description given above and the detailed description of the embodiments given below, serve to explain the principles of the invention.
Hereinafter, a size of each crystal grain necessary for realizing a pair transistor structure and a basic concept of the present invention will be described, prior to the detailed description of an embodiment of the present invention. For example, in a crystal liquid display, a display panel is practically used in which an amorphous silicon film is formed on a glass substrate as an insulator, and a thin film transistor circuit is then formed by this amorphous silicon film. With digitization in an electron industry field, a high speed operation has been demanded, and the thin film transistor circuit of the high speed operation formed on a polycrystal silicon thin film has been put to practical use.
However, the polycrystal silicon thin film is constituted of polycrystal grains, and hence a plurality of grain boundaries or boundary lines are present in a channel region of each of the formed thin film transistors. The number of the boundary lines present in the channel region of each thin film transistor varies, and therefore, when holes and electrons move, grain boundaries of the micro crystal grains become barriers. Consequently, mobility characteristics of the thin film transistors vary, with the result that such characteristics of the thin film transistor circuit as designed cannot be obtained.
To solve this problem, the present applicant has developed an industrial crystallization technology in which each crystal grain larger than the channel region of the thin film transistor is positioned in a desired position to grow the grain. This crystallization technology is a technology of modulating pulse laser light from excimer laser into an arrangement pattern of a light intensity distribution in the state of a plurality of inverse peak patterns to irradiate the amorphous silicon film, whereby the amorphous silicon film in an irradiated region is melted to form regions of the crystals having large grain diameters in a temperature lowering period after the block of the pulse laser light.
In the thus formed regions of the crystals having the large grain diameters, transistor devices are positioned to form the thin film transistors, whereby the thin film transistor circuit having uniform characteristics can be formed. Examples of the thin film transistor circuit include pair transistor circuits such as a CMOS circuit and a multivibrator circuit, and in each of such circuits, the thin film transistors which perform opposite operations are connected to each other to form a pair. In this pair of transistors, it is demanded that the thin film transistors which perform the opposite similar operations be formed in the crystallized regions having the same characteristics.
On the other hand, it has been found that when the crystallized regions are formed by the above crystallization technology, different defect patterns are generated in the respective crystal grains. Therefore, it has been found that when one thin film transistor is formed in each crystal grain to form the pair transistor circuit, the pair transistor circuit having desired characteristics cannot be formed. Furthermore, it has been found that the thin film transistors which perform the opposite operations have to be formed in the same crystal grain. It has also been found that the crystallized region necessary for forming the thin film transistors for the pair transistor circuit has a size of 7 μm square or more as described hereinbelow.
At present, mobilities of a usual low-temperature polysilicon are about 100 cm2/Vs in an n-channel (n-ch), and about 50 cm2/Vs in a p-channel (p-ch). Channel sizes corresponding to this mobility usually are a width Wn=about 5 μm in the n-ch, and a width Wp=about 10 μm in the p-ch. In a crystal silicon array formed in the present invention, the mobilities are improved to about 300 cm2/Vs in the n-ch, and about 100 cm2/Vs in the p-ch. As dimensions of the channels corresponding to such mobilities, as shown in
When the p-channel having a width Wp=6 μm or more and the n-channel having a width Wn=2 μm or more are arranged in one crystal grain, the channels are vertically or laterally arranged in accordance with a purpose, and therefore a square grain having a size of 7 μm square or more is necessary as shown in
It has been found that the micro crystal portion 22 for allowing the growth of the square crystal grain of 7 μm square or more needs to have a length of 0.2 μm or more. Each two-dimensional crystal portion 21 is formed by the growth of one crystal nucleus, and has a main growth direction of the crystals as shown by an arrow F1. The micro crystal portion 22 is formed between the pair of two-dimensional crystal portions 21, and has a length of 0.2 μm or more along the main growth direction F1. One group of the needle crystal portions 23 are formed between the pair of spaced two-dimensional crystal portions 21 in the main growth direction F1 by the growth along a direction crossing the main growth direction F1 of the two-dimensional crystal portion 21 at right angles.
To stably prepare the two-dimensional crystal portion 21 having a large area, investigation of enlarging a process margin is necessary. We have investigated a light intensity distribution by use of a phase modulation element to develop a technique by which only one nucleus grows in a two-dimensional region. According to this technique, as described later, even when a light intensity fluctuates, a single growth nucleus can appear in any portion of the micro crystal portion 22 having a length of 0.2 μm or more, and to secure this appearance, a micro crystal portion region having a length of 0.2 μm or more is provided.
In the present invention, laser crystallization is performed so that a crystallizing position can two-dimensionally be controlled, by a method of controlling the light intensity distribution of laser light with the phase modulation element. In a case where the phase modulation element is used, the light intensity distribution can more precisely be controlled, as compared with a case where a metal mask is used. Moreover, as understood from
That is, as shown in
On the other hand, as shown in
On the other hand, for usual laser crystallization, pulse laser such as excimer laser is used, and a pulse width per pulse is a short time of about 30 ns. To form the crystals having large grain diameters, it is necessary to lengthen a laser pulse waveform. For this purpose, for example, the laser light is effectively split into a plurality of light beams to create an optical path difference. In practice, as described later, the pulse width can be extended as much as about ten times by use of a multiple reflective optical system in which a plurality of partial reflective plates are arranged.
As described above, to obtain the crystals having large grain diameters of 7 μm square or more, the laser pulse width needs to be extended so that the single growth nucleus (a crystal nucleus) can be generated to grow the crystals from the nucleus over a sufficient time. Moreover, in the present invention, to stably generate the single growth nucleus with satisfactory reproducibility even in a case where the light intensity distribution fluctuates, the elongate micro crystal portions 23, that is, nucleus forming portions are provided.
In consequence, even when the light intensity fluctuates, the single growth nucleus is surely generated in any portion of the elongate nucleus forming portion 23, and the crystals can two-dimensionally grow from this nucleus. In the present invention, to secure an environment where the single growth nucleus can be generated and further secure a long distance of the crystal growth as described above, the pulse width has to be extended. In a phase modulation process, a crystal growth time in a lateral direction can be extended. When optimum long pulse light corresponding to this is applied, the crystal silicon array having large grain diameters can be realized.
The embodiment of the present invention will be described with reference to the drawings.
A structure and a function of the light modulation element 1 will be described later. The illumination system 2 includes an XeCl excimer laser light source 2a which supplies the pulse laser light having a wavelength of, for example, 308 nm. As this light source 2a, another appropriate light source such as a KrF excimer laser light source or a YAG laser light source having a function of emitting an energy ray which fuses the processing target substrate 4 may be used. The laser light supplied from the light source 2a enters a first fly-eye lens 2c via a waveform control section 2b. A structure and a function of the waveform control section 2b will be described alter.
Thus, a plurality of small light sources are formed on a rear focal plane of the first fly-eye lens 2c, and an incidence plane of a second fly-eye lens 2e is illuminated with the light fluxes from the plurality of small light sources via a first condenser optical system 2d in a superimposing manner. Consequently, more small light sources are formed on a rear focal plane of the second fly-eye lens 2e than those on the rear focal plane of the first fly-eye lens 2c. The light modulation element 1 is illuminated with the light fluxes from the plurality of small light sources formed on the rear focal plane of the second fly-eye lens 2e via a second condenser optical system 2f in a superimposing manner.
The first fly-eye lens 2c and the first condenser optical system 2d constitute a first homogenizer. This first homogenizer uniforms the laser light emitted from the light source 2a in relation to an incidence angle on the light modulation element 1. Moreover, the second fly-eye lens 2e and the second condenser optical system 2f constitute a second homogenizer. This second homogenizer uniforms the laser light having the uniformed incidence angle from the first homogenizer in relation to a light intensity at each in-plane position on the light modulation element 1.
The emitted laser light subjected to the phase modulation by the light modulation element 1 enters the processing target substrate 4 via the image forming optical system 3. Here, a phase pattern plane of the light modulation element 1 and the processing target substrate 4 are arranged at optically conjugate positions of the image forming optical system 3. In other words, the processing target substrate 4 (strictly an irradiation target surface of the processing target substrate 4) is set to a plane (an image plane of the image forming optical system 3) which is optically conjugate with the phase pattern plane of the light modulation element 1.
The image forming optical system 3 includes, for example, a positive lens group 3a, a positive lens group 3b, and an aperture stop 3c arranged between these lens groups. A size of an opening portion (a light transmitting portion) of the aperture stop 3c (i.e., an image-side numerical aperture NA of the image forming optical system 3) is set to generate a necessary light intensity distribution on the semiconductor film (the irradiation target surface) of the processing target substrate 4. The image forming optical system 3 may be a refractive optical system, a reflective optical system, or a refractive/reflective optical system.
The processing target substrate 4 is obtained by forming a lower layer insulating film, a non-single crystal semiconductor thin film and an upper layer insulating film in this order on a glass substrate. More specifically, in the present embodiment, the processing target substrate 4 is formed by successively forming a base insulating film, a non-single crystal semiconductor film (e.g., an amorphous silicon film), and a cap film on, for example, a liquid crystal display glass plate by a chemical vapor deposition (CVD) method. Each of the base insulating film and the cap film may be an insulating film, for example, an SiO2 film. The base insulating film prevents foreign particles, for example, Na in the glass substrate from entering the amorphous silicon film when the amorphous silicon film directly comes into contact with the glass substrate, and further prevents heat of the amorphous silicon film from being directly transmitted to the glass substrate.
The amorphous silicon film is a semiconductor film to be crystallized. The cap film is heated by a part of a light beam which enters the amorphous silicon film, and stores heat having a temperature realized by this heating. A temperature in a high-temperature portion on an irradiation target surface of the amorphous silicon film is relatively rapidly lowered when the incidence of the light beam is interrupted. However, this thermal storage effect alleviates this temperature-down gradient, and promotes lateral crystal growth with large grain diameters. The processing target substrate 4 is positioned and held at a predetermined position on the substrate stage 5 by a vacuum chuck or an electrostatic chuck.
The total reflection mirror M is installed behind the partial transmission mirror MR7 having the reflection ratio R7. An optical path length between the adjacent mirrors is 4500 mm. In
The transmission and reflection of the pulse laser light by the seven partial transmission mirrors MR1 to MR7 are performed as follows. That is, the light transmitted through the first partial transmission mirror MR1 enters the second partial transmission mirror MR2, and the light reflected by the first partial transmission mirror MR1 is guided to the first fly-eye lens 2c (not shown in
The light transmitted through the n-th partial transmission mirror MRn enters the n+1-th partial transmission mirror MRn+1, and the light reflected by the n-th partial transmission mirror is guided to the first fly-eye lens 2c via n−1-th, n−2-th, . . . first partial transmission mirrors MRn−1, MRn−2, . . . MR1. It is to be noted that the light transmitted through the seventh partial transmission mirror MR7 is reflected by the total reflection mirror M, and is guided to the first fly-eye lens 2c via the seventh, sixth, first partial transmission mirrors MR7, MR6, . . . MR1.
When such transmission and reflection by the partial transmission mirrors are repeated, a pulse width is expanded, and the irradiation time of the processing target substrate 4 is extended. Consequently, at a time when the temperature of the silicon film reaches the maximum temperature, heat more than that in a case where the pulse width is not expanded is diffused from the silicon film to the cap film and the base SiO2 layer, and these film temperatures rise. In consequence, the cooling speed of the silicon film is retarded, the fusing time of the silicon film extends, and a crystal growth distance extends. Consequently, the crystals having large grain diameters can be obtained.
On the other hand, in a case where such control of the waveform of the pulse laser light is not performed, an only small amount of heat is diffused in the cap film and the base SiO2 layer at the time when the temperature of the silicon film reaches the maximum temperature. Therefore, the cooling speed of the silicon film is high as compared with a case where the waveform is controlled. Therefore, the fusing time of the silicon film shortens, and the crystal growth distance shortens. To show these behaviors,
As described above, with respect to the phase value of 0 degree as a reference, +60 degrees indicate phase advance, and −60 degrees indicate phase delay. Moreover, the pitches of the strip-like regions 1A and 1B are 5 μm in terms of the image plane of the image forming optical system 3. In other words, in the strip-like regions 1A and 1B, the square cells (the unit regions) having a size of 1 μm×1 μm in terms of the image plane of the image forming optical system 3 are vertically and laterally arranged, for example, 5 cells×11 cells are densely arranged. Here, the size of 1 μm×1 μm of each cell in terms of the image plane of the image forming optical system 3 is set to a size smaller than the radius of the point image distribution range of the image forming optical system 3.
In the first strip-like region 1A, the occupying area ratio (i.e., an area ratio between the regions 1Aa and 1Ab in each cell) of the region 1Aa in each cell changes along the pitch direction of the strip-like region (a direction crossing a boundary line between the strip-like regions 1A and 1B at right angles: the horizontal direction in the drawing), and the ratio changes along a pitch orthogonal direction crossing the strip-like region pitch direction at right angles (a direction along the boundary line between the strip-like regions 1A and 1B: a vertical direction in the drawing). More specifically, the occupying area ratio of the region 1Aa along the strip-like region pitch direction is smallest in the center of the strip-like region 1A, and increases toward both ends of the region.
The occupying area ratio of the region 1Aa along the pitch orthogonal direction of the strip-like region is largest in the center of the strip-like region 1A, and decreases toward both the ends of the region. In other words, in the strip-like region 1A, a first specific place having the largest occupying area ratio of the region 1Aa in the cell as the unit region is present adjacent to the grain boundary of boundary line, the occupying area ratio of the region 1Aa decreases away from the first specific place along the pitch orthogonal direction, and the ratio decreases away from the first specific place in the pitch direction.
Similarly, in the strip-like region 1B, the occupying area ratio (i.e., an area ratio between the regions 1Ba and 1Bb in each cell) of the region 1Ba in each cell changes along the pitch direction of the strip-like region, and the ratio changes along the pitch orthogonal direction of the strip-like region. More specifically, the occupying area ratio of the region 1Ba along the strip-like region pitch direction is smallest in the center of the strip-like region 1B, and increases toward both the ends of the region. On the other hand, the occupying area ratio of the region 1Ba along the pitch orthogonal direction of the strip-like region is largest in the center of the strip-like region 1B, and decreases toward both the ends of the region. In other words, in the strip-like region 1B, a second specific place having the largest occupying area ratio of the region 1Ba in the cell as the unit region is present adjacent to the boundary line, the occupying area ratio of the region 1Ba decreases away from the second specific place along the pitch orthogonal direction, and the ratio decreases away from the second specific place in the pitch direction.
In the present embodiment, a light intensity distribution is formed as shown in
In
When the non-single crystal semiconductor film of the processing target substrate 4 is irradiated with the light having the light intensity distribution shown in
Needle elongate crystal grains 14 linearly extending along the horizontal direction of the drawing grow from a plurality of crystal nuclei formed on the right and left sides of the non-fusing region 12a in the drawing. The two-dimensional crystal grains 13 of
In each of the two-dimensional crystal grains 13, channels of an n-channel transistor and a p-channel transistor are formed. In this case, as shown in the drawing, two channels formed in the upper two-dimensional crystal grain 13 are formed to extend in a crystal growth direction (the F2 direction), and two channels formed in the lower two-dimensional crystal grain 13 are formed to extend in a direction crossing the crystal growth direction at right angles. Such channels are arbitrarily arranged, and the channels formed in all or some of the two-dimensional crystal grains may extend in the crystal growth direction or the direction crossing the crystal direction at right angles.
In
As described above, according to the present embodiment, an array of two-dimensional crystal portions having a size incorporating a 7 μm square region can stably be formed. Therefore, in a case where the thin film transistor is formed so that the transistor is aligned with the two-dimensional crystal portions of the crystal silicon array formed by the present embodiment, for example, the pair transistor structure is realized, the mobility of the thin film transistor is improved, and the characteristic fluctuations can further be decreased.
In this manner, as shown in
In the above-mentioned steps, the transistor is formed in accordance with the positions of the large crystals of the polycrystal semiconductor film or the single-crystallized semiconductor film 84 formed in the steps shown in
In the above embodiment, the crystallization of the amorphous silicon thin film as the non-single crystal semiconductor thin film has been described. However, even when the present invention is applied to the crystallization of a polycrystal semiconductor thin film constituted of crystal grains having a size of 7 μm square or less, a similar effect can be obtained.
Additional advantages and modifications will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details and representative embodiments shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2007-305325 | Nov 2007 | JP | national |
