1. Field of the Invention
The present invention relates to current amplifiers and transmitters.
2. Description of the Related Art
Nowadays, the need for high data-rate and long distance transmission is emerging in modern communication systems. As a consequence, a high speed and high linear transmitter is more and more important. A current-steering digital-to-analog converter (DAC) is a good candidate for implementing a high speed and high resolution transmitter, but it is difficult to design a sole current mode DAC to satisfactorily operate with both large output swings and low distortions at high operating frequencies.
Current amplifiers and transmitters using the current amplifiers are disclosed. In the disclosed transmitter, a current amplifier of the disclosure is coupled to a current mode DAC to reduce the output swing of the DAC without affecting the transmission efficiency.
A current amplifier in accordance with an exemplary embodiment of the invention comprises at least two transistors and at least two impedance circuits. The first transistor has a gate coupled to a former-stage circuit, a drain coupled to a current source, and a source biased at a constant voltage level. The second transistor has a gate coupled to the current source and has a source and a drain. The first impedance circuit is coupled between the gate of the first transistor and the source of the second transistor. The second impedance circuit is coupled between the source of the second transistor and a ground terminal. The current amplifier receives an input current from the former-stage circuit and generates an output current at the drain of the second transistor. Note that no current source is connected to the source of the first transistor. Further, in another exemplary embodiment, a transmitter comprising the current amplifier and a single-ended digital-to-analog converter is disclosed. The single output of the single-ended digital-to-analog converter is coupled to the gate of the first transistor of the current amplifier. The design of the transmitter is a single ended design.
In another exemplary embodiment, a current amplifier in a pseudo-differential structure is disclosed, which comprises: at least four transistors and at least four impedance circuits. The first-first transistor has a gate coupled to a positive output terminal of a former-stage circuit, a drain coupled to a first current source, and a source biased at a constant voltage level. The first-second transistor has a gate coupled to the first current source and has a source and a drain. The first-first impedance circuit is coupled between the gate of the first-first transistor and the source of the first-second transistor. The first-second impedance circuit is coupled between the source of the first-second transistor and a ground terminal. The second-first transistor has a gate coupled to a negative output terminal of the former-stage circuit, a drain coupled to a second current source, and a source biased at the constant voltage level. The second-second transistor has a gate coupled to the second current source and has a source and a drain. The second-first impedance circuit is coupled between the gate of the second-first transistor and the source of the second-second transistor. The second-second impedance circuit is coupled between the source of the second-second transistor and the ground terminal. According to the disclosed structure, the current amplifier receives a positive input current and a negative input current from the former-stage circuit at the gate of the first-first transistor and the gate of the second-first transistor, respectively, and generates a negative output current and a positive output current at the drain of the first-second transistor and the drain of the second-first transistor, respectively. Note that no current source is connected to the source of the first-first transistor and no current source is connected to the source of the second-first transistor. Further, in another exemplary embodiment, a transmitter comprising the pseudo-differential current amplifier and a differential digital-to-analog converter is disclosed. The differential digital-to-analog converter has a positive output terminal coupled to the gate of the first-first transistor of the current amplifier and has a negative output terminal coupled to the gate of the second-first transistor of the current amplifier. The transmitter is in a differential structure.
A detailed description is given in the following embodiments with reference to the accompanying drawings.
The present invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:
The following description shows several exemplary embodiments carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims.
The transistors M1 and M2 and the impedance structures Zo, Zi and Zs form a negative feedback loop. Thus, the node X is AC grounded—just a very small AC signal, due to loop gain, exists. Thus, Vi=−Iin*Zi, and Io=(Vi/Zs)−Ii=·[(−Ii*Zi)/Zs−Iin]. A current gain, (1+Zi/Zs), between Ii and Io is generated.
Note that no current source is connected to the source of the transistor M1. The voltage level of the source of the transistor M1 is kept constant by a constant voltage bias rather than a common mode bias design. Thus, the disclosed current amplifier works well in single ended applications.
In
In comparison to
In comparison to
Implementation of the impedance circuits of
Further, a pseudo differential current amplifier is disclosed based on the circuit of
Next, the left part of the circuit of
The constant voltage level, biasing the source of the transistor M11 and the source of the transistor M21, is not limited to the ground level or the voltage level V (=I*R). Any constant voltage biasing circuit without connecting any current source to the source of the transistor M12 and the source of the transistor M22, is also within the scope of the invention. Because no active device is required at the source of the transistor M11 and the source of the transistor M21, the disclosed pseudo current amplifiers guarantees low noise and high bandwidth when applied to transmission operations.
In accordance with an exemplary embodiment of the invention,
While the invention has been described by way of example and in terms of the preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
Number | Name | Date | Kind |
---|---|---|---|
5451901 | Welland | Sep 1995 | A |
7292097 | Taylor | Nov 2007 | B2 |
7312662 | Roo et al. | Dec 2007 | B1 |
7459895 | Tokumitsu et al. | Dec 2008 | B2 |
7876158 | Chow et al. | Jan 2011 | B2 |
8791758 | Foroudi | Jul 2014 | B1 |
20080310046 | Menegoli | Dec 2008 | A1 |
20100148871 | Lee et al. | Jun 2010 | A1 |
20100330938 | Yin | Dec 2010 | A1 |
20130082776 | Sugimoto | Apr 2013 | A1 |
Entry |
---|
Niknejad, Ali; Lecture notes 26, slide 12, EE105 Fall 2007, UC Berkeley. |
Padilla, Ivan, R; “Quiescent Current Control Circuit for Class AB Amplifiers”, Ph.D. Thesis submitted to the department of Electrical Engineering of New Mexico State University, Las Cruces, New Mexico, May 2007. |
Gupta, T., et al.; “A Sub-2W 10GBASE-T Analog Front-End in 40nm CMOS Process;” IEEE International Solid-State Circuits Conference; Session 24; 10GBase-T and Optical Frontends; 2012; pp. 410-412. |
Gerfers, F., et al.; “A 16-Port FCC-Compliant 10GBASE-T Transmitter and Hybrid with 76dBc SFDR up to 400MHz Scalable to 48 Ports;” IEEE International Solid-State Circuits Conference; Session 24; 10GBase-T and Optical Frontends; 2012; pp. 412-414. |
Fan, T.Y., et al.; “A 0 11mmΛ2 150mW 10G Base-T Transmitter in 28nm CMOS Process;” 2015; pp. 1-4. |
Number | Date | Country | |
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20140361836 A1 | Dec 2014 | US |