This disclosure relates generally to the field of voltage supplies for electronic equipment, and specifically to linearly regulated voltage supplies.
Contemporary optical communications and other photonic systems make extensive use of photonic integrated circuits that are advantageously mass-produced in various configurations for various purposes.
In one aspect, a current-balanced linear voltage source may include a first regulated linear voltage source, a second regulated linear voltage source, and a differential amplifier having a positive differential input, a negative differential input, a positive differential output, and a negative differential output. The first regulated linear voltage source may include a first linear voltage source having an input and an output, and a first amplifier operable to receive a control voltage at a first positive input and a first feedback voltage at a first negative input. An output of the first amplifier may be electrically coupled to the input of the first linear voltage source. The second regulated linear voltage source may include a second linear voltage source having an input and an output, and a second amplifier operable to receive a control voltage at a second positive input and a second feedback voltage at a second negative input. An output of the second amplifier may be electrically coupled to the input of the second linear voltage source. The output of the first linear voltage source may be electrically coupled to the output of the second linear voltage source and operable to supply a current to an electrical load. The positive differential input of the differential amplifier may be electrically coupled to the output of the first linear voltage source. The negative differential input of the differential amplifier may be electrically coupled to the output of the second linear voltage source. The positive differential output of the differential amplifier may be operable to provide the first feedback voltage of the first regulated linear voltage source. The negative differential output of the differential amplifier may be operable to provide the second feedback voltage of the second regulated linear voltage source.
In one aspect, a current-balanced linear voltage source system may include a plurality of regulated linear voltage sources. Each of the plurality of regulated linear voltage sources may include a linear voltage source having an input and an output and an amplifier operable to receive a control voltage at a positive input and a feedback voltage at a negative input. An output of the amplifier may be electrically coupled to the input of the linear voltage source, and the outputs of the linear voltage sources may include the plurality of regulated linear voltage sources that are mutually electrically coupled and operable to supply a current to an electrical load. Additionally, the current-balanced linear voltage source system may include a control circuit, which may be composed of a plurality of control inputs and a plurality of control outputs. Each of the plurality of control inputs may be electrically coupled to one of the plurality of linear voltage source outputs of the plurality of regulated linear voltage source. Each of the plurality of control outputs may provide a feedback voltage to, and may be electrically coupled to, one of the negative inputs of the plurality of regulated linear voltage sources.
Although, the disclosure relates to different aspects and aspects, it is understood that the different aspects and embodiments disclosed herein can be integrated, combined, or used together as a combination system, or in part, as separate components, devices, and systems, as appropriate. Thus, each embodiment disclosed herein can be incorporated in each of the aspects to varying degrees as appropriate for a given implementation. Further, the various apparatus, resistors, amplifiers, digital to analog or analog to digital converter circuits, sample and hold circuits, inputs, outputs, ports, channels, components, and parts of the foregoing disclosed herein can be used with any laser, laser-based communication system, ASIC, photonic integrated circuit, tuner, waveguide, fiber, transmitter, transceiver, receiver, and other devices and systems without limitation.
These and other features of the applicant's teachings are set forth herein.
Unless specified otherwise, the accompanying drawings illustrate aspects of the innovations described herein. Referring to the drawings, wherein like numerals refer to like parts throughout the several views and this specification, several embodiments of presently disclosed principles are illustrated by way of example, and not by way of limitation. The drawings are not intended to be to scale. A more complete understanding of the disclosure may be realized by reference to the accompanying drawings in which:
The following merely illustrates the principles of the disclosure. It will thus be appreciated that those skilled in the art will be able to devise various arrangements which, although not explicitly described or shown herein, embody the principles of the disclosure and are included within its spirit and scope. More particularly, while numerous specific details are set forth, it is understood that embodiments of the disclosure may be practiced without these specific details and in other instances, well-known circuits, structures and techniques have not be shown in order not to obscure the understanding of this disclosure.
Furthermore, all examples and conditional language recited herein are principally intended expressly to be only for pedagogical purposes to aid the reader in understanding the principles of the disclosure and the concepts contributed by the inventor(s) to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions.
Moreover, all statements herein reciting principles, aspects, and embodiments of the disclosure, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future, i.e., any elements developed that perform the same function, regardless of structure.
Thus, for example, it will be appreciated by those skilled in the art that the diagrams herein represent conceptual views of illustrative structures embodying the principles of the invention.
In addition, it will be appreciated by those skilled in art that any flow charts, flow diagrams, state transition diagrams, pseudocode, and the like represent various processes, which may be substantially represented in computer readable medium and so executed by a computer or processor, whether or not such computer or processor is explicitly shown.
In the claims hereof any element expressed as a means for performing a specified function is intended to encompass any way of performing that function including, for example, a) a combination of circuit elements which performs that function or b) software in any form, including, therefore, firmware, microcode or the like, combined with appropriate circuitry for executing that software to perform the function. The invention as defined by such claims resides in the fact that the functionalities provided by the various recited means are combined and brought together in the manner which the claims call for. Applicant thus regards any means which can provide those functionalities as equivalent as those shown herein. Finally, and unless otherwise explicitly specified herein, the drawings are not drawn to scale.
Thus, for example, it will be appreciated by those skilled in the art that the diagrams herein represent conceptual views of illustrative structures embodying the principles of the disclosure.
By way of some additional background, it is appreciated that electronic circuits (loads) require stable voltage and current supplies for their operations. Typically, two types of voltage supplies are known: linear voltage supplies and switch mode voltage supplies. Both the linear voltage supply and switch mode voltage supply rely on an output series transistor to source the output current to the load. For the linear voltage supply, the current supplied by the output series transistor is regulated by an amplifier with appropriate feedback control. The switch mode voltage supply uses a digital clock to activate the transistor and control the output current. Typically, the switch mode voltage supply is able to supply a greater amount of current to the load because the output transistor sources current only briefly, due to the clocking circuit, and therefore does not overhead. The linear voltage supply has the output transistor running constantly, and therefore the output current must be controlled to prevent transistor overheating. However, while the typical switch mode voltage supply is able to supply more current than the typical linear voltage supply, the output of the switch mode voltage supply requires significant filtering to remove frequencies associated with the control clock and its harmonics. Some circuit applications that require significant current may be highly sensitive to voltage supply noise. Therefore, there is a need for a high current, very low noise, linear voltage supply.
In one solution, multiple linear voltage supplies may be coupled in parallel so that their individual output currents may add while the supplies all have the same output voltages. However, when two or more regulators operate in parallel without extra feedback control loop, a mismatch between the two regulator circuits (components tolerances, temperature coefficient, internal offsets and so forth) may create an imbalance between the two regulators output voltages, which may lead to an imbalance between the output currents of the two. This imbalance may result in a serious imbalance and some cases may result in an over-load condition and/or result in excessive thermal dissipation as one regulator could source the majoring of the current to the load.
It may be recognized that the linear voltage sources 100a,b may be inherently stable without the variable control voltage (supplied by Vdac). However, the potential time dependent changes of Vdac may lead to Vout instability unless additional feedback is included.
As depicted in
It may be understood that a regulated linear voltage source, such as regulated linear voltage source 202 depicted in
In some configurations, current Iset from Vcntl may flow directly into feedback amplifier 220, thereby eliminating resistors Rset and Rx from the linear voltage source 200. In view of Eq. (1), above, G(s) may be taken as the product of the amplifier gain Z2/Z1 and the voltage divider proportionality value Rset/(Rx+Rset) when Rx=0 and Rset approaches infinity. Under these conditions, Rset/(Rx+Rset) approaches 1 as Rset approaches infinity, so G(s) approaches the amplifier gain Z2/Z1.
As disclosed above, a configuration to increase the current output of a regulated linear voltage source may include connecting multiple regulated linear voltage sources in parallel. It has been noted that simply connecting the outputs of the multiple regulated linear voltage sources together may result in unequal loading on the voltage sources. It is therefore useful to include a feedback component that assures that the output of each regulated linear voltage source contributes equally to the total current supplied to the output load.
Both regulated linear voltage sources 402a,b also have amplifiers, 422a,b, respectively, that operate similarly to amplifier 222 in
Alternatively, feedback impedance elements Z1, Z2, Z′1, and Z′2 may comprise one or more impedance elements including, for example, one or more resistors, capacitors, or combination thereof. In generally, these impedance elements will be taken as resistors unless otherwise explicitly disclosed. It may be recognized that feedback impedance element Z2 of regulated linear voltage source 402a may have the same impedance value as feedback impedance element Z′2 of regulated linear voltage source 402b. Further, feedback impedance element Z1 of regulated linear voltage source 402a may have the same impedance value as feedback impedance element Z′1 of regulated linear voltage source 402b. However, it may be recognized that equivalent impedance elements Z1 and Z′1, and Z2 and Z′2 may differ in their respective impedance values.
The total current sourced to the load, Iout, is the sum of the current supplied by regulated linear voltage source 402a and regulated linear voltage source 402b. The output current from each regulated linear voltage source may be determined by relative values of the balancing resistors, Rbal0 and Rbal1.
As depicted in
ΔVo1=Ad*ΔVin1 Eq. (2)
−ΔVo2=Ad*(−ΔVin2) Eq. (3)
ΔVou=Vou1−Vou2=ΔVin1−(−ΔVin2) Eq. (4)
ΔV0=ΔVo1−(−ΔVo2)=Ad*ΔVou Eq. (5)
where Ad is the gain of differential amplifier 526. Additionally, ΔVin1 is the positive input to differential amplifier 526 (compared to ground), −ΔVin2 is the negative input to differential amplifier 526 (compared to ground), ΔVo1 is the positive output from differential amplifier 526 (compared to ground), and −ΔVo2 is the negative output from differential amplifier 526 (compared to ground).
For the “positive” regulated branch, corresponding to regulated linear voltage source 402a in
and from Eq. 2,
ΔVo1=Ad*ΔVin1
The summer 523 of the positive branch combines the feedback voltage, ΔVo1=Vƒb with the control voltage Vdac similar to summer 323 as depicted in
Similarly, for the “negative” regulated branch, corresponding to regulated linear voltage source 402b in
In which the open loop gain G′(s) may similarly be defined as
It may be understood that G′(s) may equal G(s), and that the equivalent component, Z2 and Z′2, Z1 and Z′1, Rset and R′set, and Rx, and R′x, may have the same values. Alternatively, G′(s) may not equal G(s), and the equivalent component, Z2 and Z′2, Z1 and Z′1, Rset and R′set, and Rx, and R′x, may not have the same values.
From Eq. (3), it may be understood
−ΔVo2=Ad*(−ΔVin2)
In which the inverted input results in an inverted output of the differential amplifier 526. For current balancing between the two branches, Iou1 should equal Iou2. Thus, for
and
then Iou1−Iou2=Vou1−Vou2=0, for Rou1=Rou2.
Therefore, from Eq. (6) and Eq. (7)
if G(s)=G′(s). If the equivalent component of G(s) and G′(s)—Z2 and Z′2, Z1 and Z′1, Rset and R′set, and Rx, and R′x,—have the same values, then
As noted above for the current balancing, it is desirable to have Iou1=Iou2. Thus,
For ΔI=Iou1−Iou2,
The variability in ΔI due to the resistors, is thus
which reduces to
We may consider that the tolerances of resistors Rou1 and Rou2 are primarily due to manufacturing variables, which are independent of the individual resistor. Therefore, we can take
and therefore
which leads to
This implies that the variability in the balance of the output currents of the two branches of the current-balanced linear voltage source is equivalent to the tolerance or variability in the output resistors. As a non-limiting example, if the output resistors have a tolerance of about 1%, then the variability in the balancing of the output current between the two branches will also be about 1%.
It may be recognized that the stability of the control loop depends on the location of the poles and zeroes of the regulators and the feedback Z2/Z1. In general, it is desired to set Ad (the differential amplifier gain) close to 1. For the case of a dominant pole in the regulator's dynamic then:
where A(s) is the regulator gain and ωp is the dominant pole. In general, for a feedback loop
In this case, the feedback loop dominant pole will be A·ωp.
The circuit may include two regulators connected in parallel as depicted in
In the top plot, I(Rbal0)−I(Rbal1) is the difference between the output currents of the two regulators. It can be seen, under steady state conditions (see 630a, 630c, and 63f), that the difference in the output currents of the two regulators is only a few micro-amps. During the transitions of Vdac (see 630b, 630d, and 630e), it may reach +/−1.28 mA, depending on the negative or positive slope of the Vdac transition. This implies that the current balancing of the two regulators is maintained tightly during the transitions and returns to a well-balanced state when the control voltage stabilizes. Similarly, the difference in output voltages of the regulators—V(vou1)−V(vou2) differ by less than 1 μV when control voltage Vdac is in a steady-state condition. During the transition in Vdac, V(vou1)−V(vou2) may be about +/−12.85 mV depending on the slope of the Vdac transition.
In summary, the simulations show that current balancing was achieved. Without the feedback loop, when the control voltage (at the resistors Rx and R′x) of the two regulators was set to the same value, one regulator drew almost 4A, while the second regulator drew only few milliamps. This emphasizes the importance of the current balancing.
It may be understood that more than two regulated linear voltage sources can be combined in parallel to form a high current, low noise current-balanced linear voltage source. In such cases, the overall feedback feature may be effected by a control circuit receiving the outputs of each of the regulated linear voltage sources, and sourcing the required feedback voltage to each of the regulated linear voltage sources in turn.
The current-balanced linear voltage source depicted in
Thus, in general, a current-balanced linear voltage source may be composed of multiple linear voltage sources, in which each linear voltage source has an input and an output, and an amplifier (623a through 623n) operable to receive a control voltage Vdac at a positive input and a feedback voltage Vfba through Vfbn at a negative input. The output of each the amplifiers Vx1 through Vxn may be electrically coupled to the input of the linear voltage source, the outputs of each of the linear voltage sources may be mutually electrically coupled and operable to supply a current to an electrical load. There is also a control circuit 640 composed of a plurality of control inputs Vi1 through Vin, in which each of the control inputs is electrically coupled to one of the linear voltage source outputs. Thus, for example, control input Vi1 may be coupled to voltage source output Vou1, Vi2 may be coupled to voltage source output Vou2, through Vin which may be coupled to voltage source output Voun. Control circuit 640 may also include an additional input to receive the voltage Vout. Additionally, the control circuit 640 may include a plurality of control outputs, ΔVo1 through ΔVon, in which each of the control outputs provides a feedback voltage—Vfb1 through Vfbn, respectively—electrically coupled to one of the negative inputs of the regulated linear voltage sources. Thus, as an example, output voltage ΔVo1 may source feedback voltage Vfb1 to amplifier 623a, output voltage ΔVo2 may source feedback voltage Vfb2 to amplifier 623b, through output voltage ΔVon which may source feedback voltage Vfbn, to amplifier 623n.
It may be recognized that the total output current Iout is the sum of the currents sourced by each of the n multiple linear voltage sources, or
For proper current balancing, all n of the Ioux should be equal. Thus
It may be recognized that Vout is the voltage that is developed by the current Iout sourced through the load resistance RL. If all n of the Ioux are equal, then each Ioux equals Iout/n. If all output resistors, Roux, have the same value (Rou) then
Therefore, for each linear voltage source i,
As disclosed above, control circuit 640 may receive n voltage inputs Vi1 through Vin one voltage input from the output of each of the multiple regulated linear voltage sources, as well as an input from the Vout voltage. The n+1 voltage inputs may be coupled to an n+1−input analogue-to-digital converter (ADC). The n+1−input ADC may be configured to digitize the analog voltage input from each of the n+1 voltage inputs (Vi1 through Vin plus Vout) into n+1 digitized input signals. The n+1 digitized input signals may then be used as inputs to a calculation unit to calculate the required feedback voltages. The calculation unit may be any type of calculating unit capable of performing the required calculations.
In one non-limiting example, the calculating unit may include a digital signal processing (DSP) unit comprising a processor unit and a memory unit that may store instructions and data for use by the processor unit. Such instructions may be related to the calculations of the various values disclosed below. Such data may also be derived from various input values related to measured voltages as further disclosed below. The calculating unit may calculate a value of a feedback voltage for each of the n regulated linear voltage sources. A digital-to-analog converter (DAC) may be used to convert the digital values of the feedback voltages into the n analog feedback voltages Vfb. Additional components of the control circuit 640 may include one or more timing clocks, amplifiers, filters, and sample-and-hold components as may be required for proper functioning.
The control circuit 640 may receive each of the n output voltages, Vou1 through Voun, of the n regulated linear voltage sources. The control circuit may also receive the total output voltage, Vout, developed by the passing of the total output current Iout through the load resistance RL. The n+1 channel ADC may convert the received analog voltages into digital representations of the voltages. The DSP unit may calculate a digital value of an average voltage, Vav, from the digital representations of the output voltages of the n regulated linear voltage sources. The difference between Vav and Vout (ΔV, or system voltage difference) may be calculated as well. For each regulated linear voltage source i, the DSP unit may also calculate a linear voltage difference between Vout and the output voltage of the ith regulated linear voltage source (Voui). Each linear voltage difference may be called ΔVj. A digital representation of each feedback voltage, Vfbi or regulated linear voltage difference, may then be calculated as ΔVi−ΔV. As noted above, a well balanced linear voltage supply composed of n individual regulated linear voltage sources in parallel may be characterized as having the voltage and current output of each of the regulated linear voltage sources being essentially the same. In such a case, the outputs of all of the regulated linear voltage sources are identical and thus equal to the average voltage output. It may be understood that a regulated linear voltage source having its voltage output equal to the average voltage of the ensemble of regulated linear voltage sources should require 0V feedback.
Once the calculations for the Vfbi are made by the DSP, the digital DSP values may be transferred to an n-channel digital-to-analog converter (DAC) to convert the digital representation of the feedback voltages into analog voltages. The analog voltages may be sourced by the control circuit 640 at the analog output lines ΔVo1 through ΔVon. As indicated in
As disclosed above, the control circuit 640 may be composed of a control voltage generator circuit comprising several digital and/or mixed digital/analog circuits, solely analog components, or a combination of analog and digital components.
Having thus described several aspects and embodiments of the technology of this application, it is to be appreciated that various alterations, modifications, and improvements will readily occur to those of ordinary skill in the art. Such alterations, modifications, and improvements are intended to be within the spirit and scope of the technology described in the application. It is, therefore, to be understood that the foregoing embodiments are presented by way of example only and that, within the scope of the appended claims and equivalents thereto, inventive embodiments may be practiced otherwise than as specifically described. In addition, any combination of two or more features, systems, articles, materials, and/or methods described herein, if such features, systems, articles, materials, and/or methods are not mutually inconsistent, is included within the scope of the present disclosure.
In most embodiments, a processor may be a physical or virtual processor. In other embodiments, a virtual processor may be spread across one or more portions of one or more physical processors. In certain embodiments, one or more of the embodiments described herein may be embodied in hardware such as a Digital Signal Processor DSP. In certain embodiments, one or more of the embodiments herein may be executed on a DSP. One or more of the embodiments herein may be programmed into a DSP. In some embodiments, a DSP may have one or more processors and one or more memories. In certain embodiments, a DSP may have one or more computer readable storages. In many embodiments, a DSP may be a custom designed ASIC chip. In other embodiments, one or more of the embodiments stored on a computer readable medium may be loaded into a processor and executed.
Also, as described, some aspects may be embodied as one or more methods. The acts performed as part of the method may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than illustrated, which may include performing some acts simultaneously, even though shown as sequential acts in illustrative embodiments.
The phrase “and/or,” as used herein in the specification and in the claims, should be understood to mean “either or both” of the elements so conjoined, i.e., elements that are conjunctively present in some cases and disjunctively present in other cases.
As used herein in the specification and in the claims, the phrase “at least one,” in reference to a list of one or more elements, should be understood to mean at least one element selected from any one or more of the elements in the list of elements, but not necessarily including at least one of each and every element specifically listed within the list of elements and not excluding any combinations of elements in the list of elements. This definition also allows that elements may optionally be present other than the elements specifically identified within the list of elements to which the phrase “at least one” refers, whether related or unrelated to those elements specifically identified.
The terms “approximately” and “about” may be used to mean within ±20% of a target value in some embodiments, within ±10% of a target value in some embodiments, within ±5% of a target value in some embodiments, and yet within ±2% of a target value in some embodiments. The terms “approximately” and “about” may include the target value.
In the claims, as well as in the specification above, all transitional phrases such as “comprising,” “including,” “carrying,” “having,” “containing,” “involving,” “holding,” “composed of,” and the like are to be understood to be open-ended, i.e., to mean including but not limited to. The transitional phrases “consisting of” and “consisting essentially of” shall be closed or semi-closed transitional phrases, respectively.
Where a range or list of values is provided, each intervening value between the upper and lower limits of that range or list of values is individually contemplated and is encompassed within the disclosure as if each value were specifically enumerated herein. In addition, smaller ranges between and including the upper and lower limits of a given range are contemplated and encompassed within the disclosure. The listing of exemplary values or ranges is not a disclaimer of other values or ranges between and including the upper and lower limits of a given range.
The use of headings and sections in the application is not meant to limit the disclosure; each section can apply to any aspect, embodiment, or feature of the disclosure. Only those claims which use the words “means for” are intended to be interpreted under 35 USC 112, sixth paragraph. Absent a recital of “means for” in the claims, such claims should not be construed under 35 USC 112. Limitations from the specification are not intended to be read into any claims, unless such limitations are expressly included in the claims.
Embodiments disclosed herein may be embodied as a system, method or computer program product. Accordingly, embodiments may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, micro-code, etc.) or an embodiment combining software and hardware aspects that may all generally be referred to herein as a “circuit,” “module,” or “system.” Furthermore, embodiments may take the form of a computer program product embodied in one or more computer readable medium(s) having computer readable program code embodied thereon.
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