Patent Application
20050057233
1. Field of the Invention
The present invention relates to a current control circuit, semiconductor device, and image pickup device into which the current control circuit and semiconductor device are incorporated. More specifically, the present invention relates to appropriately control motors which are used as actuators for controlling a lens of the image pickup device such as actuators for zooming, focusing and iris controlling.
2. Description of the Related Art
In order to obtain the phase information of a coil used for a motor which conducts lens control of an image pickup device, a hall element is used. The sensitivity of the hall element, which determines an intensity of voltage detected by the hall element according to a change in the magnetic field received by the hall element, is adjusted by adjusting an intensity of the current, which is made to flow in the hall element. However, the characteristic of the hall element greatly depends on each product. Further, the characteristic of the hall element is changed by the external environment such as an atmospheric temperature. Therefore, in order to maintain the hall element characteristic constant, it is necessary to adjust an intensity of the current, which is made to flow in the hall element, each time the electric power source is started.
Explanations will be made into a related-art current adjusting method of adjusting an intensity of the current which is made to flow in the hall element. In the related art, an intensity of the current is adjusted as follows. As shown in
In the case where NMOS 5 is operated in the saturated region, the following equation is established.
Vg=Vgs+R3 Ω×Ids (Equation 1)
where the gate voltage of NMOS 5 is Vg, the voltage between the gate and source of NMOS 5 is Vgs, the current flowing between the drain and source of NMOS 5 is Ids, and the resistance of resistor R3 is R3 Ω.
In the saturated region, the fundamental operating equation of a transistor is expressed as follows.
Ids=K(Vgs−Vt)2 (Equation 2) (K: Constant)
Therefore, according to Equations 1 and 2, the following equation is established.
Vg=Vgs+R3 Ω×K(Vgs−Vt)2 (Equation 3)
Since Vg, R3 Ω and Vt are constants, Vgs can be calculated. In this case, in Equation 1, R3 Ω×Ids is potential VA at point A. Therefore, an intensity of the current flowing in the hall element 6 is determined by potential VA at point A, which is determined by the gate voltage of NMQS 5, and by resistance R3.
Next, descriptions will be made into the necessity that resistor R3 is connected to the source side of NMOS 5. As described above, an intensity of the current flowing in the hall element 6, which is a load, is determined by potential VA at point A and resistance R3 Ω of resistor R3. Equation I=(VA/R3 Ω) is established, wherein the intensity of the current at point A is I. Since the characteristic of the hall element is sharp, control can be conducted by a step width of a minute intensity of the current. Therefore, resistor R3 is necessary to adjust an intensity of the current made to flow in the hall element. The resistance value of resistor R3 must be somewhat high.
Next, descriptions will be made into the necessity of dividing the potential of the digital signal which is sent from CPU of the image pickup device. In the case shown in the drawing, the potential is divided by resistors R1 and R2. In order to linearly operate DAC 7 with high accuracy, it is preferable that the power source voltage 8 (AVDD) of DAC 7 is high, because the occurrence of miscode can be prevented. However, since the sensitivity of the hall element 6 is high and the characteristic of the hall element 6 is sharp, control is conducted by a step width of a minute current. When the resistance value of resistor R3 is R3 Ω and the intensity of the current at point A is I, the equation I=(VA/R3 Ω) is established. Therefore, in order to conduct controlling by a step width of a minute current, it is necessary that the potential of the step width of the output voltage of DAC 7 is divided and level-shifted to voltage appropriate for controlling the hall element 6. For the above reasons, the output voltage of DAC 7 is divided.
Next, problems caused by resistor R3 will be described below, and problems caused when potential is divided by resistors R1 and R2 will be also described below. When a high intensity of the current is made to flow in the hall element 6, potential VA at point A is raised by the voltage generated by the current flowing in resistor R3, and voltage (Vds) between the drain and source of NMOS 5 is compressed. The potential from the voltage on the drain side of NMOS 5 to the ground via resistor R3 necessarily becomes lower than the power source voltage 8 since the hall element 6 is connected to it. In this case, in order to simplify the explanations, it is assumed that the potential from the drain side of NMOS 5 to the ground via resistor R3 must be fixed at ½ AVDD which is ½ of the power source voltage 8. As shown in
When the potential is divided by resistors R1 and R2, as shown in
In view of the actual circumstances described above, the present invention has been accomplished to solve Problems “a” and “b” described before. A first object of the present invention is to provide a current control circuit in which an intensity of the current supplied to a load such as a hall element is adjusted by an accurate and minute step width; no compression is caused in the bias voltage of the current control element connected to the hall element; and it is unnecessary to divide the potential so as to obtain a control voltage for operating a current control element such as NMOS. A second object of the present invention is to provide a semiconductor device into which the above current control circuit is incorporated. A third object of the present invention is to provide an image pickup device on which the above semiconductor device is mounted.
In order to achieve the first object of the present invention, there is provided a current control circuit, according to a first aspect of the present invention, comprising:
Further, to achieve the first object of the present invention, there is provided a current control circuit, according to a second aspect of the present invention, comprising:
To achieve the first object of the present invention, there is provided a current control circuit, according to a third aspect of the present invention, comprising:
In the current control circuit according to one of the first to third aspects of the present invention, according to a fourth aspect of the present invention, the current control element is NMOS.
In the current control circuit according to the first aspect of the present invention, according to a fifth aspect of the present invention, each of the first and second current control elements is NMOS, the control terminal of each of the first and second current control elements is gate of NMOS, the terminal of the second current control element on the power source side is drain of NMOS, the impedance element is resistor, and the first current control element has a drain of NMOS connected to the load.
In the current control circuit according to one of the first to fifth aspects of the present invention, according to a sixth aspect of the present invention, the load is a hall element.
In the current control circuit according to one of the first to sixth aspects of the present invention, according to a seventh aspect of the present invention, an output voltage sent from DAC is inputted into the inversion input terminal of the operational amplifier.
In order to achieve the second object of the present invention, there is provided a semiconductor device, according to an eighth aspect of the present invention, comprising a current control circuit according to one of the first to seventh aspects of the present invention.
In order to achieve the third object of the present invention, there is provided an image pickup device, according to a ninth aspect of the present invention, comprising: a semiconductor device according to the eighth aspect of the present invention; and a hall element connected to the semiconductor device.
A low voltage operation can be realized in which it is not necessary to divide the potential of the output signal sent from CPU of the image pickup device, an intensity of the current made to flow in the hall element can be accurately controlled even in the case of a reduction of electric power, and the power source voltage connected to the hall element is not higher than the related-art power source voltage.
In the present invention, as shown in
For example, when a digital signal for decreasing an intensity of the current flowing in the hall element 16 is inputted from CPU of the image pickup device into the inversion input terminal of the operational amplifier 14 via DAC 15, the output voltage of the operational amplifier 14 is low as compared with a case in which a digital signal for increasing the intensity of the current flowing in the hall element 16 described later is sent from CPU of the image pickup device, and the gate voltage of NMOS 12 and the gate voltage of NMOS 13 are increased a little. Therefore, a low intensity of the current flows in the hall element 16 compared with a case in which the digital signal is sent from CPU of the image pickup device so as to increase the intensity of the current of the hall element 16 described later. In this connection, at this time, an intensity of the current flowing in resistor R11 is decreased, and the voltage (VR2) generated by resistor R11 is decreased as compared with a case before a change in the input from CPU of the image pickup device. The voltage of (AVDD 17−VR2−Vds) is inputted into the non-inversion input terminal of the operational amplifier 14. Therefore, the operational amplifier 14 is subjected to feedback control and operated stably. In order to increase an intensity of the current flowing in the hall element 16, a digital signal of a high voltage is inputted from CPU of the image pickup device into the inversion input terminal of the operational amplifier 14 via DAC 15. Then, the output voltage of the operational amplifier 14 is greatly amplified. Alternatively, compared with the aforementioned case in which the digital signal to decrease an intensity of the current flowing in the hall element 16 is inputted, a high output is outputted from the operational amplifier 14, and the gate voltage of NMOS 12 and the gate voltage of NMOS 13 are increased. Therefore, compared with the aforementioned case in which a digital signal to decrease the intensity of the current flowing in the hall element 16 is sent from CPU of the image pickup device, a high intensity of the current flows. In this connection, at this time, an intensity of the current flowing in resistor R11 is also increased, and the voltage (VR2) generated by resistor R11 is increased. The voltage of (AVDD 17−VR2−Vds) is inputted into the non-inversion input terminal of the operational amplifier 14, and the operational amplifier is subjected to feedback control and operated stably.
Next, how the above problems “a” and “b” have been solved will be described below while a comparison is being made between the current control circuit of the present invention and the related-art current control circuit.
Resistor R3, which is provided for adjusting an intensity of the current flowing in the hall element 6 in the related-art current control circuit shown in
In the related-art current control circuit shown in
In the current control circuit of the present invention, according to the above effects 1 and 2, compared with the current control circuit shown in
In the current control circuit of the present invention shown in
In this connection, a ratio of the gate area of NMOS 13 to the gate area of NMOS 12 of the current control circuit of the present invention is set at 5:1, however, it should be noted that the present invention is not limited to the above specific ratio. The ratio of the gate area of NMOS 13 to the gate area of NMOS 12 can be appropriately changed according to the intensity of the current which is made to flow in the hall element 16.
The current control circuit of the present invention is singly incorporated being sealed, and formed into a semiconductor device. Alternatively, the current control circuit of the present invention is incorporated together with another circuit having another function being sealed, and formed into a semiconductor device.
In the drawing, an image of the subject to be imaged is converted into digital data by CCD 104 and ADC 105 via the zoom lens 101, focus lens 102 and iris 103. The thus converted digital data is processed by the image processing section 106 and then displayed by the display section 108. The storing section 110 or the external storing medium body 112 stores an image processed by the image processing section 106. The semiconductor device provided with the current control circuit of the present invention is arranged in the lens driver section, and the hall elements H1, H2, H3 respectively send signals showing the states of the zoom lens 101, focus lens 102 and iris 103. When these signals are received by the lens driver, the zoom lens 101, focus lens 102 and iris 103 are controlled.
In this image pickup device, it is possible to reduce a power source voltage used for the hall element. Therefore, the power consumption can be reduced.
It should be noted that the present invention is not limited to the above specific embodiments. All variations made by those skilled in the art within the range described in the claim are included in the present invention. For example, MOS type transistor may be replaced with a bipolar transistor. The input signal into the operational amplifier is not necessarily limited to the control voltage which is an output of DAC, and the load is not limited to the hall element. It is possible to employ the constitution in which the inversion input terminal and the non-inversion input terminal of the operational amplifier are reversed to each other and an inverter are connected to the output. Of course, the semiconductor device of the present invention is applied to not only an image pickup device but also a video image pickup device or a vehicle, the operation of which is electrically controlled.
| Number | Date | Country | Kind |
|---|---|---|---|
| P. 2003-304084 | Aug 2003 | JP | national |
| P. 2004-183336 | Jun 2004 | JP | national |
