Current drive circuit

Abstract

A current driver circuit includes a DA conversion part for generating a display current whose magnitude corresponds to a value of a displayed data, a timing control part for generating a write controlling signal, and a plurality of electric current latching parts, each of which generates a driving current. Each of the electric current latching parts having a capacitor generates a display current whose magnitude corresponds to a magnitude of a voltage to which the capacitor is charged. Each of the elective current latching parts performs a reset operation that once discharges the capacitor in response to a reset signal generated by the timing control part. The current driver circuit can generate the driving current with high accuracy and improve the speed of response to the display device.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram of a related current drive circuit;

FIG. 2 is a schematic diagram showing a current drive circuit that is a first embodiment of the present invention;

FIG. 3 is a signal waveform diagram of showing an operation of the current drive circuit shown in FIG. 2;

FIG. 4 is a schematic diagram showing a current drive circuit that is a second embodiment of the present invention;

FIG. 5 is a graph showing a setting voltage (VST) versus a value of display data Din for the current drive circuit shown in FIG. 4; and

FIG. 6 is a signal waveform diagram showing an operation of the current drive circuit shown in FIG. 4.

Claims

1. A driving circuit for driving a display panel which displays an image on the basis of picture signals comprising: display current generating means for generating a display current having a magnitude corresponding to a value of pixel data, the pixel data having a magnitude on the basis of said picture signals and supplied in sequence in synchronization with a synchronous timing of said picture signals;write controlling signal generating means for generating a write controlling signal which is synchronized with said synchronous timing; anda plurality of line driving current output circuits, each of which generates a line driving current corresponding to said display current in response to said write controlling signal, retains said line driving current, and outputs said line driving current through an output terminal thereof,wherein said write controlling signal generating means generates a predetermined signal prior to said picture signals and each of said line driving current output circuits releases said line driving current retained thereby in response to said predetermined signal.

2. The driving circuit according to claim 1, wherein each of said line driving current output circuits comprises: a charging condenser;a charging circuit for charging said charging condenser to a charging voltage whose magnitude corresponds to a magnitude of said display current in response to said write controlling signal; andan output stage for generating an output current whose magnitude corresponds to a magnitude of a voltage applied across both ends of said charging condenser as said line driving current.

3. The driving circuit according to claim 2, wherein each of said line driving current output circuits further comprises a short-circuit for shorting both ends of said charging condenser in response to said reset signal.

4. The driving circuit according to claim 2, wherein said charging circuit comprises: a diode having a first end and a second end, said first end being connected to a ground;a first switch for connecting and disconnecting said second end of said diode to and from an output line of said electric current generating means in synchronization with said write controlling signal; anda second switch for connecting and disconnecting said second end of said diode to and from said condenser in synchronization with said write controlling signal.

5. The driving circuit according to claim 2, wherein said predetermined signal is in synchronization with said picture signals.

6. The driving circuit according to claim 1, wherein said line driving current output circuit is a latching part.

7. The driving circuit according to claim 1, wherein said display current generating means includes a D/A converter.

8. A driving circuit for driving a display panel which displays an image on the basis of picture signals comprising: a display current generating circuit for generating a display current having a magnitude corresponding to a value of pixel data, the pixel data having a magnitude on the basis of said picture signals and supplied in sequence in synchronization with a synchronous timing of said picture signals;a write controlling signal generating circuit for generating a write controlling signal which is synchronized with said synchronous timing; anda plurality of line driving current output circuits, each of which generates a line driving current corresponding to said display current in response to said write controlling signal, retains said line driving current, and outputs said line driving current through an output terminal thereof,wherein said write controlling signal generating circuit generates a predetermined signal prior to said picture signals and each of said line driving current output circuits releases said line driving current retained thereby in response to said predetermined signal.

9. The driving circuit according to claim 8, wherein each of said line driving current output circuits comprises: a charging condenser;a charging circuit for charging said charging condenser to a charging voltage whose magnitude corresponds to a magnitude of said display current in response to said write controlling signal; andan output stage for generating an output current whose magnitude corresponds to a magnitude of a voltage applied across both ends of said charging condenser as said line driving current.

10. The driving circuit according to claim 9, wherein each of said line driving current output circuits further comprises a short-circuit for shorting both ends of said charging condenser in response to said reset signal.

11. The driving circuit according to claim 9, wherein said charging circuit comprises:a diode having a first end and a second end, said first end being connected to a ground;a first switch for connecting and disconnecting said second end of said diode to and from an output line of said electric current generating circuit in synchronization with said write controlling signal; anda second switch for connecting and disconnecting said second end of said diode to and from said condenser in synchronization with said write controlling signal.

12. The driving circuit according to claim 9, wherein said predetermined signal is in synchronization with said picture signals.

13. The driving circuit according to claim 8, wherein said line driving current output circuit is a latching part.

14. The driving circuit according to claim 8, wherein said display current generating circuit includes a D/A converter.

15. A driving circuit for retaining a display current in response to a write controlling signal and outputting said display current as a driving current, said display current whose magnitude corresponds to a value of an input date being supplied by display current generation means in sequence, comprising: a first switch for connecting and disconnecting a first node to and from a second node in response to a first write controlling signal, said display current being supplied to said first node;a first transistor whose gate and drain terminals are connected to said second terminal and whose source terminal is connected to a common terminal;a second switch for connecting and disconnecting said second node to and from a third node in response to a second write controlling signal;a capacitor connected across said third node and said common node, for retaining an electric potential at said third node;a second transistor connected across said third node and said common node, which is turned on in response to a reset signal supplied prior to said first and second write controlling signals; anda third transistor whose gate and source terminals are connected to said third node and said common node, respectively, for outputting said display current from a drain terminal thereof.

16. A driving circuit for retaining a display current in response to a write controlling signal and outputting said display current as a driving current, said display current whose magnitude corresponds to a value of an input date being in sequence supplied by display current generation means, comprising: a first switch for connecting and disconnecting a first node to and from a second node in response to a first write controlling signal, said display current being supplied to said first node;a first transistor whose gate and drain terminals are connected to said second terminal and whose source terminal is connected to a common terminal;a second switch for connecting and disconnecting said second node to and from a third node in response to a second write controlling signal;a capacitor connected across said third node and said common node, for retaining an electric potential at said third node;a second transistor connected across said third node and a bias electric potential, which is turned on in response to a reset signal supplied prior to said first and second write controlling signals, said bias electric potential whose magnitude corresponds to a value of said input data being generated; anda third transistor whose gate and source terminals are connected to said third node and said common node, respectively, for outputting said display current from a drain terminal thereof.