CURRENT LIMIT CONTROL CIRCUIT FOR BOOST CONVERTER IN CCM

Abstract

A control circuit for a boost converter is provided. The control circuit includes switching means configured to switch the boost converter to perform cycles. Each cycle includes an energy charging state, in which an inductor stores energy provided by an input voltage, and an energy discharging state, in which the inductor provides energy to an output of the boost converter. The control circuit further includes comparison means configured to decide whether a current at the inductor is higher than a predetermined maximum current. The control circuit further includes off-time signal generation means configured to generate an off-time signal based on whether the current at the inductor is higher than a predetermined maximum current. The off-time signal determines a duration of a discharging state of a next switching event and the switching means is configured to switch the boost converter based on the generated off-time signal.

Description

TECHNICAL FIELD

The disclosure relates to a control circuit to limit the input current for a boost converter circuit. The disclosure further relates to a boost converter circuit comprising said control circuit and to a method of operating said boost converter circuit comprising said control circuit.

BACKGROUND

Energy harvesting is the process by which energy is derived from external sources, captured, and stored for small, wireless autonomous devices, like those used in wearable electronics and wireless sensor networks. A direct current to direct current ‘DC-to-DC’ converter circuits, such as boost converter circuits, are electronic circuits that convert a source of direct current (DC) from one voltage level to another voltage by first charging an energy storage element using an input voltage and then discharging the energy storage element to provide the energy at the output of the DC-to-DC converter. DC-to-DC converters can be used to increase the amount of energy harvested from an energy source. Constant-On-Time (COT) boost converters are popular for its simplicity and high performance.

When working in continuous conduction mode, a battery (and the PCB wiring to the battery) gives an impedance in series with a coil of the boost converter. This impedance usually has an inductive character so that the coil current ripple can cause a high voltage variation at the battery voltage connection of the coil on the PCB. Since also other applications may be connected at that point, it is usually decoupled to ground with a capacitor and thus creating a low pass filter between battery and coil. To avoid excessive currents in the coil, a current protection is usually implemented.

“Integrated overcurrent protection system for class-D audio power amplifiers”, by M. Berkhout, IEEE Journal of Solid-State Circuits, Volume: 40, Issue 11, Nov. 2005, discloses a power stage that contains switches for switching inductive loads and provides current protection by measuring the current in the inductor and controlling the switches when the maximum current is detected. This overcurrent protection will nicely limit the maximum current. However, the period of time that the boost is charging, i.e., the duration of the phase where the current through the inductor is increased, now deviates from the intended value and the intended boost voltage can no longer be maintained as a natural result of the current limit action. The inductor current during this limiting action has unpredictable low frequency patterns with high amplitude. The voltage on the battery decoupling capacitor is also affected by this current limiting behavior. Filtering with a capacitor at the input of the boost converter is not very effective for these current patterns and lead to low frequency high amplitude voltage variations at the battery voltage that disturb the operation of the boost converter and other applications connected to this node. Furthermore, this solution prevents accurate battery current limiter control since there is no clear relation between battery current and peak coil current. The average current during the unpredictable switching behavior is lower than in case of regular switching. This limits the input power earlier than in case of regular switching.

SUMMARY

An object of the disclosure is to implement control means to limit current for a boost converter such that the switching frequency is stable and the low frequency, high amplitude variations in the inductor during current limiting are avoided. By avoiding high amplitude variations in the inductor, the average current can be higher than in prior art solutions.

According to the disclosure, there is provided a control circuit for a boost converter wherein the control circuit comprises switching means configured to switch the boost converter to perform cycles wherein each cycle comprises an energy charging state in which an inductor stores energy provided by an input voltage and an energy discharging state in which the inductor provides energy to an output of the boost converter, comparison means configured to decide whether a current at the inductor is higher than a predetermined maximum current and off-time signal generation means configured to generate an off-time signal based on whether the current at the inductor is higher than a predetermined maximum current, wherein the off-time signal determines a duration of a discharging state of a next switching event and wherein the switching means is configured to switch the boost converter based on the generated off-time signal. This allows to implement a current limiter in a constant on time boost converter that allows coil current limitation while switching at the same frequency as without coil current limiting action, and that does not disturb the filtered battery voltage when current limiting. The current limiting options in the constant-on-time boost converter as described are comparable with those in a fixed frequency peak current mode controlled boost converter, but with a much simpler implementation. Usually, a boost converter behaves more or less as a voltage source where the output current, and thus the coil current, depends on the load. When the coil current reaches the maximum value however, it should behave as a current source where the boost voltage varies with the load and the coil current or battery current is limited to a (programmable) maximum value. A comparison with a DC power supply can be made here. The move to a current controlled converter can be done by changing the constant-on-time control to a constant-off-time (i.e., a constant duration of the energy discharging state) control in case of current limiting. During the constant-on-time control, the energy charging state has a constant duration, while during the constant-off-time control, the energy discharging state is the one having a constant duration. The start of the off-period (i.e., the energy discharging state) is already generated by the peak current limiter when I_COIL=I_MAX and the overcurrent signal oc is produced. The off-time (i.e. energy discharging state) required to have a stable switching frequency can be generated similar to the generation of the on-time in case of constant-on-time control (when there is no current limiting).

In an example of the present disclosure, the off-time signal determines the duration of the discharging state T_OFF based on the input voltage V_BAT, a switching frequency f_TARGET at which the boost converter performs cycles and an output voltage V_BST at the output of the boost converter such that:

$T_{\mathrm{OFF}}=\frac{V_{\mathrm{BAT}}}{f_{\mathrm{TARGET}}{V}_{BST}}.$

By providing a constant duration of the energy discharging state, the switching frequency of the boost converter circuit can be controlled.

In an example of the present disclosure, the switching means are configured to switch the boost converter between a first current operation mode and a second voltage operation mode based on whether a current at the inductor is higher than a predetermined maximum current.

In an example of the present disclosure, the off-time signal generation means comprises a capacitor and a comparison circuit wherein the capacitor is configured to store a voltage, wherein the comparison circuit comprises a first input, a second input, wherein the comparison circuit is configured to receive a reference voltage at the first input, to receive the stored voltage at the second input, and to generate the off-time signal by comparing the reference voltage and the stored voltage. This is a very efficient way of implementing the off-time signal generation means.

In an example of the present disclosure, the on-time signal generation means comprising another capacitor and another comparison circuit wherein the another capacitor is configured to store another voltage, wherein the another comparison circuit comprises a first input, a second input, wherein the another comparison circuit is configured to receive another reference voltage at the first input, to receive the stored voltage at the second input, and to generate an on-time signal by comparing the another reference voltage and the stored voltage. This is a very efficient way of implementing the on-time signal generation means. Alternatively, the same circuit may be used for the off and on time signal generation means wherein the reference voltage is generated by a controllable voltage source that can be controlled to provide the voltage corresponding to the current limitation or to the voltage limitation operation modes depending on the operation mode of the boost converter circuit.

In an example of the present disclosure, the comparison means is further configured to receive the output voltage of the boost converter circuit, a minimum voltage and to decide whether the output voltage is higher than the minimum voltage; and the on-time signal generation means configured to generate the on-time signal based on whether the output voltage is higher than the minimum voltage.

In an example of the present disclosure, the maximum current is

$I_{\mathrm{BAT},\mathrm{MAX}}+D\frac{V_{\mathrm{BAT}}}{2L_{\mathrm{BST}}{f}_{\mathrm{BST}}};$

wherein I_BAT,MAX is a maximum current for a battery connected at the input of the boost converter circuit, V_BST is the output voltage, V_BAT is the input voltage, L_BST is the inductance value of the inductor and

$D=\frac{V_{\mathrm{BST}}-V_{\mathrm{BAT}}}{V_{\mathrm{BST}}}$

is the duty cycle of the switch connecting the inductor to ground. This allows battery current limitation since an appropriate compensation current can be generated based on the predictable switching frequency during current limiting. In this way, accurate battery current limiter control can be provided.

According to the disclosure, there is further provided a boost converter circuit comprising the control circuit, an inductor, an input terminal configured to receive an input voltage and an output terminal configured to provide an output voltage and a method to operate said boost converter circuit.

The person skilled in the art will understand that the features described above may be combined in any way deemed useful. Moreover, modifications and variations described in respect of the system may likewise be applied to a method of operating the boost converter circuit.

BRIEF DESCRIPTION OF DRAWINGS

In the following, aspects of the disclosure will be elucidated by means of examples, with reference to the drawings. The drawings are diagrammatic and are not drawn to scale.

FIGS. 1A-1V show schematics of circuits for a boost converter and corresponding waveforms diagrams.

FIG. 2A shows a schematic of a control circuit for a boost converter according to an embodiment of the disclosure.

FIG. 2B shows a circuit according to an embodiment of the disclosure.

FIG. 3 shows a boost converter circuit according to an embodiment of the disclosure.

FIGS. 4A-4E show diagrams of time waveforms of several signals of the boost converter circuit of FIG. 3 during operation.

FIG. 5 shows a flow diagram of a method to operate a control circuit according to an embodiment of the disclosure.

FIGS. 6A-6C, 7A-7D and 8A-8D show diagrams of the waveforms of several signals of the boost converter of FIG. 3 when operated according to FIG. 5.

FIGS. 9A-9H show diagrams of the waveforms of several signals of a boost converter according to an embodiment of the disclosure.

FIG. 10 shows a circuit according to an embodiment of the disclosure.

FIG. 11 shows a flowchart of a method of operating a control circuit for a boost converter.

DESCRIPTION OF EMBODIMENTS

In the figures, the same reference numbers indicate elements that are similar in structure and function.

A Constant-On-Time (COT) boost converter is popular for its simplicity and high performance in both continuous conduction mode (CCM) and discontinuous conduction mode (DCM). An example of a COT boost converter topology is shown in FIG. 1A. A minimum voltage V_BST,TARGET (i.e., a desired voltage at the output of the boost converter) is set by choosing the appropriate value for I_SH using the adjustable current source of FIG. 1A.

$I_{SH}=\frac{V_{\mathrm{BST},\mathrm{TARGET}}-V_{\mathrm{REF}}}{R_{\mathrm{SH}}}.$

In contrast with what the name of this DC-DC converter topology suggests, the on-time is usually chosen to depend on V_BAT and V_BST in such a way that the target switching frequency f_TARGET in CCM is reached independent of V_BAT and V_BST.

$T_{\mathrm{ON}}=\frac{V_{\mathrm{BST}}-V_{\mathrm{BAT}}}{f_{\mathrm{TARGET}}{V}_{\mathrm{BST}}}.$

During operation the on-time is started as soon as the output boost voltage V_BST drops below the minimum voltage V_BST,TARGET and the under voltage signal uv goes high. As a response to that signal, pwm goes low so that S_L is closed and S_H is opened and the current through coil L_BST will increase. At the same time, start goes high, and the timer is started. When the on-time is reached, the timer generates a ready signal. This signal will cause pwm high so that S_L is opened and S_H is closed and the current through coil L_BST will decrease while charging the output capacitor C_BST. As a result, uv will go low and as soon as the boost voltage has dropped below the minimum voltage again, the process repeats. The typical waveforms of I_COIL and pwm during a constant load are illustrated in FIGS. 1B-1E.

A method to generate T_ON using a current source and a capacitor can be seen in FIG. 1F. Note that I_CHARGE is proportional to V_BST and V_REF is proportional to V_BST-V_BAT to obtain the required target frequency in continuous conduction mode (CCM). When start goes high, reset goes low and V_C,ON increases linearly with time until V_REF is reached. The comparator generates a ready signal that resets V_C,ON to 0. The logic is used to drive the switches S_H and S_L. This is shown in FIGS. 1G-1J.

A battery (and the PCB wiring to the battery) gives an impedance R_BAT in series with the coil. This impedance usually has an inductive character so that the coil current ripple can cause a high voltage variation at the battery voltage connection of the coil on the PCB. Since also other applications may be connected at that point, it is usually decoupled to ground with a capacitor and thus creating a low pass filter between battery and coil. To avoid excessive currents in the coil L_BST, a current protection is usually implemented. In a power stage that contains switches S_L and S_H and that is designed for switching inductive loads, a common way to implement such a protection is:

• • to measure the current in the inductor,
  • to open the switch that was closed when the maximum current is detected,
  • to close the switch that was open so that the inductor current will decrease.

A COT boost converter with current limiter and battery decoupling can be seen in FIG. 1K. A signal oc is set as soon as I_COIL exceeds I_MAX and reset when pwm goes low. Even before ready of the on-time generation goes high, oc forces S_H to close and S_L to open so that I_COIL will no longer increase, but start decreasing. This overcurrent protection will nicely limit the maximum current. However, because T_ON now deviates from the intended value as can be seen in FIGS. 1L-1P where the overcurrent protection interferes in the first and third pwm pulse. Because the overcurrent signal interrupts the normal switching sequence, the constant-on-time control loop is now out of control and can no longer maintain the intended boost voltage. Of course the boost voltage will drop due to the current limiting, that is inevitable, but the inductor current during this limiting action has unpredictable low frequency patterns with high amplitude. The voltage on the battery decoupling capacitor V_BAT is also affected by this current limiting behavior as can be seen in FIGS. 1Q-1V where the response of the system to a moderate load step shown in FIGS. 1Q-1S is compared with the response to a high load step with current limiting in FIGS. 1T-1V.

FIG. 2A shows a schematic of a control circuit 100 for a boost converter according to an embodiment of the disclosure. The control circuit 100 comprises comparison means 102, off-time signal generation means 104, and switching means 106.

The comparison means 102 of the control circuit 100 shown in FIG. 2A comprises a first input 120, a second input 122 and an output 128. The first input 120 is configured to receive information regarding an input current at an inductor of a boost converter circuit. The second input 122 is configured to receive a first threshold value indicating a predetermined maximum input current. The comparison means 102 is configured to decide whether the input current is higher than the predetermined maximum input current by comparing the information regarding the input current received at the first input 120 and the first threshold value received at the second input 122. The comparison means 102 may generate a signal at the output 128 indicating whether the input current is higher than the predetermined maximum input current.

The off-time signal generation means 104 of the control circuit 100 shown in FIG. 2A comprises an input 130 and an output 132. The input 130 is configured to receive the signal generated by the comparison means 102 at the output 128. The off-time signal generation means 104 is further configured to generate an off-time signal at the output 132. The off-time signal is generated based on the signal received at the input 130. The off-time signal will be used to generate an energy discharging state of a next switching event of the boost converter circuit. The switching means 106 of the control circuit 100 shown in FIG. 2A comprises an input 134 and an output 136. The input 134 of the switching means 106 is configured to receive the off-time signal at the output 132 of the off-time signal generation 104. The switching means 106 is configured to switch the boost converter to perform cycles by starting switching events wherein each cycle or switching event comprises an energy charging state in which an inductor stores energy provided by an input voltage at an input of the boost converter circuit and an energy discharging state in which the inductor provides energy to an output of the boost converter circuit. The switching means 106 will start a new cycle or switching event wherein the inductor will start charging energy and, when the current at the inductor reaches a maximum current, the comparison means 102 will indicate to the off-time signal generation means 104 that the inductor reaches the maximum current. The off-time signal generation means 104 will then generate the off-time signal at the output 132 which will be received by the switching means 106. The switching means 106 will then control the boost converter circuit to enter into an energy discharging state wherein the inductor starts discharging energy to the output of the boost converter circuit. The boost converter circuit will be in the energy discharging state until the off-time signal is deactivated.

The off-time signal will force the boost converter circuit to be in an energy discharging state for a constant amount of time T_OFF. The duration T_OFF of the off-time signal may be chosen to depend on the input voltage V_BAT of the boost converter circuit, the output voltage V_BST of the boost converter circuit and the intended switching frequency f_TARGET as indicated below:

$T_{\mathrm{OFF}}=\frac{V_{\mathrm{BAT}}}{f_{\mathrm{TARGET}}{V}_{\mathrm{BST}}}.$

The comparison means 102, the off-time generator means 104 and the switching means 106 of the control circuit 100 may be connected in a different way that still provides the same functionality. For instance, the comparison means 102 may be configured to provide the information indicating whether the inductor current exceeds the maximum current to the switching means 106 and the switching means 106, based on that information may provide a signal to the off-time generation means 104 such that, based on that signal, the off-time generation means 104 will generate and send the off-time signal to the switching means 106. The switching means 106 will then switch accordingly the boost converter circuit. The control circuit 100 may comprise any other suitable form of connection among the different parts or any other elements. The comparison means 102, the off-time generation means 104 and the switching means 106 may comprise any kind of electrical elements and/or gate logic allowing to perform the corresponding function of each one. For instance, the comparison means 102 may comprise an operational comparator or any other gate logic element.

FIG. 2B shows a control circuit 200 according to an embodiment of the disclosure. The control circuit 200 comprises switching means 106 and off-time signal generation means 104. The control circuit 200 of FIG. 2B also comprises on-time signal generation means 224 which can be very similar to the off-time signal generation means 104. The on-time signal generation means 224 will be used when current limiting is not necessary and the off-time signal generation means 104 will be used when current limiting is necessary (i.e., when the current in the inductor exceeds the maximum predetermined current). In this way, the switching means are configured to switch the boost converter between a first current operation mode (wherein the off-time signal generation means 104 will be used to determine the duration of the energy discharging state) and a second voltage operation mode (wherein the on-time signal generation means 224 will be used to generate the duration of the energy charging state) based on whether a current at the inductor is higher than the predetermined maximum current.

The off-time signal generation circuit 104 in FIG. 2B comprises a current source 202, a capacitor 204 and a comparator 206. The comparator 206 comprises a first input 208 configured to receive a voltage V_C,OFF across the capacitor 204. The comparator 206 comprises a second input 210 configured to receive a reference voltage V_REF,OFF, wherein the reference voltage V_REF,OFF is equal or proportional to the input voltage of the boost converter circuit V_BAT. The capacitor 204 is configured to store a voltage V_C,OFF based on the feedback current I_CHARGE that is proportional to the output voltage of the boost converter circuit V_BST. The comparator 206 generates a ready_toff signal based on the result of the comparison between the first input 208 and the second input 210. The switching means 106 is configured to receive the ready_toff signal based on said comparison and to generate a pwm signal to switch the control boost circuit to enter in an energy discharging state for a time T_OFF equal to

$\frac{V_{\mathrm{BAT}}}{f_{\mathrm{TARGET}}{V}_{\mathrm{BST}}}.$

The switching means 106 is also configured to generate a reset_toff signal that controls a switch 220 to close such that a voltage V_C,OFF across the capacitor 204 increases linearly with time until the first input 208 of the comparator 206 reaches the reference voltage V_REF,OFF received at the second input 210 of the comparator 206. At that moment, the comparator 206 generates the ready_toff signal which opens the switch 220 and resets the voltage V_C,OFF to zero. The reference voltage V_REF,OFF is generated by a voltage source 260.

The on-time signal generation circuit 224 of FIG. 2B is similar to the off-time generation circuit 104 and also comprises another capacitor 234 and another comparison circuit or comparator 236 wherein the another capacitor is configured to store another voltage V_C,ON, wherein the another comparison circuit comprises a first input 240, a second input 238, wherein the another comparison circuit is configured to receive another reference voltage V_REF,ON at the first input, to receive the another voltage V_C,ON at the second input, and to generate an on-time signal ready t_on by comparing the another reference voltage V_REF,ON and the another voltage V_C,ON. The another reference voltage V_REF,ON is generated by a voltage source 262. The signal ready_ton is provided to the switching means 106. The another reference voltage V_REF,ON generated by the voltage source 262 is equal or proportional to V_BST-V_BAT. The switching means 106 is configured to receive the ready_ton signal and to generate the pwm signal to switch the control boost circuit to enter in an energy charging state for a time T_ON equal to

$\frac{V_{\mathrm{BST}}-V_{\mathrm{BAT}}}{f_{\mathrm{TARGET}}{V}_{\mathrm{BST}}}.$

The switching means 106 is also configured to generate a reset_ton signal that controls a switch 250 to reset the voltage V_C,ON of the capacitor 234 to zero. When reset_ton is not active the switch 250 is open and the another voltage V_C,ON across the another capacitor 234 increases linearly with time until the second input 238 of the another comparator 236 reaches the another reference voltage V_REF,ON generated by the voltage source 262. At that moment, the another comparator 236 generates the ready_ton signal which opens the switch 250 and resets the another voltage V_C,ON of the another capacitor 234 to zero.

The switching means 106 is configured to receive an overcurrent oc signal and an undervoltage uv signal wherein the oc signal and the uv signal will be generated by the comparison means 102 shown in FIG. 2A. Though in FIG. 2A the output 128 of the comparison means 102 is connected to the off-time signal generation means 104, as said before said output 128 can be connected to the switching means 106 such that the switching means 106 will send the reset_ton signal or the reset_toff signal respectively to the on-time signal generation 224 or the off-time signal generation 104. As said, in this way the switching means can switch the boost converter circuit between the first current operation mode wherein the off-time signal generation means 104 determine the duration of the energy discharging state and the second voltage operation mode wherein the on-time signal generation means 224 determine the duration of the energy charging state based on whether a current at the inductor is higher than the predetermined maximum current. The switching means will switch the boost converter circuit between the first current operation mode and the second voltage operation mode based on whether a current at the inductor is higher than the predetermined maximum current such that when the current at the inductor is higher than the predetermined maximum current the boost converter circuit will be working in the first current operation mode, and when the current at the inductor is not higher than the predetermined maximum current the boost converter circuit will be working in the second voltage operation mode. This allows to limit the maximum current while still providing a stable switching frequency.

FIG. 3 shows a boost converter circuit 300 according to an embodiment of the disclosure. FIGS. 4A-4E show diagrams of time waveforms of several signals of the boost converter circuit of FIG. 3 during operation. FIG. 4A illustrates the value of I_COIL as a function of time in the boost converter circuit of FIG. 3. The current I_COIL is the current through the inductor L_BST shown in FIG. 3. FIGS. 4B-4E illustrate respectively the pwm signal, the oc signal, the ready_toff signal and the uv signal as a function of time.

The boost converter circuit 300 of FIG. 3 comprises an inductor L_BST connected at an input voltage V_BAT generated by a battery, for instance, and a switch S_L and a switch S_H. The boost converter circuit 300 of FIG. 3 comprises further switching means 106, comparison means 102 and off and on-time signal generation means 104 and 224. The comparator means 102 comprises a comparator 190 configured to receive the maximum current I_MAX at the second input 122, to receive the current passing through the inductor I_COIL (and measured by a current measurement device 390 ) at a first input 120 and to generate the oc signal indicating that the inductor current I_COIL exceeds the maximum current I_MAX. The comparator means 102 further comprises the comparator 302 comprising a first input 304 configured to receive a minimum voltage, and comprising a second input 306 configured to receive the voltage V_SH=V_BST-I_SH*R_SH and to generate the uv signal indicating that the output voltage V_BST is below the minimum voltage. When the oc signal is activated, the switching means 106 switches to the off-time operation mode (i.e., the first current operation mode) and activates the off-signal generation 104. When the uv signal is de-activated, the switching means 106 switches to the on-time operation mode (i.e., the second voltage operation mode) and activates the on-signal generation 104. Toggling between the two modes of operation (voltage mode and current mode) is implemented in logic and initiated by the overcurrent signal oc for moving to current mode, and the NOT (uv) signal (i.e., the invert of the signal uv) indicating the boost voltage is above the minimum voltage.

During a time interval 400 shown in FIG. 4A, the switch S_L is closed and the switch S_H is open in order to connect the inductor L_BST of FIG. 3 to the ground. When the inductor L_BST is connected to ground, the boost converter circuit 300 enters into an energy charging state in which current flows through the inductor L_BST and the inductor L_BST stores some energy by generating a magnetic field. The current I_COIL in the inductor L_BST increases during said time interval 400 as it can be as shown in FIG. 4A. When the inductor current I_COIL reaches the maximum current I_MAX, the overcurrent signal ov is activated as shown in FIG. 4C and the switching means 106 sends a control signal pwm, as shown in FIG. 4B, to open the switch S_L in order to disconnect the inductor L_BST from the ground, and to close the switch S_H in order to connect the inductor L_BST to the output V_BST and the boost converter circuit enters into an energy discharging state in which, during the time interval 402 shown in FIG. 4A, the energy previously accumulated in the inductor L_BST is transferred to the output V_BST and the current I_COIL in the inductor L_BST starts decreasing during a period T_OFF after which the oc signal is de-activated, and the signal pwm is set to zero thereby switching the switches S_H and S_L of the boost converter circuit such that a new charging period starts in 404. Time intervals 400 and 402 are part in this case of a continuous mode event wherein a completed switching cycle has been performed by the circuit. A new continuous mode event starts after time interval 402.

FIG. 5 shows a flow diagram of a method to operate a control circuit according to an embodiment of the disclosure wherein a three-bit state machine Q is used. The switching cycles in both voltage and current mode are controlled as can be seen in FIG. 5. The operation of the state machine is described below, discussing every state, starting in state Q=000.

State Q=000

The system is in voltage mode, using constant on-time control (i.e., the second voltage operation mode). The pwm signal is active and a rising edge on the under voltage uv signal will initiate the on time charging state by a transition to state Q=001.

State Q=001

When Q=001, the signal pwm is made zero, so the switch S_L in FIG. 3 will be switched on, the switch S_H will be switched off and the current through the inductor I_COIL will increase. Also, a timer is started in this state by the reset_ton signal which will have a value of zero and the on voltage V_C,ON will ramp-up until it exceeds the on reference voltage V_REF,ON. The comparator 236 shown in FIG. 2B will then generate a rising edge on the ready_ton (ron in FIG. 5) signal that will cause the transition to state Q=011.

However, if the over current signal oc goes high before the ready_ton signal, the transition to state Q=101 is made and constant-off-time-control (i.e. the first current operation mode) is entered wherein the current is limited.

State Q=011

In state Q=011 the signal pwm is activated by the value 1 so the switch S_L will be switched off, the switch S_H will be switched on and the current through the inductor I_COIL will be dumped to the output capacitor and decrease. A transition to state 010 is made automatically (by activating the ready_toff signal called roff in FIG. 5) after a certain delay time that guarantees a minimum time for the signal pwm=1.

State Q=010

A transition is made to Q=000 automatically. (This state is only used for transition from 011 to 000 to avoid resetting multiple bits simultaneously).

State Q=101

This state is entered after a rising edge on the over current signal oc in state Q=001 (while the switch S_L is on and the signal pwm is equal to zero). Now, the current loop has been entered and constant-off-time control is used. The oc signal initiated the off-time signal and a transition to state 111 is made immediately.

State Q=111

Here the signal pwm is equal to one so that the switch S_L (that experienced the over current event) is switched off and the switch S_H will be switched on and the current through the inductor I_COIL will decrease. The signal reset_toff is low so that the voltage V_C,OFF in the capacitor 204 will ramp-up until it exceeds the reference voltage V_REF,OFF. The comparator 206 will then generate a rising edge on the ready_toff (roff) signal that will initiate the transition to state Q=110.

State Q=110

If the output voltage is still below target (i.e., the signal uv is equal to one), the system remains in the current mode and the transition to state 100 is made automatically. However, if the output boost voltage is back to a level above the target level (i.e., the uv signal is zero), the transition to state 010 is made and the system jumps back to voltage control (second voltage operation mode).

State Q=100

In state Q=100, the signal pwm is equal to zero and causes the switch S_L to close and the switch S_H to open, and the current through the inductor I_COIL increases. The oc signal will be reset to zero causing a transition to state Q=101 where it waits until the inductor current reached the overcurrent level again.

FIGS. 6A-6C show diagrams of the waveforms of the output voltage V_BST, the input voltage V_BAT, and the inductor current I_COIL and the battery current I_BAT, respectively, of the boost converter of FIG. 3 when operated according to the method shown in FIG. 5. In FIGS. 6A-6C, the response of the system to a heavy load step with current limiting can be seen. The frequency during current limiting is constant, the input current I_BAT and the input voltage V_BAT have a smooth behaviour, and the peak current limiter I_MAX can be used for battery current limitation when the appropriate compensation for the chosen switching frequency is used.

FIGS. 7A-7D show diagrams of the waveforms of the inductor current I_COIL, the maximum current I_MAX and the battery current I_BAT (FIG. 7A), the voltages V_REF,ON and V_C,ON (FIG. 7B), the voltages V_REF,OFF and V_C,OFF (FIG. 7C), and the signals ready_ton, ready_toff, curmode, oc and state Q (FIG. 7D), respectively, of the boost converter of FIG. 3 when operated according to the state machine shown in FIG. 5 when the current mode is entered and the oc signal determines the start of the energy discharging period while T_OFF determines the length of the energy discharging period. The signal curmode is 1 when the current mode is on and 0 when the current mode is off. FIGS. 7A-7D share a common time line as indicated by the grid lines shown in said figures.

FIGS. 8A-8D show the same signals as FIGS. 7A-7D, respectively, when the current mode is left, and also share a common time line as indicated by the grid lines shown in said figures. The first time when the uv signal goes low while state Q=110, the state Q will go to 010 and the curmode signal will go to zero and constant-on-time control is resumed.

Now that the frequency in current mode is controlled, just as in the case of voltage mode, the peak—peak ripple current amplitude I_R is known and therefore also the difference between peak—and average coil current is known. This means that a battery current limit I_BAT,MAX can be implemented by adding a peak-to-average compensation current

$\frac{I_R}{2}$

to the required maximum battery current limit I_BAT,MAX, and using it as a peak current limit:

$\begin{array}{c}{I}_{\mathrm{PEAK},\mathrm{MAX}}=I_{\mathrm{BAT},\mathrm{MAX}}+\frac{I_R}{2}=I_{\mathrm{BAT},\mathrm{MAX}}+\frac{D{V}_{\mathrm{BAT}}}{2L_{\mathrm{BST}}{f}_{\mathrm{BST}}};\\ D=\frac{V_{\mathrm{BST}}-V_{\mathrm{BAT}}}{V_{\mathrm{BST}}}.\end{array}$

In the following, it will be explained how to create the peak-to-average compensation current term:

$\frac{D{V}_{\mathrm{BAT}}}{2L_{\mathrm{BST}}{f}_{\mathrm{BST}}}.$

Since the required peak-to-average compensation is proportional with the duty cycle D, it can be created using a linear ramp current I_P2A on top of the programmed maximum battery current I_BAT,MAX in the following way:

$I_{\mathrm{PEAK},\mathrm{MAX}}=I_{\mathrm{BAT},\mathrm{MAX}}+I_{P2A}\left(t\right).$

Where the compensation linear ramp current I_P2A increases linear with time:

$I_{P2A}\left(t\right)=\frac{V_{\mathrm{BAT}}}{2L_{\mathrm{BST}}}t.$

At the moment where the off time is started at t=DT=D/f_BST, the ripple amplitude will be compensated as shown in FIGS. 9A-9F wherein the average coil current I_COIL,AVERAGE, the coil current I_COIL, the peak current limit I_PEAK,MAX, the maximum battery current I_BAT,MAX, and the overcurrent oc signal are illustrated, wherein I_BAT,MAX and I_COIL,AVERAGE are equal in FIGS. 9C, 9E and 9G and therefore overlap. The average coil current I_COIL,AVERAGE is then limited to the programmed maximum battery current I_BAT,MAX independent of battery voltage or boost voltage.

As soon as the pwm signal is activated (pwm=1 here) and the switch S_L is no longer closed, the compensation linear ramp current I_P2A can be reset since there it is not required until the next time cycle where the signal pwm is no longer active (pwm=0). This can be seen in FIGS. 9G-9H, where the same situation is presented as in FIGS. 9C-9D but with resetting the compensation linear ramp current I_P2A when the signal pwm is high. The simulations shown in FIGS. 9A-9D, and FIGS. 9G-9H have been performed for V_BST=12V, V_BAT=4V, L=1 μH and f_BST=2 MHz. The simulations shown in FIGS. 9E-9F have been performed for V_BST=6V, V_BAT=4V, L=1 μH and f_BST=2 MHz.

FIG. 10 shows a possible implementation of a circuit 100 comprising a peak current limiter circuit 102 wherein a reference current I_REF,P2A that is proportional with V_BAT/L_BST is charging a capacitor C₁ generating a voltage V_C,P2A that is linear with time. The signal pwm is used to reset the circuit 100 by discharging the capacitor. The ramping capacitor voltage V_C,P2A is converted to a current I_P2A and combined with the programmed maximum battery current I_BAT,MAX to generate I_PEAK,MAX that is be used in the current limiter circuit for the switch S_L. The circuit 100 of FIG. 10 also comprises a digital to analog convertor I-DAC configures to receive the battery current limit setting.

FIG. 11 shows a flowchart of a method of operating a control circuit 100 for a boost converter. The method comprises a step 1102 of switching, by switching means 106, the boost converter to perform cycles wherein each cycle comprises an energy charging state in which an inductor stores energy provided by an input voltage V_BAT and an energy discharging state in which the inductor provides energy to an output of the boost converter. Then the method proceeds further to step 1104 which comprises deciding, by comparison means 102, whether a current at the inductor is higher than a predetermined maximum current. Finally, the method goes to step 1106 comprising generating, by off-time signal generation means 104, an off-time signal based on whether the current at the inductor is higher than a predetermined maximum current, wherein the off-time signal determines a duration of a discharging state of a next switching event and wherein the switching means is configured to switch the boost converter based on the generated off-time signal.

The examples and embodiments described herein serve to illustrate rather than limit the disclosure. The person skilled in the art will be able to design alternative embodiments without departing from the scope of the claims. Reference signs placed in parentheses in the claims shall not be interpreted to limit the scope of the claims. Items described as separate entities in the claims or the description may be implemented as a single hardware or software item combining the features of the items described.

Claims

1. A control circuit for a boost converter circuit, the control circuit comprising: switching means configured to switch the boost converter to perform cycles wherein each cycle comprises an energy charging state in which an inductor stores energy provided by an input voltage VBAT and an energy discharging state in which the inductor provides energy to an output of the boost converter;comparison means configured to decide whether a current at the inductor is higher than a predetermined maximum current; andoff-time signal generation means configured to generate an off-time signal based on whether the current at the inductor is higher than the predetermined maximum current, wherein the off-time signal determines a duration TOFF of the energy discharging state of a next switching event and wherein the switching means is configured to switch the boost converter based on the generated off-time signal.

2. The control circuit according to claim 1, wherein the off-time signal generation means generates the off-time signal if the current at the inductor is higher than the predetermined maximum current.

3. The control circuit according to claim 1, wherein the off-time signal determines the duration TOFF of the energy discharging state based on the input voltage VBAT, a switching frequency fTARGET at which the boost converter performs cycles and an output voltage VBST at the output of the boost converter such that:

4. The control circuit according to claim 1, wherein the switching means are configured to switch the boost converter between a first current operation mode and a second voltage operation mode based on whether a current at the inductor is higher than the predetermined maximum current, wherein the first current operation mode is used when the current at the inductor is higher than the predetermined maximum current and the second voltage operation mode is used when the current at the inductor is not higher than the predetermined maximum current.

5. The control circuit according to claim 1, wherein the off-time signal generation means comprises a capacitor and a comparison circuit wherein the capacitor is configured to store a voltage VC,OFF, wherein the comparison circuit comprises a first input, a second input, wherein the comparison circuit is configured to receive a reference voltage VREF,OFF at the first input, to receive the voltage VC,OFF at the second input, and to generate the off-time signal by comparing the reference voltage VREF,OFF and the voltage VC,OFF.

6. The control circuit according to claim 5, further comprising on-time signal generation means comprising another capacitor and another comparison circuit wherein the another capacitor is configured to store another voltage VC,ON, wherein the another comparison circuit comprises a first input, a second input, wherein the another comparison circuit is configured to receive another reference voltage VREF,ON at the first input, to receive the another voltage VC,ON at the second input, and to generate an on-time signal by comparing the another reference voltage VREF,ON and the another voltage VC,ON.

7. The control circuit according to claim 6, wherein the switching means is also configured to generate a signal that controls a switch to close such that a voltage VC,OFF across the capacitor increases linearly with time until the first input of the comparator reaches the reference voltage VREF,OFF received at the second input of the comparator.

8. The control circuit according to claim 6, wherein the reference voltage VREF,OFF is equal or proportional to the input voltage of the boost converter circuit VBAT, and the capacitor is configured to store a voltage VC,OFF based on the feedback current ICHARGE that is proportional to the output voltage of the boost converter circuit VBST.

9. The control circuit according to claim 8, wherein the another reference voltage VREF,ON is generated by a voltage source, and the another reference voltage VREF,ON generated by the voltage source is equal or proportional to VBST-VBAT.

10. The control circuit according to claim 8, wherein when the inductor is connected to ground, the boost converter circuit enters into an energy charging state in which current flows through the inductor and the inductor stores some energy by generating a magnetic field; and the current in the inductor increases during said time interval, when the inductor current ICOIL reaches the maximum current, an overcurrent signal is activated and the switching means sends a control signal to disconnect the inductor from the ground and connect the inductor to the output VBST and the boost converter circuit enters into an energy discharging state.

11. The control circuit according to claim 6, wherein the comparison means is further configured to receive the output voltage of the boost converter circuit, a minimum voltage and to decide whether the output voltage is higher than the minimum voltage; and the on-time signal generation means configured to generate the on-time signal based on whether the output voltage is higher than the minimum voltage.

12. The control circuit according to claim 1, wherein the predetermined maximum current is

13. The control circuit according to claim 1, wherein the switching means are implemented as a state machine.

14. The control circuit according to claim 13, wherein the state machine comprises eight states and is configured to perform a transition from one of the eight states to another one of the eight states based on whether the current at the inductor is higher than the predetermined maximum current.

15. The control circuit according to claim 1, wherein the switching means switches the boost converter circuit between the first current operation mode wherein the off-time signal generation means determine the duration of the energy discharging state and the second voltage operation mode wherein the on-time signal generation means determine the duration of the energy charging state based on whether a current at the inductor is higher than the predetermined maximum current; and the switching means switches the boost converter circuit between the first current operation mode and the second voltage operation mode based on whether a current at the inductor is higher than the predetermined maximum current such that when the current at the inductor is higher than the predetermined maximum current the boost converter circuit works in the first current operation mode, and when the current at the inductor is not higher than the predetermined maximum current the boost converter circuit works in the second voltage operation mode.

16. A boost converter circuit comprising: a control circuit; andan input terminal configured to receive the input voltage VBAT,wherein the control circuit comprises:switching means configured to switch the boost converter to perform cycles wherein each cycle comprises an energy charging state in which an inductor stores energy provided by an input voltage VBAT and an energy discharging state in which the inductor provides energy to an output of the boost converter;comparison means configured to decide whether a current at the inductor is higher than a predetermined maximum current; andoff-time signal generation means configured to generate an off-time signal based on whether the current at the inductor is higher than the predetermined maximum current, wherein the off-time signal determines a duration TOFF of the energy discharging state of a next switching event and wherein the switching means is configured to switch the boost converter based on the generated off-time signal.

17. A method of operating a control circuit for a boost converter, the method comprising: switching, by switching means, the boost converter to perform cycles wherein each cycle comprises an energy charging state in which an inductor stores energy provided by an input voltage VBAT and an energy discharging state in which the inductor provides energy to an output of the boost converter;deciding, by comparison means, whether a current at the inductor is higher than a predetermined maximum current; andgenerating, by off-time signal generation means, an off-time signal based on whether the current at the inductor is higher than the predetermined maximum current, wherein the off-time signal determines a duration of the energy discharging state of a next switching event and wherein the switching means is configured to switch the boost converter based on the generated off-time signal.

18. The method of operating the control circuit according to claim 17, further comprising switching, by the switching means, the boost converter between a first current operation mode and a second voltage operation mode based on whether a current at the inductor is higher than the predetermined maximum current.

19. The method of operating the control circuit according to claim 17, wherein the off-time signal generation means comprises a capacitor and a comparison circuit wherein the capacitor is configured to store a voltage VC,OFF, wherein the comparison circuit comprises a first input, a second input, wherein the comparison circuit is configured to receive a reference voltage VREF,OFF at the first input, to receive the voltage VC,OFF at the second input, and to generate the off-time signal by comparing the reference voltage and the voltage VC,OFF.

20. The method of operating the control circuit according to claim 19, further comprising on-time signal generation means comprising another capacitor and another comparison circuit wherein the another capacitor is configured to store another voltage VC,ON, wherein the another comparison circuit comprises a first input, a second input, wherein the another comparison circuit is configured to receive another reference voltage VREF,ON at the first input, to receive the another voltage VC,ON at the second input, and to generate an on-time signal by comparing the another reference voltage and the another voltage VC,ON.