Current mirror and method for operating a current mirror

Abstract

A current mirror and method for operating such a mirror include nonlinearly converting an input current (Iin+=I0 and, respectively, Iin−=I0) into a voltage in a current sink, the voltage being used for driving a current source (Iout+=−n·I0 and, respectively, Iout−=n·I0) with substantially the same transfer characteristic. According to the invention, the current mirror is configured to contain a further voltage-controlled current source that supplies an auxiliary current a·Iout=−a·n·I0.

Description

BACKGROUND OF THE INVENTION

FIELD OF THE INVENTION

[0002] The invention relates to a current mirror in which an input current (Iin) is nonlinearly converted into a voltage in a current sink, the voltage being used for driving a current source (Iout) having substantially the same transfer characteristic.

[0003] The invention also relates to a method for operating a current mirror.

[0004] Current mirrors are circuits or circuit components that, as a response to a current, generate a current of the same intensity.

[0005] The prior art uses current mirrors, in particular, in integrated circuits in which data are processed based upon current signals.

[0006] A current mirror is, preferably, a circuit or a part of a circuit. It converts an input current into an output current. Preferably, there is a linear relationship between the input current and the output current.

[0007] Existing in the prior art is the use of suitably connected transistors as a current sink or as a current source.

[0008] Various circuit configurations for current mirrors are described in the book by C. Toumazou, F. J. Lidgey, and D. G. Haigh: “Analogue IC design: the current mode approach”, London 1990.

[0009] It is particularly in highly accurate integrated analog circuits that differential signal processing is normally used for reducing the sensitivity of the circuits to interfering influences of the most varied type. While such is achieved by using fully differential operational amplifiers (high CMRR, PSRR, etc.) in circuits that transmit information in the voltage domain, current-mode circuits must use other solutions. In these circuits, quasi-differential current signal processing is frequently used in which two identical but electrically separate circuits are used in parallel. Due to the lack of direct electrical coupling and the possibly large spatial separation of the two signal paths on the chip, the advantages of differential signal processing become relative.

[0010] Other prior art embodiments are, in most cases, based upon using differential stages that result in disadvantages with respect to component mismatch and speed and output voltage range of the current mirror.

SUMMARY OF THE INVENTION

[0011] It is accordingly an object of the invention to provide a current mirror and method for operating a current mirror that overcome the hereinafore-mentioned disadvantages of the heretofore-known devices and methods of this general type and that creates a current mirror that has the highest possible stability, particularly with respect to common-mode signals.

[0012] With the foregoing and other objects in view, there is provided, in accordance with the invention, a method for operating a differential current mirror circuit, including the steps of generating, with devices, at least one copy of a respective one of a positive input current and a negative input current by respectively converting the respective one of the positive input current and the negative input current into a respective voltage, utilizing a respective voltage for respectively driving one current source to generate a copy of a respective one of a positive output current and a negative output current, generating, with a device, one auxiliary current that is one of a multiple and a fraction of each respective one of the positive input current and the negative input current, extracting, with a device, an interference signal by adding the two auxiliary currents, and providing one device each to generate the positive output current and the negative output current by subtracting the interference signal from a respective one of a copy of the positive input current and a copy of the negative input current.

[0013] With the objects of the invention in view, there is also provided a method for operating a differential current mirror circuit, including the steps of generating, with first devices, at least one copy of a respective one of a positive input current and a negative input current by respectively converting the respective one of the positive input current and the negative input current into a respective voltage, generating, with a second device, one auxiliary current that is one of a multiple and a fraction of each respective one of the positive input current and the negative input current, extracting, with a third device, an interference signal by adding the two auxiliary currents, and utilizing a respective voltage for respectively driving one current source to generate a copy of a respective one of a positive output current and a negative output current by providing one device each to generate the positive output current and the negative output current by subtracting the interference signal from a respective one of a copy of the positive input current and a copy of the negative input current.

[0014] In accordance with another mode of the invention, there is provided the step of generating the two auxiliary currents as one half of the respective one of the positive input current and the negative input current.

[0015] In accordance with a further mode of the invention, the device for generating the positive output current and the negative output current has at least one complementary current mirror.

[0016] In accordance with an added mode of the invention, there is provided the step of generating a multiple of the copy of the respective one of the positive input current and the negative input current respectively as the positive output current and as the negative output current.

[0017] In accordance with an additional mode of the invention, there is provided the step of generating a number of copies of the respective one of the positive input current and the negative input current.

[0018] With the objects of the invention in view, there is also provided a differential current mirror circuit, including devices generating at least one copy each of a respective one of a positive input current and a negative input current by respectively converting the respective one of the positive input current and the negative input current into a respective voltage, a respective current source connected to the devices, the respective voltage driving each current source to generate a copy of a respective one of a positive output current and a negative output current, a device connected to a respective one of the current sources and to the devices and respectively generating one auxiliary current that is one of a multiple and a fraction of the respective one of the positive input current and the negative input current, a device connected to a respective one of the current sources and to the devices and extracting an interference signal by adding the two auxiliary currents, and devices each generating the positive output current and the negative output current by subtracting the interference signal from a respective one of a copy of the positive input current and the negative input current.

[0019] With the objects of the invention in view, there is also provided a differential current mirror circuit, including first means for generating at least one copy each of a respective one of a positive input current and a negative input current by respectively converting the respective one of the positive input current and the negative input current into a respective voltage, a respective current source connected to the devices, the respective voltage driving each current source to generate a copy of a respective one of a positive output current and a negative output current, second means for respectively generating one auxiliary current that is one of a multiple and a fraction of the respective one of the positive input current and the negative input current, the second generating means connected to a respective one of the current sources and to the devices, means for extracting an interference signal by adding the two auxiliary currents, the extracting means connected to a respective one of the current sources and to the first means, and third means for respectively generating the positive output current and the negative output current by subtracting the interference signal from a respective one of a copy of the positive input current and the negative input current.

[0020] In accordance with yet another feature of the invention, the device or second means generates the two auxiliary currents as one half of the respective one of the positive input current and the negative input current.

[0021] In accordance with yet a further feature of the invention, the device for generating the positive output current and the negative output current or third means has at least one complementary current mirror.

[0022] In accordance with yet an added feature of the invention, the devices each generating the positive output current and the negative output current or third means generate a multiple of the copy of the respective one of the positive input current and the negative input current respectively as the positive output current and as the negative output current.

[0023] In accordance with yet an additional feature of the invention, the devices or first means generate a number of copies of the respective one of the positive input current and the negative input current.

[0024] The invention includes a fully differential symmetric current mirror unit, the two signal paths of which being direct-coupled. Such a configuration results in advantages in the rejection of interference signals.

[0025] According to the invention, a “voltage controlled current source” is any component or any module that generates an output current when an input voltage is applied. In the simplest case, this can be an MOS transistor having a voltage applied to the gate thereof, a current being produced at the source-drain terminals. It is also conceivable to use a bipolar transistor. Modules of two transistors, three transistors, or even more complex voltage-controlled current sources are also conceivable.

[0026] According to the invention, the current mirror contains another voltage-controlled current source that supplies an auxiliary current (a·Iout=a·n·Iin).

[0027] The term “common-mode rejection” is used in conjunction with differential amplifiers or operational amplifiers and relates to their characteristic of rejecting a common mode signal present at the input of the circuit. At the outputs of the circuit, only the differential signal appears that, e.g., is amplified.

[0028] The same is meant by common mode rejection in current mirrors. Independently of the common mode component at the inputs of the current mirror circuit, only the differential signal should appear at the output of the current mirror according to the invention.

[0029] The parameter a designates the fraction of the output current of the current mirror circuit that is provided as auxiliary current in order to correct for the interference signal in the differential current mirror circuit according to the invention.

[0030] In particular, the invention provides for constructing a fully differential current mirror without using differential stages that has advantages with regard to output voltage range, component mismatch and stability or bandwidth of the overall circuit.

[0031] The invention includes a symmetric current mirror unit in which an interference signal (common-mode component) of the differential signal is subtracted from the output current by a suitable supplementary circuit.

[0032] Current mirrors using MOS transistors are based on the fact that an input current (I+in=I0 or, respectively, I−in=−I0) is nonlinearly converted in a current sink into a voltage that is used for driving a current source (I+out=−n·I0, or, respectively, I−out=n·I0) having the same transfer characteristic. The current mirror thus formed is, then, extended by another voltage-controlled current source that supplies a current of a·Iout+=−a·n·I0. Such an auxiliary current is connected to the corresponding auxiliary current source of the identical second differential branch that delivers an output of a·Iout−=a·n·I0. In such a case, the two currents cancel. If there is asymmetry in the input signal (common-mode component), the auxiliary currents will not cancel and the resultant residual current trigger δI can be subtracted from the differential output signals with the aid of another current mirror having a transfer ratio of 1/2a. This results in mathematically complete common-mode rejection.

[0033] It is suitable to configure the current mirror such that an additional voltage-controlled current source in an additional branch generates an additional auxiliary current.

[0034] Advantageously, the current mirror is configured such that the auxiliary current and the additional auxiliary current are added such that the result is δI.

[0035] In practice, it is advantageous to select: 1$a=\frac{1}{2}ora=1$

[0036] because the entire current mirror can, then, be constructed by using identical n-MOS transistors or, respectively, p-MOS transistors.

[0037] Advantages of the circuit are the simple implementation as a supplementary module for existing current mirror units and the general independence of the architecture presented from the basic structure of the current mirror used. Furthermore, there are no stability problems due to the lack of feedback in the circuit so that the circuit is particularly suitable for applications with a wide signal bandwidth.

[0038] It is an important advantage of the invention to be able to implement fully differential current mirror structures without using a differential stage (see exemplary embodiment) that has various disadvantages with respect to bandwidth, output voltage range, and sensitivity to component mismatch.

[0039] It is appropriate that at least one of the current sources is formed by at least one transistor and/or that at least one of the current sources contains cascaded transistors.

[0040] According to the invention, the following distinguishing terms are used. In normal signal processing in circuits, the information to be processed is represented by an electrical signal (generally a voltage). Referred to a reference signal (e.g., ground), the magnitude of this signal is obtained from the difference between the (fixed) reference signal and the signal on the signal line. Such a type of signal processing based on absolute values is generally called “single ended.”

[0041] In differential (=fully differential) signal processing, in contrast, the information is transmitted on two lines. Line 1 conducts the signal, line 2 conducts the inverted signal. The information represented by the signals is obtained by forming the difference between the two signal lines. The significant advantage of this differential signal processing is the clearly reduced sensitivity to induced interference from adjacent lines or from lines crossing the signal lines. In the “single-ended” method, an interference signal induced in this manner is added to the useful signal and is processed further in the circuit. In differential signal processing, the interference is added on both signal-conducting lines. By forming the difference at the output of the circuit, the interference component of the signal is, thus, eliminated again. The differential architecture is particularly suitable for circuits in which very small signals must be processed or very accurate signal processing must be effected. Further information relating to this subject can be found in: “Design of analog integrated circuits and systems” by Kenneth R. Laker & Willy M. C. Sansen, McGraw-Hill publishers, ISBN 0-07-036060-X, page 456ff.).

[0042] In this context, the term “quasi-differential current mirror” designates a current mirror circuit in which two signal paths are provided for the signal and the inverted signal but interference is not eliminated within the circuit. Thus, the interference is forwarded to the stage following the current mirror and can lead to an impairment of the signal (e.g., due to saturation effects) there, or in a later stage in the signal processing chain.

[0043] The terms “differential,” “fully differential,” and “fully differential symmetric current mirror” designate the same circuit architecture. A current mirror circuit is constructed here that has two signal paths—for the noninverted signal stream and the inverted signal stream. Furthermore, the common-mode component (=interference signal) is cancelled within the circuit so that only the useful signal is present at the output of the current mirror.

[0044] The term “differential signal processing” can be found in “Design of analog integrated circuits and systems” by Kenneth R. Laker & Willy M. C. Sansen, McGraw-Hill publishers, ISBN 0-07-036060-X, page 456ff.). The term “quasi-differential” is frequently used by the applicant in connection with this subject.

[0045] If the device for generating the positive output current (Iout+) and the negative output current (Iout−) by subtracting the interference signal (Icor) from a copy of the positive input current (Iin+) or, respectively, from a copy of the negative input current (Iin−) has at least one complementary current mirror (M11, M14; M12, M15; M13, M16), then both positive and negative interference signals can be subtracted.

[0046] Other features that are considered as characteristic for the invention are set forth in the appended claims.

[0047] Although the invention is illustrated and described herein as embodied in a current mirror and method for operating a current mirror, it is, nevertheless, not intended to be limited to the details shown because various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.

[0048] The construction and method of operation of the invention, however, together with additional objects and advantages thereof, will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0049] FIG. 1 is a schematic circuit diagram of a quasi-differential current mirror;

[0050] FIG. 2 is a schematic circuit diagram of a fully differential current mirror based on a differential stage;

[0051] FIG. 3 is a schematic circuit diagram of a generalized basic circuit diagram of a fully differential current mirror according to the invention;

[0052] FIG. 4 is a schematic circuit diagram of an exemplary embodiment of a fully differential current mirror according to the invention;

[0053] FIG. 5 is a schematic circuit diagram of a circuit configuration for simulating the behavior of the circuit of FIG. 4;

[0054] FIG. 6 is a schematic circuit diagram of a configuration for simulating the behavior of a preferred current mirror according to the invention; and

[0055] FIG. 7 is a graph illustrating a time-dependence of currents in the circuit of FIG. 5.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0056] Referring now to the figures of the drawings in detail and first, particularly to FIG. 1 thereof, there is shown a quasi-differential current mirror, which makes it possible to form a differential signal between various circuit components.

[0057] FIG. 2 shows a possibility of how a fully differential current mirror can be constructed by using a differential stage. Such a current mirror is described, for example, from Bengt Jonsson, “Switched-Current Circuits: from Building Blocks to Mixed Analog-Digital Systems.” lecture in the Department of Electronics, Electronic System Design, Electrum 229, Isafjordsgatan 22-26, S-164 40 Kista, Sweden on Jan. 25, 1999. The following text illustrates particular problems in such a current mirror circuit. This circuit is particularly complex with respect to construction. Wideband applications in which high-frequency currents must be balanced present problems in this circuit because the current balancing is not fast enough or accurate enough.

[0058] FIG. 3 shows a basic circuit diagram of a fully differential current mirror according to the invention, using MOS transistors as current sources and sinks.

[0059] The figure shows a configuration with a=½ because all transistors used here are assumed to be identical. Replacing the simple transistors with cascaded current sources improves the linearity of the circuit.

[0060] FIG. 4 shows a preferred architecture for fully differential current mirrors. FIG. 4 shows a diagrammatic representation illustrating the basic principle of the current mirror circuit according to the invention. FIG. 4 shows a number of voltage/currenht converters “U I”. The voltage/current converters “U I” are in each case shown as a black box with one input and one output. The input is provided in the corresponding symbol at the location of the symbol “U.” The respective output is provided at the location of the symbol “I.” In the simplest case, such a “U I” converter can be constructed as a transistor. In CMOS technology, the “U I” converter is represented by a transistor, the input “U” being provided at the so-called “gate” of the relevant transistor. The output is, then, provided by the two channel terminals of the relevant transistor.

[0061] In the text that follows, only the symbol of a voltage-controlled current source—U I—is used for explaining the architecture. Assuming that all voltage-controlled current sources are identical, the following relationships are obtained for the signal streams in the circuit:

I in + =I 0 +δI;

I in − =−I 0 +δI;

[0062] and

I cor =½Iin++½Iin−=δI,

[0063] where I0 represents the signal current and δI represents the interference quantity (common-mode component) that is subtracted again from the output signal by the circuit architecture.

[0064] The differential current mirror circuit according to the invention as shown in FIG. 4 has two terminals for the differential input signal (Iin+ and, respectively, Iin−) and two terminals for the output signal (Iout+ and, respectively, Iout−). Having in mind undisturbed differential signal processing, the current Iin+=I0 is applied to one input of the circuit and the inverse current Iin+=−I0 is applied to the second input. To illustrate, this means that a current is impressed in one terminal (positive sign) and a current is taken from the other terminal (negative sign). The input current Iin+=I0 is converted (nonlinearly) by the MOS transistors M1 and M2, connected as current sink into a voltage that, at the same time, forms the gate potential of transistors M3, M4, and M5. The integrated MOS transistors M1 to M5 have the same physical or geometric characteristics (width/length) and, thus, have the same electrical characteristics within manufacturing tolerances. For this reason, a precise copy of the input current is provided at the output Iout+:Iout+=−I0 (current mirror function). Analogously, an output current Iout−=I0 appears at the output of the signal branch for the inverted signal current (transistors M6 to M10). Transistors M3 and M8 also represent current sources in each case and, in this embodiment, in each case provide one half of the respective input current as auxiliary current Iaux+=−½Iin+ or, respectively, Iaux−=½Iin−. Adding the two auxiliary currents provides the correction current δI. The conventional current mirror circuit including MOS transistors M11 to M16 produces two copies of this correction current that are in each case added to the output currents Iout+ and, respectively, Iout−. If the input signal is free of interference, the two auxiliary currents cancel one another exactly (δI=Iaux++Iaux−=−½Iin+−½Iin−=−½I0+½I0=0) and the correction circuit does not provide a correction signal.

[0065] If, in contrast, interference signals Idis induced identically on both lines are present at the input of the current mirror circuit according to the invention in addition to the differential input signal (Iin+=IO+Idis and, respectively, Iin−=−IO+Idis), a correction current δI=Iaux++Iaux−=−½Iin+−½Iin−=−½IO+½Idis+½IO+½Idis=Idis results in the circuit according to the invention. Such a correction current is subtracted in each case from the mirrored input current in the two signal branches by the correction circuit: Iout+=−I0−Idis+Idis=−I0 and, respectively, Iout−=I0+Idis−Idis=I0. The output signal provided by the current mirror circuit according to the invention is, thus, the undisturbed input signal that can, then, be processed further by the subsequent circuit blocks.

[0066] The operation of the circuit described is independent of the transfer characteristics of the current mirror. In the example described previously (FIG. 4), a balancing ratio of Iout:Iin of 1:1 was assumed. However, the circuit according to the invention can be configured for any balancing ratios n=Iout:Iin. In such a case, the correction current must also be scaled at the corresponding ratio n to achieve complete elimination of an interference component in the signal. Furthermore, it is not mandatory for the auxiliary current to have half the magnitude of the input current. Rather, an arbitrary fraction or a multiple of the output current can be used for such a purpose. The transfer ratio of the correction current mirror must, then, be correspondingly adapted.

[0067] Furthermore, the current mirror circuit according to the invention can also have a number of output stages, for example, to provide a number of copies of the input current. In such a case, the correction circuit must be constructed with further, appropriately scaled correction current mirrors to be able to correct all output currents of the complete circuit.

[0068] In FIG. 4, the current sinks and sources are simple MOS transistors. To achieve a better transfer accuracy of the current mirror circuit according to the invention, cascode current sources or active current sources can also be used there. Expressed in general terms, any type of a voltage-controlled current source can be used as current sink or current source in the circuit according to the invention.

[0069] In FIG. 4, the areas of the circuit shown there that are outside a so-called correction circuit area correspond to the current mirror circuit of the prior art according to FIG. 1. The correction circuit area is shown in FIG. 4 in a dot-dashed line that only defines an area. This fictitious area boundary has no influence on the operation of the circuit.

[0070] A preferred exemplary embodiment with a=½ and, in each case, identical transistors:

[0071] M1 to M5;

[0072] M6 to M10;

[0073] M11 to M13; and

[0074] M14 to M16 is shown in FIG. 5.

[0075] FIG. 6 shows a configuration for simulating the behavior of a preferred current mirror.

[0076] FIG. 7 shows a time-dependence of currents in the current mirror.

[0077] At the top, the sinusoidal output signal (I(V3)) of the circuit and the sinusoidal input signal (I(I1)) is shown. At the bottom of the diagram, the differential signal of the output currents is shown with and without the common-mode rejection according to the invention. As can be seen from the curve (I(V2)-I(V3)), the rectangular interference (common mode) induced by the pulse sources I2 and I5 (see FIG. 6) is largely rejected by the fully differential circuit.

[0078] The embodiment of the invention with CMOS transistors is shown in FIG. 3, in FIG. 5, and in FIG. 6 that in each case reproduce the same circuit.

[0079] In addition, the signal sources are also connected to the terminals Iin and Iout in FIG. 6. In addition, a voltage supply VDD and auxiliary voltage sources V2 and V3 are illustrated to provide a better understanding of the operation of the circuit.

[0080] The operation of the current mirror circuit according to the invention can be explained in a simple manner with reference to FIG. 4, the statements made also applying to the embodiments according to FIG. 3, FIG. 5, and FIG. 6.

[0081] The invention can also be divided up into the following features:

[0082] Current mirror in which an input current (Iin) is nonlinearly converted into a voltage in a current sink, the voltage being used for driving a current source (Iout) with substantially the same transfer characteristic, the current mirror containing a further voltage-controlled current source that supplies an auxiliary current (a·Iout=a·n·Iin);

[0083] Current mirror as above, an additional voltage-controlled power source in an additional branch generating an additional auxiliary current;

[0084] Current mirror as above, the auxiliary current and the additional auxiliary current being added such that a residual current trigger δI results;

[0085] Current mirror as above, the resultant residual current being subtracted from the differential output signals with a transfer ratio of 1:2a;

[0086] Current mirror as above, where substantially the following applies: a=1:2;

[0087] Current mirror as above, where substantially the following applies: a=1;

[0088] Current mirror as above, at least one of the current sources being formed by at least one transistor; and

[0089] Current mirror as above, the current source containing cascaded transistors.

Claims

1. A method for operating a differential current mirror circuit, which comprises: generating, with devices, at least one copy of a respective one of a positive input current and a negative input current by respectively converting the respective one of the positive input current and the negative input current into a respective voltage; utilizing a respective voltage for respectively driving one current source to generate a copy of a respective one of a positive output current and a negative output current; generating, with a device, one auxiliary current that is one of a multiple and a fraction of each respective one of the positive input current and the negative input current; extracting, with a device, an interference signal by adding the two auxiliary currents; and providing one device each to generate the positive output current and the negative output current by subtracting the interference signal from a respective one of a copy of the positive input current and a copy of the negative input current.

2. The method according to claim 1, which further comprises generating the two auxiliary currents as one half of the respective one of the positive input current and the negative input current.

3. The method according to claim 1, wherein the device for generating the positive output current and the negative output current has at least one complementary current mirror.

4. The method according to claim 1, which further comprises generating a multiple of the copy of the respective one of the positive input current and the negative input current respectively as the positive output current and as the negative output current.

5. The method according to claim 1, which further comprises generating a number of copies of the respective one of the positive input current and the negative input current.

6. A method for operating a differential current mirror circuit, which comprises: generating, with first devices, at least one copy of a respective one of a positive input current and a negative input current by respectively converting the respective one of the positive input current and the negative input current into a respective voltage; generating, with a second device, one auxiliary current that is one of a multiple and a fraction of each respective one of the positive input current and the negative input current; extracting, with a third device, an interference signal by adding the two auxiliary currents; and utilizing a respective voltage for respectively driving one current source to generate a copy of a respective one of a positive output current and a negative output current by providing one device each to generate the positive output current and the negative output current by subtracting the interference signal from a respective one of a copy of the positive input current and a copy of the negative input current.

7. The method according to claim 6, which further comprises generating the two auxiliary currents as one half of the respective one of the positive input current and the negative input current.

8. The method according to claim 6, wherein the device for generating the positive output current and the negative output current has at least one complementary current mirror.

9. The method according to claim 6, which further comprises generating a multiple of the copy of the respective one of the positive input current and the negative input current respectively as the positive output current and as the negative output current.

10. The method according to claim 6, which further comprises generating a number of copies of the respective one of the positive input current and the negative input current.

11. A differential current mirror circuit, comprising: devices generating at least one copy each of a respective one of a positive input current and a negative input current by respectively converting the respective one of the positive input current and the negative input current into a respective voltage; a respective current source connected to said devices, said respective voltage driving each current source to generate a copy of a respective one of a positive output current and a negative output current; a device connected to a respective one of said current sources and to said devices and respectively generating one auxiliary current that is one of a multiple and a fraction of the respective one of the positive input current and the negative input current; a device connected to a respective one of said current sources and to said devices and extracting an interference signal by adding the two auxiliary currents; and devices each generating the positive output current and the negative output current by subtracting the interference signal from a respective one of a copy of the positive input current and the negative input current.

12. The differential current mirror circuit according to claim 11, wherein said device generates the two auxiliary currents as one half of the respective one of the positive input current and the negative input current.

13. The differential current mirror circuit according to claim 11, wherein said device for generating the positive output current and the negative output current has at least one complementary current mirror.

14. The differential current mirror circuit according to claim 11, wherein said devices each generating the positive output current and the negative output current generate a multiple of the copy of the respective one of the positive input current and the negative input current respectively as the positive output current and as the negative output current.

15. The differential current mirror circuit according to claim 11, wherein said devices generate a number of copies of the respective one of the positive input current and the negative input current.

16. A differential current mirror circuit, comprising: first means for generating at least one copy each of a respective one of a positive input current and a negative input current by respectively converting the respective one of the positive input current and the negative input current into a respective voltage; a respective current source connected to said devices, said respective voltage driving each current source to generate a copy of a respective one of a positive output current and a negative output current; second means for respectively generating one auxiliary current that is one of a multiple and a fraction of the respective one of the positive input current and the negative input current, said second generating means connected to a respective one of said current sources and to said devices; means for extracting an interference signal by adding the two auxiliary currents, said extracting means connected to a respective one of said current sources and to said first means; and third means for respectively generating the positive output current and the negative output current by subtracting the interference signal from a respective one of a copy of the positive input current and the negative input current.

17. The differential current mirror circuit according to claim 16, wherein said second means generates the two auxiliary currents as one half of the respective one of the positive input current and the negative input current.

18. The differential current mirror circuit according to claim 16, wherein said third means has at least one complementary current mirror.

19. The differential current mirror circuit according to claim 16, wherein said third means generate a multiple of the copy of the respective one of the positive input current and the negative input current respectively as the positive output current and as the negative output current.

20. The differential current mirror circuit according to claim 16, wherein said first means generate a number of copies of the respective one of the positive input current and the negative input current.