The present invention relates to current mirror circuits and methods. The present invention is described herein primarily in relation to, but not limited to, use with parallel light-emitting diode (LED) strings.
Current mirror circuits have recently been considered for use in reducing current imbalance in parallel LED strings. The lifetime of LED devices is sensitive to operating currents. If LED devices are arranged in parallel strings, for example, as a means to increase power and light output, the slight differences among LED devices would cause current imbalance among LED strings, therefore affecting the light uniformity and lifetime of the overall LED system. There are many current balancing techniques. However, the new concept of self-configurable and re-configurable current mirror circuits that do not require using a predetermined current reference and a separate power supply to provide a current reference was disclosed in PCT publication WO 2012/095680. A typical embodiment of such circuits is shown in
For current mirror circuits, it is necessary to choose a current reference for other current sources to follow. Where current mirror circuits are used for parallel LED strings, the current source with the smallest current should be chosen as the current reference. In the circuit shown in
However, while the circuits in
Consequently, the voltage at point A will be very low. It will be equal to the sum of the voltage of the collector-emitter voltage of transistor Q3 and the voltage across RE of the faulty string. Since RE is a resistor with a low resistance value (typically a few ohms) and the current coming from the base-collector diode of S3 is small, the voltage across RE of the faulty string is also very small. Such a low voltage at point A will mislead the current mirror detection circuit to wrongly select this faulty string as the current reference.
It is an object of the present invention to overcome or ameliorate at least one of the disadvantages of the prior art, or to provide a useful alternative.
The present invention provides, in a first aspect, a current mirror circuit for balancing respective currents in a plurality of parallel circuit branches in a target circuit, the current mirror circuit including:
a plurality of balancing transistors, each having a collector, an emitter, and a base, the collector and emitter of each balancing transistor connected in series with a respective circuit branch;
a selection circuit that connects the circuit branch having the smallest current amongst the circuit branches to the bases of each balancing transistor; and
an isolation circuit that isolates circuit branches having an open circuit fault from the rest of the target circuit.
Preferably, the isolation circuit disconnects the circuit branch having the smallest current amongst the circuit branches from the base of the balancing transistors of circuit branches having an open circuit fault, thereby isolating circuit branches having an open circuit fault from the rest of the target circuit.
Preferably, the isolation circuit includes a fault detection logic circuit to detect whether there is an open circuit fault in one or more of the circuit branches, thereby allowing the isolation circuit to isolate those said one or more circuit branches having an open circuit fault from the rest of the target circuit.
Also preferably, the isolation circuit includes a plurality of fault detection logic circuits, each corresponding to a respective circuit branch to detect whether there is an open circuit fault in said respective circuit branch, thereby allowing the isolation circuit to isolate said respective circuit branch from the rest of the target circuit where said respective circuit branch has an open circuit fault.
Preferably, the isolation circuit includes a plurality of isolation switches, each corresponding to a respective circuit branch and openable to disconnect the circuit branch having the smallest current amongst the circuit branches from the base of the balancing transistor of said respective circuit branch.
Preferably, the selection circuit includes a plurality of switching transistors, each switching transistor having a collector, an emitter, and a base, the collector of each switching transistor connected to a respective circuit branch, the emitter of each switching transistor connected to the base of the balancing transistor of said respective circuit branch, and the base of each switching transistor connected to the isolation switch corresponding to said respective circuit branch.
Preferably, the current mirror circuit includes at least one opamp connected between two of the circuit branches for feedback assistance, the opamp having an inverting input connected to one of said two circuit branches, a non-inverting input connected to the other of said two circuit branches, and an output connected to the base of the balancing transistor of one of said two circuit branches, the isolation circuit including at least one feedback isolation switch to isolate the circuit branch connected to the non-inverting input from the rest of the target circuit where the circuit branch connected to the non-inverting input has an open circuit fault.
Preferably, the isolation circuit includes an isolation resistor connected to the non-inverting input such that the non-inverting input is not floating when the at least one feedback isolation switch is opened.
The present invention also provides, in a second aspect, a method of balancing respective currents in a plurality of parallel circuit branches in a target circuit, the method including:
providing a plurality of balancing transistors, each having a collector, an emitter, and a base, the collector and emitter of each balancing transistor connected in series with a respective circuit branch;
connecting the circuit branch having the smallest current amongst the circuit branches to the bases of each balancing transistor; and
isolating circuit branches having an open circuit fault from the rest of the target circuit.
Preferably, the method includes disconnecting the circuit branch having the smallest current amongst the circuit branches from the base of the balancing transistors of circuit branches having an open circuit fault, thereby isolating circuit branches having an open circuit fault from the rest of the target circuit.
Preferably, the method includes providing at least one opamp connected between two of the circuit branches for feedback assistance, the opamp having an inverting input connected to one of said two circuit branches, a non-inverting input connected to the other of said two circuit branches, and an output connected to the base of the balancing transistor of one of said two circuit branches, the method including isolating the circuit branch connected to the non-inverting input from the rest of the target circuit where the circuit branch connected to the non-inverting input has an open circuit fault.
Preferred embodiments in accordance with the best mode of the present invention will now be described, by way of example only, with reference to the accompanying figures, in which:
a) and 5(b) are schematics of equivalent circuits to the prior art circuit of
a), 6(b), and 6(c) are graphs showing transient current waveforms resulting from an open circuit fault test on a prior art current mirror circuit connected to three LED strings;
a) and 8(b) are schematics of fault detection logic circuits in accordance with embodiments of the present invention;
a) and 10(b) are schematics of equivalent circuits to the circuit of
a) and 11(b) are schematics of equivalent circuits to the circuit of
a) is a schematic of a generalized current mirror circuit for a 2-string LED system in accordance with an embodiment of the present invention;
b) is a schematic of a generalized current mirror circuit for a multi-string LED system in accordance with an embodiment of the present invention;
Referring to the figures, an embodiment of the present invention provides a current mirror circuit 1 for balancing respective currents in a plurality of parallel circuit branches 2 in a target circuit 3. The current mirror circuit includes a plurality of balancing transistors 4, each having a collector 5, an emitter 6, and a base 7, the collector 5 and emitter 6 of each balancing transistor connected in series with a respective circuit branch 2. A selection circuit 8 connects the circuit branch 2 having the smallest current amongst the circuit branches 2 to the bases 7 of each balancing transistor 4. An isolation circuit 9 isolates circuit branches 2 having an open circuit fault from the rest of the target circuit 3.
In the present embodiment, the isolation circuit 9 disconnects the circuit branch 2 having the smallest current amongst the circuit branches 2 from the base 7 of the balancing transistors 4 of circuit branches having an open circuit fault, thereby isolating circuit branches 2 having an open circuit fault from the rest of the target circuit 3. The isolation circuit 9 also includes a fault detection logic circuit 10 to detect whether there is an open circuit fault in one or more of the circuit branches 2, thereby allowing the isolation circuit to isolate those said one or more circuit branches having an open circuit fault from the rest of the target circuit 3.
More particularly, in the present embodiment, the isolation circuit 9 includes a plurality of fault detection logic circuits 10, each corresponding to a respective circuit branch 2 to detect whether there is an open circuit fault in said respective circuit branch, thereby allowing the isolation circuit to isolate said respective circuit branch from the rest of the target circuit 3 where said respective circuit branch has an open circuit fault.
The isolation circuit 9 includes a plurality of isolation switches 11, each corresponding to a respective circuit branch 2 and openable to disconnect the circuit branch having the smallest current amongst the circuit branches from the base 7 of the balancing transistor 4 of said respective circuit branch. More particularly, the selection circuit 8 includes a plurality of switching transistors 12, each switching transistor having a collector 13, an emitter 14, and a base 15. The collector 13 of each switching transistor is connected to a respective circuit branch 2, the emitter 14 of each switching transistor is connected to the base 7 of the balancing transistor 4 of said respective circuit branch, and the base 15 of each switching transistor is connected to the isolation switch 11 corresponding to said respective circuit branch.
In the present embodiment, the current mirror circuit 1 includes at least one opamp 16 connected between two of the circuit branches 2 for feedback assistance. The opamp 16 has an inverting input 17 connected to one of said two circuit branches 2, a non-inverting input 18 connected to the other of said two circuit branches 2, and an output 19 connected to the base 7 of the balancing transistor 4 of one of said two circuit branches 2. The isolation circuit 9 includes at least one feedback isolation switch 20 to isolate the circuit branch 2 connected to the non-inverting input 18 from the rest of the target circuit 3 where the circuit branch connected to the non-inverting input has an open circuit fault. The isolation circuit 9 also includes an isolation resistor 21 connected to the non-inverting input 18 such that the non-inverting input is not floating when the at least one feedback isolation switch 20 is opened.
The selection circuit 8 of the present embodiment uses selection diodes D1 to DN to connect the circuit branch 2 having the smallest current amongst the circuit branches 2 to the bases 7 of each balancing transistor 4. In particular, there is a selection diode for each circuit branch 2, with each selection diode connected from a respective circuit branch 2 and forwardly biased towards a first point “a”. Each switching transistor 12 is connected to a second point “b”, with the first point “a” and the second point “b” interconnected through a limiting resistor RZ.
With the switching transistors 12, when the current differences among the circuit branches 2 are large, the switching transistors 12 perform like simple switches, as shown in
It will also be appreciated that in some embodiments simple switches can be used instead of the switching transistors 12, in which case, the current mirror circuit 1 will take the form shown in
In other embodiments, the selection circuit 8 can take other forms. In one other embodiment, the selection circuit 8 includes a network of selection resistors connected between the circuit branches 2 and the switching transistors 12. The network of selection resistors is configured to selectively close one of the switching transistors 12 to selectively connect the circuit branch 2 having the smallest current amongst the circuit branches 2 to the bases 7 of each balancing transistor 4.
Such selection circuits 8 have been described in WO 2012/095680, which is herein incorporated by reference.
The present invention also provides a method of balancing respective currents in a plurality of parallel circuit branches in a target circuit. An embodiment of the method provided includes: providing a plurality of the balancing transistors 4, each having the collector 5, the emitter 6, and the base 7, the collector 5 and emitter 6 of each balancing transistor connected in series with a respective circuit branch 2; connecting the circuit branch 2 having the smallest current amongst the circuit branches 2 to the bases 7 of each balancing transistor 4; and isolating circuit branches 2 having an open circuit fault from the rest of the target circuit 3.
This embodiment of the method includes disconnecting the circuit branch 2 having the smallest current amongst the circuit branches 2 from the base 7 of the balancing transistors 4 of circuit branches having an open circuit fault, thereby isolating circuit branches having an open circuit fault from the rest of the target circuit 3.
The present embodiment also includes providing at least one opamp 16 connected between two of the circuit branches 2 for feedback assistance, the opamp 16 having an inverting input 17 connected to one of said two circuit branches, a non-inverting input 18 connected to the other of said two circuit branches, and an output 19 connected to the base 7 of the balancing transistor 4 of one of said two circuit branches, with the embodiment further including isolating the circuit branch 2 connected to the non-inverting input 18 from the rest of the target circuit 3 where the circuit branch connected to the non-inverting input has an open circuit fault.
Thus, in order to improve the self-configurable and re-configurable current mirror circuit of the prior art so that it can cope with an open circuit fault without using a separate power supply for a separate predetermined current reference, new measures are introduced in the present invention to isolate the open-circuited current string and the effects of its associated control electronics.
Looking at the figures in further detail,
Before the use of the current mirror circuit 1 of the embodiment shown in
However, it should also be noted that even if the Master string 23 has an open circuit fault and has to be isolated, current balancing can still be achieved among the Slave strings 24. The current mirror circuit 1 includes the following:
1. Isolation switches 11 (labeled as “Switch C” in the figures) are used for isolating faulty LED strings 22 from the rest of the target circuit 3. The isolation switches C are turned off (i.e. opened) when an open circuit fault occurs in the LED string 22 to which it is connected.
2. Feedback isolation switches 20 (labeled “Switch A” and “Switch B” in the figures) are used for isolating the LED string 23, and its associated control circuitry, connected to the non-inverting inputs 18 of the opamps 16. It should be noted that the control circuitry of the central LED string 23 in
3. Isolation resistor 21 (labeled “Rk” in the figures) is included to ensure that the non-inverting inputs 18 of the opamps 16, to which it is connected, are not floating when feedback isolation switch A and feedback isolation switch B are turned off (i.e. opened). Isolation resistor Rk (typically 1 kilo-Ohm) is chosen to be much larger than RE (typically less than a few Ohm) and much less than the input impedance of the inputs of the opamps 16 (typically higher than the order of Mega-Ohms).
4. Open circuit fault detection logic circuits 10 detect the open circuit faults in their respective LED strings 22. Two versions of these logic circuits are shown in
The logic circuits 10 highlighted in
Open-Circuit Fault in a Slave String 24:
Now, consider the situation when an open circuit fault occurs in one of the Slave strings 24. Slave strings 24 are those which provide signals to the inverting inputs 17 of the opamps 16. In particular, assume that the Slave string 24 shown on the right-hand side of
Open-Circuit Fault in the Master String 23:
Master string 23 is the LED string 22 which provides signals to the non-inverting inputs 18 of the opamps 16. In
The described concept can be extended to a multiple number of parallel current strings 22 (i.e. circuit branches 2) as shown in
Experimental Verification:
The circuit example shown
A second test was also conducted with the one of the Slave strings (String-3) cut off after normal operation. The measured currents of the three strings are recorded in
The present invention advantageously provides current mirror circuits that are self-configurable and re-configurable, and that can continue to operate to balance parallel current sources even if one current source is cut off, such as with an open circuit fault. The present invention provides mechanisms to isolate current sources with open circuit faults. The present invention is well suited to, but is not limited to, reducing current imbalance in parallel light-emitting diode (LED) strings. Particular applications include high-power LED lighting applications such as outdoor and street lighting.
Although the invention has been described with reference to specific examples, it will be appreciated by those skilled in the art that the invention can be embodied in many other forms. It will also be appreciated by those skilled in the art that the features of the various examples described can be combined in other combinations.
Filing Document | Filing Date | Country | Kind |
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PCT/CN2012/084965 | 11/21/2012 | WO | 00 |