Patent Application
20090153234
The present disclosure is generally related to current mirror devices and methods of using current mirror devices.
Advances in electronic device technology have resulted in smaller devices that consume less power during operation. Reduced power consumption is often a result of smaller device features and devices operating at lower supply voltages. However, as supply voltages decrease, device operation often becomes more sensitive to fluctuations in the supply voltage. In addition, some devices include multiple voltage domains to accommodate circuits that operate at different supply voltages. However, a supply voltage for a second voltage domain generated by circuitry of a first voltage domain may be sensitive to fluctuations of the supply voltage of the first voltage domain.
Conventional current mirror circuits require voltage supply headroom that may be unacceptable for certain low voltage applications. In addition, the output current of a traditional current mirror circuit has a dependency on the supply voltage. In addition, an output with a fast voltage swing may introduce coupling between the output, gate, and source, of transistors of a conventional current mirror circuit. Thus, conventional circuit mirror circuits may be impractical to drive low voltage, high frequency loads.
In a particular embodiment, a circuit is disclosed that includes a current mirror including a first set of transistors and a second set of transistors. At least one of the transistors in the first set of transistors and at least one of the transistors in the second set of transistors is in a cascode arrangement. The circuit includes a first operational amplifier coupled to the first set of transistors. The circuit also includes a second operational amplifier coupled to the second set of transistors.
In another embodiment, the circuit includes a current mirror including a first transistor pair and a second transistor pair. The first transistor pair includes a first transistor and a second transistor. The second transistor pair includes cascode transistors. The circuit also includes a first operational amplifier having an output coupled to both the first transistor and the second transistor.
In another embodiment, the circuit includes a current mirror including a first set of transistors and a second set of transistors. At least one transistor in the second set of transistors is disposed in a cascode arrangement. The circuit includes a first operational amplifier coupled to the first set of transistors. The circuit also includes a second operational amplifier coupled to the second set of transistors. The circuit includes a current source coupled to one of the transistors of the second set of transistors. The first operational amplifier has a first input of a first bias voltage and the second operational amplifier has a first input of a second bias voltage. The first set of transistors is coupled to a supply voltage. The first bias voltage is different than the supply voltage. A first of the transistors of the second set of transistors is coupled to a second input to the first operational amplifier to define a first feedback loop. An output of one of the transistors in the first set of transistors is provided as a second input to the second operational amplifier to define a second feedback loop. A second of the transistors of the second set of transistors has an output that drives an output current.
In another embodiment, a method of using a circuit device is disclosed. The method includes receiving a first bias voltage at a first input of a first operational amplifier coupled to a first set of transistors. The method includes receiving a second bias voltage at a first input of a second operational amplifier coupled to a second set of transistors. The first set of transistors and the second set of transistors form a current mirror. The current mirror is coupled to a supply voltage, and the first bias voltage differs from the supply voltage. A first of the transistors in the second set of transistors is coupled to a second input of the first operational amplifier to define a first feedback loop. An output of one of the transistors in the first set of transistors is provided as a second input to the second operational amplifier to define a second feedback loop. A second of the transistors of the second set of transistors has an output that drives an output current of the current mirror.
One particular advantage provided by embodiments of the current mirror is robust operation since the output current is insensitive to variations in the voltage supply. Another advantage is that a voltage domain may be supplied with an output voltage level held at a reference voltage level that is independent of the supply voltage of the current mirror circuit. Another advantage is that low power operation is enabled by operation at a low supply voltage. The disclosed current mirror circuit device can drive a high frequency oscillator with lower supply voltage, better output impedance, and increased insensitivity to fast output voltage swings.
Other aspects, advantages, and features of the present disclosure will become apparent after review of the entire application, including the following sections: Brief Description of the Drawings, Detailed Description, and the Claims.
Referring to
The second operational amplifier 110 has a first input 114 responsive to a node 123 coupled to the first transistor 122 and a second input 112 which is responsive to a second bias voltage (Vbias2). In a particular embodiment, the second bias voltage provided at input 112 is substantially fixed and independent of variations of a supply voltage 118 provided to the current mirror via current paths 120 and 130. In a particular example, the second bias voltage can be set to a range of available voltages, such as the supply voltage 118 less the drain to source saturation voltage of a single transistor.
The transistors 122 and 124 in the first current path 120 are coupled to receive an input from a current source 126 that is coupled to the node 125 and to ground 128. The transistors 132 and 134 in the second current path 130 are coupled to provide an output voltage and an output current 136 at output node 135. The output current 136 is provided by an output of the fourth transistor 134. The output voltage of the current mirror is limited by the second bias voltage.
In a particular embodiment, the first transistor pair (122 and 132) is coupled to the supply voltage 118, and the supply voltage 118 is different from the first bias voltage 104 and the second bias voltage 112. Thus, variations in the supply voltage 118 are isolated from other parts of the circuit 100 by use of the bias voltages 104 and 112.
During operation, an output of the third transistor 124 is provided as an input to the first operation amplifier 102 via node 125 to define a first feedback loop. In addition, an output of the first transistor 122 is provided as an input to the second operational amplifier 110 via node 123 to define a second feedback loop. The feedback loops enable the operational amplifiers 102 and 110 to maintain constant bias independent of the supply voltage 118.
In a particular embodiment, each of the transistors 122, 124, 132, 134 in the first and second sets of transistors that define the current mirror are field effect type transistors as illustrated. An example of a suitable field effect type transistor is a metal oxide field effect transistor (MOSFET).
In another embodiment illustrated in
Referring to
The method further includes providing current to at least one of the transistors in the second set of transistors from a current source. An example of an appropriate current source is the current source 126 shown in
The method further includes adjusting a first output of the first operational amplifier based on a first feedback signal received at a second input of the first operational amplifier, as shown at 308. A first of the transistors of the second set of transistors is coupled to the second input to the first operational amplifier to define a first feedback loop. For example, the first output of the first operational amplifier 102 may be adjusted based on a feedback signal received at the second input 106 provided by the first feedback loop coupled to node 125, as shown in
The method further includes adjusting a second output of the second operational amplifier based on a second feedback signal received at a second input of the second operational amplifier, at 310. An output of one of the transistors in the first set of transistors is provided as the second input to the second operational amplifier to define a second feedback loop. For example, the second output 116 of the second operational amplifier 110 may be adjusted in response to an input received at 114 via the second feedback loop provided in response to transistor 122 coupled via node 123, as shown in
The method further includes providing the first output from the first operational amplifier to the first set of transistors and providing the second output of the second operational amplifier to the second set of transistors of a current mirror that mirrors current from the current source to provide a resulting output current, as shown at 312. For example, the first output 108 from the first operational amplifier 102 may be provided to the current mirror including transistors 122, 132, 124, 134, such that the current provided through a first current path 120 is mirrored and a substantially equal current is then provided via an output of a transistor of the second current path 130, which drives an output current 136 that substantially matches the input current 126, as shown in
In a particular embodiment, the second bias voltage is a fixed and substantially stable voltage that may be provided by a reference voltage circuit. In a particular embodiment, the supply voltage, such as the supply voltage 118 in
Referring to
With the disclosed circuits and systems, an improved current mirror may exhibit higher effective output impedance, lower supply voltage and increased insensitive to fast output voltage swing. Two operational amplifier loops are used to regulate top and bottom transistor pairs in a cascode arrangement of a current mirror device to improve a resulting output impedance and to reduce supply voltage requirements. In addition, while a first and second current path has been shown in
In addition, the disclosed circuit device may beneficially provide a current mirror that can adjust quickly to high speed analog circuits, such as oscillator and similar applications. With the disclosed circuit device, the current ratio of the current mirror is substantially independent of the supply voltage. Therefore, the disclosed circuit has decreased sensitivity of the output current versus the supply voltage to the current mirror circuit. As such, the disclosed current mirror circuit with multiple operational amplifiers provides an improvement for high speed analog circuit device operations at low voltages.
The illustrations of the embodiments described herein are intended to provide a general understanding of the structure of the various embodiments. The illustrations are not intended to serve as a complete description of all of the elements and features of apparatus and systems that utilize the structures or methods described herein. Many other embodiments may be apparent to those of skill in the art upon reviewing the disclosure. Other embodiments may be utilized and derived from the disclosure, such that structural and logical substitutions and changes may be made without departing from the scope of the disclosure. Additionally, the illustrations are merely representational and may not be drawn to scale. Certain proportions within the illustrations may be exaggerated, while other proportions may be reduced. Although specific embodiments have been illustrated and described herein, it should be appreciated that any subsequent arrangement designed to achieve the same or similar purpose may be substituted for the specific embodiments shown. This disclosure is intended to cover any and all subsequent adaptations or variations of various embodiments. Combinations of the above embodiments, and other embodiments not specifically described herein, will be apparent to those of skill in the art upon reviewing the description. Accordingly, the disclosure and the figures are to be regarded as illustrative rather than restrictive.
The Abstract of the Disclosure is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. In addition, in the foregoing Detailed Description, various features may be grouped together or described in a single embodiment for the purpose of streamlining the disclosure. This disclosure is not to be interpreted as reflecting an intention that the claimed embodiments require more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive subject matter may be directed to less than all of the features of any of the disclosed embodiments. Thus, the following claims are incorporated into the Detailed Description, with each claim standing on its own as defining separately claimed subject matter.
The above-disclosed subject matter is to be considered illustrative, and not restrictive, and the appended claims are intended to cover all modifications, enhancements, and other embodiments, which fall within the true spirit and scope of the present invention. Thus, to the maximum extent allowed by law, the scope of the present invention is to be determined by the broadest permissible interpretation of the following claims and their equivalents, and shall not be restricted or limited by the foregoing detailed description.
