BRIEF DESCRIPTION OF THE DRAWINGS
Referring now to the drawings, where like numerals represent like elements in several views:
FIG. 1 illustrates a basic prior art current mirror utilizing a pair of transistors;
FIG. 2 is a graph of the output current vs. output voltage of the current mirror of FIG. 1;
FIG. 3 illustrates a prior art cascode current mirror arrangement;
FIG. 4 is a graph of the output current vs. output voltage of the cascode current mirror of FIG. 3;
FIG. 5 is a schematic of an exemplary current mirror circuit formed in accordance with the present invention to provide a high output impedance when used in situations powered by a relatively low voltage;
FIG. 6 illustrates a specific embodiment of the control circuit within the current mirror of the present invention;
FIGS. 7-10 illustrate various alternative embodiments of the present invention, utilizing different interconnections and devices along the input, reference branch of the current mirror; and
FIG. 11 illustrates an exemplary multi-stage cascade arrangement of the current mirror of the present invention.