Current mirror with improved output impedance at low power supplies

Information

  • Patent Application
  • 20070194838
  • Publication Number
    20070194838
  • Date Filed
    February 15, 2007
    17 years ago
  • Date Published
    August 23, 2007
    17 years ago
Abstract
A current mirror circuit arrangement is formed to maintain a high output impedance when utilized with a relatively low voltage power supply. A common mode voltage regulator circuit is utilized in conjunction with the output branch of the current mirror to eliminate the need for an additional active device in series with the output transistor of a current mirror to control its drain voltage. The elimination of the second active device thus increases the available headroom for the output branch (i.e., adds one VDS). The increased headroom in the inventive current mirror is particularly advantageous for low voltage applications, since it is capable of maintaining the high output impedance required for accurate mirroring of the input current.
Description

BRIEF DESCRIPTION OF THE DRAWINGS

Referring now to the drawings, where like numerals represent like elements in several views:



FIG. 1 illustrates a basic prior art current mirror utilizing a pair of transistors;



FIG. 2 is a graph of the output current vs. output voltage of the current mirror of FIG. 1;



FIG. 3 illustrates a prior art cascode current mirror arrangement;



FIG. 4 is a graph of the output current vs. output voltage of the cascode current mirror of FIG. 3;



FIG. 5 is a schematic of an exemplary current mirror circuit formed in accordance with the present invention to provide a high output impedance when used in situations powered by a relatively low voltage;



FIG. 6 illustrates a specific embodiment of the control circuit within the current mirror of the present invention;



FIGS. 7-10 illustrate various alternative embodiments of the present invention, utilizing different interconnections and devices along the input, reference branch of the current mirror; and



FIG. 11 illustrates an exemplary multi-stage cascade arrangement of the current mirror of the present invention.


Claims
  • 1. A current mirror comprising an input circuit branch including at least one reference transistor, defined as including a control input, and an input current (Iin) applied to the at least one reference transistor;an output circuit branch including a single transistor with a control input; anda differential control circuit coupled between a bias voltage source (VB) and the input of the single transistor forming the output circuit branch, the differential control circuit configured to adjust the common mode voltage so as to maintain the voltage across the single transistor (VOUT) at an essentially constant value.
  • 2. A current mirror as defined in claim 1 wherein the input circuit branch comprises a pair of reference transistors.
  • 3. A current mirror as defined in claim 2 wherein at least one reference transistor of the pair of reference transistors is coupled to exhibit diode properties.
  • 4. A current mirror as defined in claim 1 wherein the transistors comprise bipolar devices.
  • 5. A current mirror as defined in claim 1 wherein the transistors comprise MOS devices.
  • 6. A current mirror as defined in claim 1 wherein the differential control circuit further comprises an amplifier coupled at a first input to the bias voltage source and at a second input to the single transistor of the output circuit branch, the output of the differential amplifier representing the difference between the bias control voltage VB and VOUT;a regulator coupled to the output of the differential amplifier for regulating the common mode voltage applied to the input of the output circuit branch single transistor; anda common mode circuit responsive to the output of the regulator for providing a pair of common mode output signals.
Provisional Applications (1)
Number Date Country
60774944 Feb 2006 US