Patent Application
20050253645
Embodiments of the present invention relate to the field of integrated circuits, and more specifically, to current output stages.
A simple current mirror can be used as a current output stage. However, in general, the output impedance of a simple current mirror is too low to allow good linearity into a load with large voltage excursions. The usual method of improving the output resistance is to cascode the output transistor of the current mirror. Unfortunately, cascoding the output section of a high current mirror requires a significant amount of voltage headroom, which detracts from the maximum available output swing available. In addition, the cascode transistor will need to handle the full output current, and therefore, must be a relatively large component. This is especially true if the control terminal (e.g., drain or base) of the cascode transistor needs to be extended for electrostatic discharge (ESD) protection reasons. It would be preferable if a current output stage can provide a high-output impedance without occurring the above mentioned disadvantages.
In accordance with an embodiment of the present invention, a current output stage includes a voltage follower circuit, a first current mirror and a second current mirror. A node of the voltage follower circuit provides a voltage that follows a voltage at the output of the current output stage. An input of the first current mirror is connected (e.g., by a current path of a transistor) to the node of the voltage follower circuit that follows the voltage at the output of the current output stage. An output of the first current mirror is connected to an input of the second current mirror. An output of the second current mirror is connected to the input of the current output stage. Through this arrangement, a proportion of the output current (produced at the output of the current output stage) is fed back to the input of the current output stage, allowing relatively small voltage and current swings at the input of the current output stage, while allowing relative large voltage and current swings at the output of the current output stage.
Some embodiments of the present provide a current output stage that has essentially a one-sided output that is ideal for signals that move only in one direction relative to a static zero operating point. By providing a suitable offset bias current, embodiments of the present invention can provide a bi-directional output.
Some embodiments of the present invention can also be used to produce a single ended output from a differential input.
Some embodiments of the present invention provide current sink output stages. Other embodiments of the present invention provide current source output stages. Still other embodiments of the present invention use both a current sink output stage and a current source output stage to produce a differential push-pull output.
Further embodiments and details, and the features, aspects, and advantages of the present invention will become more apparent from the detailed description set forth below, the drawings and the claims.
The overall function of the current output stages described herein behave in a similar way to that of simple current mirrors. However, output stages of the present invention have a number of advantages when driving reasonably large currents (on the order of milli-Amps) into a load with large voltage excursions.
Still referring to
Referring now to
In accordance with an embodiment of the present invention, the current mirror 104 includes a transistor M7 and a transistor M8, which are connected in a common source configuration and a common gate configuration. The gate and the drain of transistor M7 are connected together. The drain of transistor M7 forms the input of the current mirror 104, and the drain of transistor M8 forms the output of the current mirror 104. Transistors M7 and M8 are shown as being PMOS transistors, with their sources connected to the supply voltage rail VDD (e.g., 3.3V).
In accordance with an embodiment of the present invention, the current mirror 106 includes a transistor M9 and a transistor M10 that are connected in a common source configuration and a common gate configuration. The gate and the drain of transistor M9 are connected together. The drain of transistor M9 forms the input of the current mirror 106, and the drain of transistor M10 forms the output of the current mirror 106. Transistors M9 and M10 are shown as being N-channel complimentary-metal-oxide-semiconductor (NMOS) transistors, with their sources connected to the supply voltage rail VSS (e.g., 0V).
Since transistor M6 is connected in a common source and a common gate configuration with transistors M7 and M8 of the current mirror 104, the current at the drain of transistor M6 will be equal to the currents at the input and the output of the current mirror 104 (assuming for simplicity that transistors M6, M7 and M8 are the same size, which they need not be). The current at the drain of transistor M6 flows through transistor M5 and through transistor M4 to the supply rail voltage VSS, providing no contribution to the output current (Iout). The current at the drain of transistor M7 (which is the same as the current at the drain of transistor M6, as mentioned above, assuming common sized transistors) flows through transistor M3, causing substantially the same current to flow through transistor M3 as through transistor M5. This arrangement will cause the voltage at the source of transistor M3 to follow the voltage at the source of transistor M5, which is the same as the output voltage (i.e., the source-drain voltage across transistor M1). Stated another way, transistor M5 is used to sense the output voltage at its source, while transistor M3 is used to replicate the same output voltage at its source. Hence transistor M1 and transistor M2 experience the same drain-source voltage conditions and therefore the drain currents of transistor M1 and transistor M2 will track each other.
The transistor pair M7 and M8 of current mirror 104, and the transistor pair M9 and M10 of current mirror 106, redirect the drain current of transistor M2 to the input node (Nin) of the current output stage, where it cancels a substantial portion of the input current (Iin). In this manner, the only node that sees a large voltage swing is the output node (Nout) of the current output stage.
Transistors M7 and M6 (which implement a current mirror) ensure that that the current density through transistor M5 tracks with the current density through transistor M3. Since the current density in transistors M5 and M3 are the same, then the voltage at the drain of transistor M2 will accurately track the voltage at the output node (Nout) of the current output stage.
The overall current gain from the input node (Nin) to the output node (Nout) is controlled by the ratio of the sizes of transistors M1 and M2, as well as the feedback mirror ratios. These internal mirror transistors are shown as uncascoded for clarity, but in practice they would likely be cascoded to reduce offset errors and power supply variation sensitivity. Accordingly, embodiments of the present invention also cover current mirrors where the transistors of the mirrors are cascoded.
The current output stage circuit achieves good matching under all conditions because of the thermal matching of transistors M1, M2 and M4. The thermal matching is due to the fact that all three transistors have the same current density and the same drain-source voltage.
It is noted that since transistors M4 and M1 are in parallel, it is possible to implement the same functionality by incorporating the effects of transistor M4 into transistor M1. This can be accomplished by making M1 larger in size, thus effectively eliminating transistor M4. However, it is believed that circuits can be more easily implemented if transistors M4 and M1 are kept separate transistors as shown in the given figures.
A biasing current Iout can be added at the output node (Nout), as shown in
There is a small feedback response lag at the input node (Nin) due to the delay of the feedback loop that includes transistors M2, M3, M7, M8, M9 and M10. This feedback lag helps speed-up the transient response by applying a little peaking in the frequency response characteristics. If necessary, the size of the transistors can be adjusted, and/or pole-zero type compensation can be added, to control the resulting peaking. The overall current gain from the input (Nin) to the output (Nout) influences the bandwidth of the output stage, and in turn the amount of peaking seen. Experimentation as shown that a current gain ratio of around eight seems to provide the best results. This can be accomplished, e.g., by making transistor M1 eight times as large as transistor M2.
The above described current output stages have essentially a one-sided output that is ideal for signals that move only in one direction relative to a static (e.g., zero) operating point. Bi-directional modulation requires a suitable input bias current Iq_in to ensure class-A operation. The application of an additional suitably scaled bias current at the output, Iq_out, will prevent the added input bias current from flowing into the load. If a differential input and a single-ended output are required, then the current output stage circuit variant shown in
While in the above discussed FIGS. transistors M1-M5 are shown as NMOS transistors, and transistors M6-M7 are shown as PMOS transistors, one of ordinary skill in the art would understand that transistors M1-M5 can be replaced with N-channel bipolar junction (BJT) transistors, and transistors M6-M7 can be replaced with P-channel BJT transistors. Other types of transistors can also be used.
The above discussed circuit schematics, as shown, provide current sink output stages, which can also be also referred to as current sink drivers. One of ordinary skill in the art would appreciate that the circuits could essentially be flipped by replacing NMOS transistors with PMOS transistors, and PMOS transistors with NMOS transistors, and appropriately adjusting the supply rail voltages. The same holds true for replacing N-channel BJT transistors with P-channel BJT transistor, and replacing P-channel BJT transistors with N-channel BJT transistors. The flipped circuits would result in current source drivers, instead of current sink drivers.
Referring now to
Embodiments of the present invention can be useful, e.g., in the area of optical storage devices. For a more specific example, embodiments of the present invention can be used for driving signals from a main circuit board of an optical storage device, through a flex circuit, to an optical pickup unit (OPU) that includes a laser driver, or vice versa. Embodiments of the present invention are also useful for other applications where it is desirable to provide high-speed, high-accuracy and high output swing from a single compact design. Accordingly, embodiments of the present invention should not be limited to use with optical storage devices.
The forgoing description is of the preferred embodiments of the present invention. These embodiments have been provided for the purposes of illustration and description, but are not intended to be exhaustive or to limit the invention to the precise forms disclosed. Many modifications and variations will be apparent to a practitioner skilled in the art. Embodiments were chosen and described in order to best describe the principles of the invention and its practical application, thereby enabling others skilled in the art to understand the invention. Slight modifications and variations are believed to be within the spirit and scope of the present invention. It is intended that the scope of the invention be defined by the following claims and their equivalents.
