Claims
- 1. A current steering circuit comprising:
a current input node coupled to a first circuit path, the first circuit path drawing current from the current input node during a first mode of operation; a comparator coupled to the current input node, the comparator drawing negligible amount of current from the current input node during the first mode of operation, the comparator drawing significant amount of current from the current input node during a second mode of operation so as to divert current from the first circuit path; and a current mirror coupled to the comparator, the current mirror maintaining current flow through a second circuit path during the second mode of operation but not during the first mode of operation.
- 2. The current steering circuit of claim 1 further comprising:
a reference node coupled to the comparator, the reference node providing a reference voltage; a voltage input node coupled to the comparator, the voltage input node providing an input voltage; and wherein the comparator places the current steering circuit in the first mode of operation or the second mode of operation when the input voltage is at a predetermined level relative to the reference voltage.
- 3. The current steering circuit of claim 1 further comprising a p-type differential amplifier coupled to a first circuit path, and an n-type differential amplifier coupled to a second circuit path.
- 4. The current steering circuit of claim 0.1 further comprising a current source coupled to the current input node.
- 5. The current steering circuit of claim 2 wherein the reference voltage is established by a diode-connected transistor.
- 6. The current steering circuit of claim 2 wherein the voltage input node includes an input terminal of a p-type differential amplifier.
- 7. A current steering circuit comprising:
a current input node coupled to a first circuit path, the first circuit path drawing current from the current input node during a first mode of operation; a first transistor coupled to the current input node, the first transistor drawing negligible current from the current input node during the first mode of operation, the first transistor drawing current from the current input node during a second mode of operation to divert current from the first circuit path; a second transistor coupled to receive current drawn by the first transistor from the current input node during the second mode of operation, the second transistor forming a current mirror with a third transistor that is coupled to a second circuit path; a reference node providing a reference voltage to a fourth transistor; a fifth transistor forming a current mirror with the fourth transistor, the fifth transistor supplying a reference current to the first transistor, the amount of the reference current being related to the reference voltage; and wherein the current steering circuit is placed in the first mode of operation or the second mode of operation depending on a voltage level on a voltage input node relative to the reference voltage.
- 8. The current steering circuit of claim 7 wherein the current steering circuit is placed in the first mode of operation when the voltage level on the voltage input node is lower than the reference voltage, and in the second mode of operation when the voltage level on the voltage input node is higher than the reference voltage.
- 9. The current steering circuit of claim 7 wherein the current steering circuit is placed in the first mode of operation when the voltage level on the voltage input node is higher than the reference voltage, and in the second mode of operation when the voltage level on the voltage input node is lower than the reference voltage.
- 10. The current steering circuit of claim 7 wherein the first, second, third, fourth, and fifth transistors are MOS transistors.
- 11. A method for maintaining a substantially constant error in an output voltage sourced by an amplifier comprising a first circuit and a second circuit, said method comprising:
driving said output voltage in a first region of operation in each of said first circuit and said second circuit, wherein in said first region of operation, said first circuit substantially drives said output; sensing a condition wherein Vin reaches Vref; and causing a switch over from said first region of operation to a second region of operation in each of said first circuit and said second circuit, wherein in said second region of operation, said second circuit substantially drives said output; wherein Vref is set to provide a substantially constant error within said output voltage.
- 12. The method of claim 11, wherein
said first circuit is a p-channel amplifier and said second circuit is an n-channel amplifier.
- 13. The method of claim 12, wherein
said first region of operation comprises operation wherein said p-channel amplifier is active and said n-channel is relatively not active; and said second region of operation comprises operation wherein said n-channel amplifier is active and said p-channel is relatively not active.
- 14. The method of claim 11, wherein
said first circuit is a n-channel amplifier and said second circuit is an p-channel amplifier.
- 15. The method of claim 14, wherein
said first region of operation comprises operation wherein said n-channel amplifier is active and said p-channel is relatively not active; and said second region of operation comprises operation wherein said p-channel amplifier is active and said n-channel is relatively not active.
- 16. The method of claim 11, wherein
Vref is set to provide a substantially constant error within said output voltage by making Vref sufficiently large in comparison to Vin.
- 17. The method of claim 11, wherein
Vref is set to provide a substantially constant error within said output voltage by making Vref sufficiently small in comparison to Vin.
- 18. An apparatus, comprising:
means for driving an output voltage in a first region of operation in each of a first circuit and a second circuit; means for sensing a condition wherein an input voltage (Vin) reaches a reference voltage (Vref); means for switching over from a first region of operation to a second region of operation in each of said first circuit and said second circuit; and means for setting Vref to be sufficiently large, thereby maintaining a substantially constant error in said output voltage.
- 19. A method, comprising:
driving an output voltage in a first region of operation substantially by a first circuit for a substantial portion of an amplifier's entire range of operation; sensing a condition wherein an input voltage, Vin, reaches a reference voltage, Vref; and switching over from the first region of operation to a second region of operation; wherein a second circuit substantially drives the output voltage for a remaining portion of the amplifier's range of operation.
- 20. The method of claim 19, wherein
the reference voltage, Vref, is made sufficiently large to provide a substantially constant error within the output voltage by causing operation in the first region to occur for a substantial portion of the amplifier's entire range of operation.
CROSS-REFERENCES TO RELATED APPLICATIONS
[0001] This application claims priority from the following U.S. Provisional Patent Application, the disclosure of which, including all appendices and all attached documents, is incorporated by reference in its entirety for all purposes:
[0002] U.S. Provisional Patent Application Serial No. ______, to Tim Blankenship and Stephen Bily, entitled, “CURRENT STEERING CIRCUIT FOR CONTROLLING GAIN ERROR,” (Attorney Docket Number 37172.00053) filed Sep. 28, 2001.
Provisional Applications (1)
|
Number |
Date |
Country |
|
60326078 |
Sep 2001 |
US |
Divisions (1)
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Number |
Date |
Country |
Parent |
09972417 |
Oct 2001 |
US |
Child |
10680566 |
Oct 2003 |
US |