All of the material in this patent application is subject to copyright protection under the copyright laws of the United States and of other countries. As of the first effective filing date of the present application, this material is protected as unpublished material.
However, permission to copy this material is hereby granted to the extent that, the copyright owner has no objection to the facsimile reproduction by anyone of the patent documentation or patent disclosure, as it appears in the United States Patent and Trademark Office patent file or records, but otherwise reserves all copyright rights whatsoever.
Not Applicable
Not Applicable
The present invention generally relates to systems/methods associated with computer data storage, and specifically to systems/methods used to store data on disk drives, and in some preferred embodiments, storage of data on disk drives connected to computer systems running under a variety of operating system environments that implement a file system on the disk drives. In some preferred applications the present invention allows storage arrays to be constructed using pass-thru disk drive controllers (PTDDC) (each of which is connected to a SATA local disk drive (LDD) disk storage element (DSE)) connected in a daisy-chain fashion in which the individual members of the PTDDC daisy-chain may be synchronized using standard SATA out-of-band signaling (OBS) commands in conjunction with internal PTDDC hardware that are configured to individually maintain drive state information (DSI) relating to the LDD as well as chain state information (CSI) relating to the individual PTDDC within the daisy-chain.
The following discussion provides background application context information regarding the operation of the present invention and is not to be construed as prior art with respect to the present invention disclosure.
Prior patent applications and issued patents that are incorporated by reference within this patent application describe a hardware Pass-Thru Disk Drive Controller (PTDDC) technology that permits a string of serial advanced technology attachment (SATA) disk drives to be daisy-chained together to form a single logical disk drive. As generally depicted in
One objective of the PTDDC storage array as discussed above is to drastically reduce the overall interconnect costs between disk drives in a storage array by minimizing the cost of the hardware required to provide drive interconnection into a larger logical storage array context. As mentioned in the incorporated patents and patent applications, while the individual disk drive cost in a storage array may approach USD$25, the average cost of the same drive when combined with computer server, power supply, and overhead interconnects typically ranges from USD$1000-USD$3000 in a typical commercial storage array system that integrates the individual disk drives into a unified storage array. Thus, for a petabyte-class (1000 terabyte) storage array, implementation costs typically range from USD$1M-USD$3M, when the drive costs would be approximately USD$25000, meaning that interconnect coats in typical server arrays consume approximately of the cost of the storage array. Thus, in commercial storage array systems, interconnect costs (rather than storage costs) dominate the cost profile of the overall system. The present invention targets cost reduction in the disk drive interconnection to reduce the overall cost of the storage array.
SATA and SAS are two serial connections protocols between hosts and peripherals in desktops, servers, and other applications. The protocols are similar in terms of data rate and signal requirements but are targeted for slightly different applications. SATA is an evolution of the parallel ATA interface that was developed for use as an interconnect for desktop PCs, servers, and enterprise systems to connect a host system, to peripheral devices such as hard disk drives and optical storage drives. SATA systems are designed to operate in half-duplex mode-communication can only take place in one direction, at a time. The physical data rates for SATA are 1.5 Gbps, 3.0 Gbps, and 6.0 Gbps. SAS protocol is used as interconnect between disk drives and host controllers mainly in server systems. SAS is designed to be backwards compatible with SATA systems while offering more features-far more capacity, easier scalability and expansion, and enhanced security.
The SAS protocol is designed to operate in full-duplex mode-data can be transmitted and received to and from the drive simultaneously. The protocol supports connections with up to 8 m cables and can support the use of expanders that allow for connections of multiple SAS drives to a single host port. The physical data rates for SAS are 3.0 Gbps and 6.0 Gbps.
Inherent in the implementation of the PTDDC daisy-chain presented in the patents and/or patent applications incorporated by reference in this document are the concepts of backward compatibility with existing SATA protocols and standards. As generally depicted in
The physical layer is the lowest layer of the SATA protocol stack. It handles the electrical signal being sent across the cable. The physical layer also handles some other important aspects, such as resets and speed negotiation. SATA uses low-voltage differential signaling (LVDS). Instead of sending 1's and 0's relative to a common ground, the data being sent is based on the difference in voltage between two conductors sending data. In other words, there is a TX+ and a TX− signal. A logic-1 corresponds to a high TX+ and a low TX− and vice versa for a logic-0. SATA uses a ±125 mV differential voltage swing. This scheme was chosen for multiple reasons. For one, it improves resistance to noise. A source of interference will likely affect both conductors in the same way, since they are parallel to each other. However, a change in voltage on both conductors does not change the difference between them, so the signal will still be easily recovered. Low voltage differential signaling also reduces electromagnetic interference (EMI), and the lower signaling voltages means that less power is used.
The physical layer is also responsible for host-device link initialization and resets. Since SATA devices and hosts always send data over differential channels, when it is idle (otherwise the link is considered lost), there has to be a way of recognizing a signal before a link has been initialized. For this SATA uses out-of-band signaling (OOB) to initialize a connection between a host and a device. The OOB mechanism supports low speed transmission over a high speed connection, such as a SATA link. The OOB signals are non-differential but are sent over a differential channel. This is possible by letting the differential transmitters drive their output pins to the same voltage, resulting in a reduced difference and when a preset threshold limit is reached the receiver can recognize the signal as OOB.
Under this scheme, it is assumed that the host and the device can detect the presence or absence of a signal, even if they cannot yet decode that signal. OOB signals are essentially that—whether or not an in-band signal is present. By driving TX+ and TX to the same common voltage (so not a logic 1 or a logic 0), one party can transmit an OOB “lack of signal.” Link initialization is performed by sending a sequence of OOB primitives, which are defined patterns of signal/no-signal. These are detected using a register-based state machine as generally depicted in
The COMRESET signal, sent by the host, is used to reset the link. Following a COMRESET, the OOB initialization sequence is performed again. COMRESET can also be sent repeatedly to hold the link in a reset state.
The initialization state machine for the host follows the sequence depicted in
As can be seen in
If this procedure is finished within a correct time the OOB signaling ends and the differential communication can proceed with determining the link speed (right part of the
It must be stressed in the discussion of the present, invention that, the prior art imposes a number of relatively severe limitations on handling disk drives that include:
While these objectives should not be understood to limit the teachings of the present invention, in general these objectives are achieved in part or in whole by the disclosed invention that is discussed in the following sections. One skilled in the art will no doubt be able to select aspects of the present invention as disclosed to affect any combination of the objectives described above.
The present invention addressed the deficiencies of the prior art by implementing a register-based state machine (RSM) that coordinates operation of individual state machines controlling the operation of the PTI, PTO, and DDI ports in a PTDDC daisy-chain incorporating locally attached disk drives (LDDs). The RSM controls the sequencing of OBS within the PTI, PTO, and DDI ports to ensure that the entire string of daisy-chained LDDs is properly synchronized both upstream and downstream in the daisy-chain.
For a fuller understanding of the advantages provided by the invention, reference should be made to the following detailed description together with the accompanying drawings wherein:
While this invention is susceptible of embodiment in many different forms, there is shown in the drawings and will herein be described in detailed preferred embodiment of the invention with the understanding that the present disclosure is to be considered as an exemplification of the principles of the invention and is not intended to limit the broad aspect of the invention to the embodiment illustrated.
The numerous innovative teachings of the present, application will be described with particular reference to the presently preferred embodiment, wherein these innovative teachings are advantageously applied to the particular problems of a DAISY-CHAIN STORAGE SYNCHRONIZATION SYSTEM MID METHOD. However, it should be understood that this embodiment is only one example of the many advantageous uses of the innovative teachings herein. In general, statement s made in the specification of the present application do not necessarily limit any of the various claimed inventions. Moreover, some statements may apply to some inventive features but not to others.
Within the present application the term “disk drive” and its equivalents may relate to traditional, spinning spindle platter-type disk drive storage as well as other forms of storage such as solid state disk drives. While the techniques taught by the present invention have high applicability to disk drives having a serial advanced technology attachment (SATA) interface, it is equally applicable to other disk drive interface types.
Within the present application the term “SATA interface” and its equivalents may relate a wide variety of SATA serial disk drive interfaces. Variants of the SATA interface include 1.5 Gb/s (SATA 1.0), 3 Gb/s (SATA 2.0), 6 Gb/s (SATA 3.0), 16 Gb/s (SATA 3.2) and other speed variants, but may also include variants such as SATAe (SATA EXPRESS). Generally speaking, a SATA interface in this context may be any serially attached disk drive, interface and may include disk drives serially connected using PCI/PCIe interfaces.
While the exemplary invention embodiments depicted herein may utilize standard SATA mechanical dimensions for power and/or signal connectors, the present invention is not limited to these particular mechanical examples, and may include a variety of other SATA mechanical interfaces including mini and micro style connectors. Appropriate scaling of the mechanical examples provided herein is within the expertise of one of ordinary skill in the electrical/mechanical arts.
The present invention may be applied to a wide variety of disk drive storage systems incorporating a wide variety of host bus adapter (HBA) and disk drive interface (DDI) physical hardware interfaces. While many preferred embodiments may be configured wherein the HBA and DDI are of the same type of physical hardware interface, the present invention is not limited to this configuration, and the HBA and DDI may be of any disparate type of hardware interface.
The present invention may be advantageously configured in some situations where the pass-thru input (PTI) port and pass-thru output (PTO) port are of the same hardware configuration as the HBA interface, but the present invention does not require this conformity.
The present invention may be applied to a wide variety of disk drive storage systems incorporating a wide variety of host bus adapter (HBA) interfaces. Generally speaking, the HBA interface may vary widely among current disk drive subsystems as well, as enhancements and/or replacements to these interfaces that may occur in the future. The present invention, while suitable for many current and future HBA interfaces, is particularly suitable for implementation using parallel ATA (PATA/PATAPI) (also identified as IDE/EIDE), serial ATA (SATA/SATAPI/eSATA/microSATA), Fibre Channel, Serial Storage Architecture (SSA), and universal serial bus (USB) interfaces. Thus, the present invention, while not limiting the scope of the HBA used with the system, may be implemented in some preferred exemplary embodiments using one or more of the HBA interfaces listed.
Many preferred exemplary embodiments utilize the serial ATA (SATA) disk drive interface standard. This standard, available from the Serial ATA International Organization (www.sata-io.org), is hereby incorporated by reference in this document.
Within this document the terms out-of-band (GOB) and out-of-band signaling (OBS) will be used synonymously.
The present invention as exemplified by the PTDDC SDD remapping concept is totally compatible with existing port multiplier/port selector techniques described in the SATA specification. This compatibility permits rapid integration of the present invention into “cloud” computing environments where vast arrays of data storage are implemented for the support of a plethora of computers and associated computer users. The advantage of the present invention as implemented in these environments is a significant cost reduction in overall data storage costs at the enterprise level as compared to the prior art and detailed below.
An overview of the OBS RSM state machine logic functionality as taught by the present invention is generally depicted in
From the perspective of the HCS (1710), the PTDDC (1720) appears as a traditional SATA disk drive and as such the HCS (1710) host, bus adapter (HBA) (1711) can communicate with the PTDDC (1720) using a standard SATA protocol state machine (1712) that incorporates SATA-standard OBS COMRESET/COMINIT/COMWAIT protocols communicating with the PTDDC PTI port state machine (1722). Similarly, the local disk drive (LDD) (1740) can communicate with the DDI port state machine (1724) using standard SATA OBS COMRESET/COMINIT/COMWAIT protocols. The next PTDDC (1730) may also communicate with the PTDDC (1720) using SATA-standard OBS COMRESET/COMINIT/COMWAIT protocols. Note that each of these port state machines (1722, 1723, 1724) is under operational control of an internal master PTDDC state machine (1721) that control operation of these port-based state machines as well as the pass-thru logic (1725) within the PTDDC (1720).
The PTDDCs within the daisy-chain are configured to individually maintain drive state information (DSI) relating to the LDD as well as chain state information (CSI) relating to the individual PTDDC within the daisy-chain as generally depicted in
PTDDC OBS State Machine Overview (1800)
As generally illustrated in
DDI Port Synchronization method Implementation (1900)/(2200)
A general overview of the DDI daisy-chain storage synchronization method is depicted in the flowchart of
This general system summary may be augmented by the various elements described herein to produce a wide variety of invention embodiments consistent, with this overall design description. A corresponding state machine diagram supporting the flowchart of
PTO Port Synchronization Method Implementation (2000)/(2300)
A general overview of the PTO daisy-chain storage synchronization method is depicted in the flowchart of
PTI Port Synchronization Method Implementation (2100)/(2400)
A general overview of the PTO daisy-chain storage synchronization method is depicted in the flowchart of
The ordering of PTDDC port sequence initialization has been chosen in many preferred embodiments to ensure that the daisy-chain is initialized from the END of the chain to the BEGINNING of the chain. This permits knowledge of the DDI attached storage to “flow up” the daisy chain in situations where each PTDDC is configured to concatenate downstream storage into a storage array map that is eventually reported to a HBA located at the beginning of the daisy-chain.
For example, if four disk drives having capacities of 1 TB, 2 TB, 3 TB and 4 TB respectively are attached to PTDDC controllers 1, 2, 3, and 4 that are respectively connected in series within the daisy-chain, the last PTDDC will first initialize the 4 TB disk drive, then determine that there is no downstream storage. An upstream PTDDC (#3) can inspect the “size” of PTDDC #4 and determine it to be 4 TB. This information can then be combined with the DDI port #3 information, to indicate a total available size of 3+4=7 TB when PTDDC #3 reports its “size” to PTDDC #2. This upstream reporting will continue up to PTDDC #1 in which the HBA to which it is attached will request a “size” from PTDDC #1 to which this PTDDC will report 1+2+3+ 4 TB=10 TB total size. The HBA in this instance will have no direct knowledge of the attached disk drives connected to PTDDC #1-PTDDC #4, but will only see a single drive having a 10 TB capacity. Of coarse, as detailed in previously incorporated patent/patent applications, LBA requests by the HBA when sent to the first PTDDC will be translated along the daisy-chain such that read/write requests for LBA addresses will be properly directed to the appropriate DDI port based on mapping registers within each PTDDC.
This method is generally depicted in the flowchart of
The OBS SYNC sequence is generally depicted in
As generally depicted in
An alternate PTDDC LBA sizing method to that depicted in
(7) Loading the LDDsize of the LDD into the PTDDC and proceeding to step (9) (2707);
The OBS SYNC sequence is generally depicted in
As generally depicted in
An alternate PTDDC LBA sizing method to that depicted in
The OBS SYNC sequence is generally depicted in
As generally depicted in
As generally illustrated in
Details of the individual hardware ports (3121, 3122, 3123) is provided in
The present invention system anticipates a wide variety of variations in the basic theme of construction, but can be generalized as a daisy-chain storage synchronization, system comprising:
wherein:
This general system summary may be augmented by the various elements described herein to produce a wide variety of invention embodiments consistent with this overall design description.
The present invention method anticipates a wide variety of variations in the basic theme of implementation, but can be generalized as a daisy-chain storage synchronization method comprising:
wherein:
This general method summary may be augmented by the various elements described herein to produce a wide variety of invention embodiments consistent with this overall design description.
The present invention anticipates a wide variety of variations in the basic theme of construction. The examples presented previously do not represent the entire scope of possible usages. They are meant to cite a few of the almost limitless possibilities.
This basic system and its associated method may be augmented with a variety of ancillary embodiments, including but not limited to:
One skilled in the art will recognize that other embodiments are possible based on combinations of elements taught within the above invention description.
In various alternate embodiments, the present invention may be implemented as a computer program product for use with a computerized computing system. Those skilled in the art will readily appreciate that programs defining the functions defined by the present invention can be written in any appropriate programming language and delivered to a computer in many forms, including but not limited to: (a) information permanently stored on non-writeable storage media (e.g., read-only memory devices such as ROMs or CD-ROM disks); (b) information alterably stored on writeable storage media (e.g., floppy disks and hard drives); and/or (c) information conveyed to a computer through communication media, such as a local area network, a telephone network, or a public network such as the Internet. When carrying computer readable instructions that implement the present invention methods, such computer readable media represent alternate embodiments of the present invention.
As generally illustrated herein, the present invention system embodiments can incorporate a variety of computer readable media that comprise computer usable medium having computer readable code means embodied therein. One skilled in the art will recognize that the software associated with the various processes described herein can be embodied in a wide variety of computer accessible media from which the software is loaded and activated. Pursuant to In re Beauregard, 35 USPQ2d 1383 (U.S. Pat. No. 5,710,578), the present invention anticipates and includes this type of computer readable media within the scope of the invention. Pursuant to In re Nuijten, 500 F.3d 1346 (Fed. Cir. 2007) (U.S. patent application Ser. No. 09/211,928), the present invention scope is limited to computer readable media wherein the media is both tangible and non-transitory.
A daisy-chain storage synchronization (DSS) system and method that permits a daisy-chain of interconnected pass-thru disk drive controllers (PTDDCs) each connected to a SATA local disk drive (LDD) disk storage element (DSE) to support state synchronization within PTDDCs in the daisy-chain has been disclosed. The PTDDCs within the daisy-chain are configured to individually maintain drive state information (DSI) relating to the LDD as well as chain state information (CSI) relating to the individual PTDDC within the daisy-chain. This state information may be modified on receipt of out-of-band signaling (OBS) from, other PTDDC elements up the daisy-chain as well as OBS from other PTDDC elements down the daisy-chain. CSI is determined in part by conventional SATA OBS state register protocols that are modified by internal state registers (ISR) in each individual PTDDC daisy-chain element so as to make the DSS transparent to existing SATA OBS single-disk standard hardware command protocols.
The following rules apply when interpreting the CLAIMS of the present invention:
Although preferred embodiment the present invention has been illustrated in the accompanying drawings and described in the foregoing Detailed Description, it will be understood that the invention is not limited to the embodiments disclosed, but is capable of numerous rearrangements, modifications, and substitutions without departing from the spirit of the invention as set forth and defined by the following claims.
This application is a Continuation-In-Part (CIP) Patent Application of and incorporates by reference United States Utility Patent Application for RAID HOT SPARE SYSTEM AND METHOD by inventor Kevin Mark Klughart, filed with the USPTO on Oct. 3, 2016, with Ser. No. 15/284,113, EFSID 27108165, confirmation, number 7971, and issued as U.S. Pat. No. 9,652,343 on May 16, 2017. Application Ser. No. 15/284,113 is a Continuation-In-Part (CIP) Patent Application of and incorporates by reference United States Utility Patent Application for FILE SYSTEM EXTENSION SYSTEM AND METHOD by inventor Kevin Mark Klughart, filed with the USPTO on Oct. 19, 2015, with Ser. No. 14/886,616, EFSID 23823476, confirmation number 8917, and issued as U.S. Pat. No. 9,460,110 on Oct. 4, 2016. Application Ser. No. 14/886,616 is a Continuation-In-Part (CIP) Patent Application of and incorporates by reference United States Utility Patent Application for DATA STORAGE RAID ARCHITECTURE EXTENSION SYSTEM AND METHOD by inventor Kevin Mark Klughart, filed with the USPTO on Apr. 13, 2015, with Ser. No. 14/685,439, EFSID 22049250, confirmation number 6962, and issued as U.S. Pat. No. 9,164,946 on Oct. 20, 2015. Application Ser. No. 14/685,439 is a Continuation Patent Application (CPA) of and incorporates by reference United States Utility Patent Application for DATA STORAGE ARCHITECTURE EXTENSION SYSTEM AND METHOD by inventor Kevin Nark Klughart, filed with the USPTO on Oct. 29, 2014, with Ser. No. 14/526,855, EFSID 20533135, confirmation number 8572, and issued as U.S. Pat. No. 9,015,355 on Apr. 21, 2015. Application Ser. No. 14/526,855 is a Continuation Patent Application (CPA) of and incorporates by reference United States Utility Patent Application for DATA STORAGE ARCHITECTURE EXTENSION SYSTEM AND METHOD by inventor Kevin Mark Klughart, filed with the USPTO on Jun. 27, 2014, with Ser. No. 14/317,892, confirmation number 5023, and issued as U.S. Pat. No. 8,943,227 on Jan. 27, 2015. This application is a Continuation-in-part (CIP) patent application of and incorporates by reference United States Utility Patent Application for DATA STORAGE ARCHITECTURE EXTENSION SYSTEM AND METHOD by inventor Kevin Mark Klughart, filed with the USPTO on Jun. 25, 2014, with Ser. No. 14/314,143, confirmation number 7667, and issued as U.S. Pat. No. 8,914,549 on Dec. 16, 2014. This application is a Continuation-in-part (CIP) patent application of and incorporates by reference United States Utility Patent Application for DATA STORAGE ARCHITECTURE EXTENSION SYSTEM AND METHOD by inventor Kevin Mark Klughart, filed with the USPTO on Sep. 21, 2011, with Ser. No. 13/200,242, confirmation number 8668, and issued as U.S. Pat. No. 8,799,523 on Aug. 5, 2014. This application claims benefit under 35 U.S.C. §120 and incorporates by reference United States Utility Patent Application for DATA STORAGE ARCHITECTURE EXTENSION SYSTEM AND METHOD by inventor Kevin Mark Klughart, filed with the USPTO on Sep. 21, 2011, with Ser. No. 13/200,242, confirmation number 8668, and issued as U.S. Pat. No. 8,799,523 on Aug. 5, 2014. This application claims benefit under 35 U.S.C. §120 and incorporates by reference United States Utility Patent Application for AUDIO/VIDEO STORAGE/RETRIEVAL SYSTEM AND METHOD by inventor Kevin Mark Klughart, filed with the USPTO on Sep. 25, 2011, with Ser. No. 13/200,572, confirmation number 7146, and issued as U.S. Pat. No. 8,813,165 on Aug. 19, 2014.
Number | Name | Date | Kind |
---|---|---|---|
4873665 | Jiang et al. | Oct 1989 | A |
5164613 | Mumper et al. | Nov 1992 | A |
5299156 | Jiang et al. | Mar 1994 | A |
5363361 | Bakx | Nov 1994 | A |
5532958 | Jiang et al. | Jul 1996 | A |
5926602 | Okura | Jul 1999 | A |
6118690 | Jiang et al. | Sep 2000 | A |
6324338 | Wood et al. | Nov 2001 | B1 |
6405239 | Addington et al. | Jun 2002 | B1 |
7373443 | Seto | May 2008 | B2 |
7600070 | Linnell | Oct 2009 | B1 |
7814272 | Barrall et al. | Oct 2010 | B2 |
7814273 | Barrall | Oct 2010 | B2 |
7818531 | Barrall | Oct 2010 | B2 |
7873782 | Terry et al. | Jan 2011 | B2 |
7889964 | Barton et al. | Feb 2011 | B1 |
8074105 | Kalwitz et al. | Dec 2011 | B2 |
8095760 | Mizuno et al. | Jan 2012 | B2 |
8352649 | Liu et al. | Jan 2013 | B2 |
8799523 | Klughart | Aug 2014 | B2 |
8813165 | Klughart | Aug 2014 | B2 |
8914549 | Klughart | Dec 2014 | B2 |
8943227 | Klughart | Jan 2015 | B2 |
9015355 | Klughart | Apr 2015 | B2 |
9164946 | Klughart | Oct 2015 | B2 |
20020102092 | Thai | Aug 2002 | A1 |
20030014762 | Conover et al. | Jan 2003 | A1 |
20030063893 | Read | Apr 2003 | A1 |
20050195660 | Kavuri et al. | Sep 2005 | A1 |
20050207253 | Takase et al. | Sep 2005 | A1 |
20060036777 | Innan et al. | Feb 2006 | A1 |
20070149148 | Yoshikawa et al. | Jun 2007 | A1 |
20070266037 | Terry et al. | Nov 2007 | A1 |
20080046947 | Katznelson | Feb 2008 | A1 |
20080068513 | Ariyoshi et al. | Mar 2008 | A1 |
20080162811 | Steinmetz et al. | Jul 2008 | A1 |
20090016009 | Barrall et al. | Jan 2009 | A1 |
20090036067 | Rofougaran | Feb 2009 | A1 |
20090067363 | Ruiz et al. | Mar 2009 | A1 |
20090168654 | Mies | Jul 2009 | A1 |
20090222623 | Nakamura et al. | Sep 2009 | A1 |
20090259791 | Mizuno et al. | Oct 2009 | A1 |
20090292843 | Haban et al. | Nov 2009 | A1 |
20100049919 | Winokur et al. | Feb 2010 | A1 |
20100064104 | Steinmetz et al. | Mar 2010 | A1 |
20100146206 | Yochai et al. | Jun 2010 | A1 |
20100257401 | Stolowitz | Oct 2010 | A1 |
20110013882 | Kusunoki et al. | Jan 2011 | A1 |
20110035565 | Barrall | Feb 2011 | A1 |
20110060773 | Itoh | Mar 2011 | A1 |
20110072233 | Dawkins et al. | Mar 2011 | A1 |
20110145452 | Schilling et al. | Jun 2011 | A1 |
20110252007 | Cho et al. | Oct 2011 | A1 |
20110283150 | Konishi et al. | Nov 2011 | A1 |
20120266027 | Itoyama et al. | Oct 2012 | A1 |
20120278552 | Singh et al. | Nov 2012 | A1 |
20120311256 | Nakajima et al. | Dec 2012 | A1 |
20130145106 | Kan | Jun 2013 | A1 |
20130254429 | Mimata et al. | Sep 2013 | A1 |
Entry |
---|
HCL, ashok.madaan@hcl.In, SATA Host Controller, pp. 1-2, India. |
Hitachi Global Storage Technologies (datasheet); Hitachi Deskstar 7K1000 Hard Disk Drive Specification, Models HDS7721010KLA330, HDS7721075KLA330; Rev. 0.1, Jun. 21, 2007; USA. |
Hitachi Global Storage Technologies (datasheet); Hitachi Deskstar 7K3000 Hard Disk Drive Specification, Models HDS723020BLA642, HDS723015BLA642; Rev. 1.0, Oct. 28, 2010; USA. |
Hitachi Global Storage Technologies (datasheet); Hitachi Deskstar 7K3000 Hard Disk Drive Specification, Models HUA723030ALA640, HUA723020ALA640; Rev. 1.1, Jan. 25, 2011; USA. |
Intel Corporation, PHY Interface for the PCI Express* Architecture (PIPE), for SATA 3.0, Revision .7, 2007-2010, pp. 1-30, US. |
Iomega; “Using Iomega StorCenter IX 12-300R with Windows Server2008 R2 Hyper-V Over iSCSI”; White Paper (online); Iomega Corporation, Mar. 2011; http://download.iomega.com/nas/pdfs/hyperv-overiscsi.pdf. |
Serial ATA International Organization (specification), Serial ATA Revision 2.5—High Speed Serialized at Attachment; www.sata-io.org; Oct. 27, 2005; USA. |
Serial ATA International Organization (specification), Serial ATA Revision 2.6—High Speed Serialized at Attachment; www.sata-io.org; Feb. 15, 2007; USA. |
Serial ATA International Organization (specification), Serial ATA Revision 3.0—High Speed Serialized at Attachment; www.sata-io.org; Jun. 2, 2009; USA. |
ISA/US, International Search Report and Written Opinion for PCT/US2012/058619 dated Dec. 17, 2012. |
ISA/US, International Search Report and Written Opinion for PCT/US2012/058652 dated Jan. 3, 2013. |
Number | Date | Country | |
---|---|---|---|
20170249332 A1 | Aug 2017 | US |
Number | Date | Country | |
---|---|---|---|
Parent | 14526855 | Oct 2014 | US |
Child | 14685439 | US | |
Parent | 14317892 | Jun 2014 | US |
Child | 14526855 | US | |
Parent | 15595663 | May 2017 | US |
Child | 14526855 | US |
Number | Date | Country | |
---|---|---|---|
Parent | 15284113 | Oct 2016 | US |
Child | 15595663 | US | |
Parent | 14886616 | Oct 2015 | US |
Child | 15284113 | US | |
Parent | 14685439 | Apr 2015 | US |
Child | 14886616 | US | |
Parent | 14314143 | Jun 2014 | US |
Child | 15595663 | US | |
Parent | 13200242 | Sep 2011 | US |
Child | 14314143 | US | |
Parent | 13200572 | Sep 2011 | US |
Child | 13200242 | US |