Claims
- 1. A data communication system for remotely activating a plurality of loads, said system comprising:
- transmitter means having an encoder with first and second sets of inputs, operative to provide a multi-bit pulse train for transmission to a receiver, selected bits of said pulse train being associated with the first set of encoder inputs and defining an address code, with other bits of the pulse train being associated with said second set of encoder inputs and defining data;
- receiver means having a decoder coupled for receipt of the pulse train from the transmitter, a set of code select inputs for the decoder defining a local address code for the receiver, generator means for providing a local pulse train as a function of the code select inputs, comparison means having inputs coupled for receipt of the local pulse train and the transmitted pulse train for making a sequential pulse-by-pulse comparison therebetween, disabling means having an input coupled for receipt of the transmitted pulse train and an output coupled to said comparison means, operative for selectively disabling the comparison means from comparing the data bits in the transmitted pulse train with corresponding bit positions in the local pulse train; and
- activator means for energizing selected loads according to the states of the data bits in the transmitted pulse train if the address code portions of the local and transmitted pulse train match.
- 2. The system of claim 1 wherein the first set of encoder inputs comprises a plurality of manually operable switches to permit the user to define the address code.
- 3. The system of claim 2 wherein said second set of encoder inputs provide control signals for activating particular loads.
- 4. The system of claim 3 wherein said encoder alternately generates data bits and address bits for the transmitted pulse train, and wherein said decoder generates said address code portion in bit positions corresponding with the address code bit positions in the transmitted pulse train.
- 5. The system of claim 4 wherein said disabling means comprises bistable means having an input coupled for receipt of the transmitted pulse train and an output coupled to said comparison means, operative to alternately provide a given state on said output to alternately disable said comparison means upon receipt of each pulse of the transmitted pulse train.
- 6. The system of claim 5 wherein the states of the bits in the transmitted pulse train and local pulse train are determined by different pulse widths.
- 7. The system of claim 6 which further comprises:
- counter means having a clock input, a reset input, and a plurality of output stages;
- means for coupling the transmitted pulse train to the clock input of said counter, operative to sequentially energize an output stage of said counter;
- pulse width discriminator means having an input coupled for receipt of said transmitted pulse train, operative to provide an output signal whenever a bit in the pulse train exceeds a predetermined width; and
- a plurality of latch means having at least two inputs, operative to provide an output signal for activating a selected load upon receipt of enabling signal at both of its inputs, one input of each latch being coupled to the output of said pulse width discriminator means, and the other input of said latches being connected to selected stages of said counter whereby said latches are selectively enabled by a wide pulse occuring at selected bit positions within the transmitted pulse train.
- 8. The system of claim 7 wherein said one inputs of each of said data latches are coupled to alternative output stages of said counter whereby to coincide with the data bit positions in the transmitted pulse train.
- 9. The system of claim 8 wherein said decoder means provides an enabling signal to the reset input of said counter when the address code portions of the transmitted and local pulse trains match.
- 10. The system of claim 9 which further comprises:
- timer means for resetting said bistable means when no further transmitted pulses are received within a given time period.
- 11. A line carrier system for selectively activating a plurality of remote loads in a building as a function of selected detector devices located in a different part of the building, said system comprising:
- a first group of manually operable switches defining an address code;
- an encoder with first and second sets of inputs, operative to provide a series of multi-bit pulse trains for transmission to a receiver in which the states of each bit are defined by their relative pulse widths, odd numbered bits in the pulse train being associated with said detector devices and defining data for controlling the actuation of selected ones of the remote loads, even numbered bits in the pulse train being associated with the first group of switches and defining an address code;
- means for transmitting said pulse trains over wiring in the building to a receiver at a remote location;
- a second group of manually operable switches defining a local address code for the receiver;
- an encoder having a generator means for providing a local multi-bit pulse train in which the width of each bit is a function of the second group of switches; comparison means having inputs coupled for receipt of the local pulse train and the transmitted pulse train, operative for making a comparison of the pulse widths of corresponding bits in the local and transmitted pulse trains on a sequential pulse-by-pulse basis and generating a match signal if all compared pulses have substantially the same widths;
- bistable means having an input coupled for receipt of the transmitted pulse trains and an output coupled to said comparison means, operative to provide disabling signals to the comparison means for each odd numbered bit in the transmitted pulse train whereby said comparison means will only compare the even numbered pulses associated with the address codes and will generate said match signal as long as the pulse widths thereof are substantially the same even though there may be differences between the odd numbered bits representing data;
- a plurality of latches, one each connected to a selected one of said remote loads;
- pulse width discriminator means coupled for receipt of said transmitted pulse trains, operative to provide an output signal whenever a bit in the pulse train exceeds a predetermined width; and
- enabling means for enabling selected ones of said latches as a function of the output signal from the discriminator means and the match signal from the encoder.
- 12. The system of claim 11 wherein said enabling means comprises:
- a multi-stage counter having a reset input coupled for receipt of said match signal, a count input coupled for receipt of the transmitted pulse trains, and a plurality of outputs in which the odd numbered outputs are coupled to said latches;
- the outpt signal from the discriminator means being coupled to other inputs of said latches whereby a match signal enables said counter which sequentially activates each output for each subsequently received pulse of the transmitted pulse train and cooperates with the output signal from the discriminator to selectively enable each latch when its corresponding odd numbered data bit in the transmitted pulse train exceeds a predetermined width.
CROSS REFERENCE TO RELATED APPLICATIONS
This application is a continuation-in-part of U.S. Ser. No. 015,495 entitled "Combination Encoder-Decoder Integrated Circuit Device", filed Feb. 26, 1979, and assigned to the assignee of the present invention.
US Referenced Citations (4)
Continuation in Parts (1)
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Number |
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15495 |
Feb 1979 |
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