Data phase locked loop circuit and method for generating frequency of reference signal thereof

Information

  • Patent Application
  • 20080002542
  • Publication Number
    20080002542
  • Date Filed
    June 06, 2007
    17 years ago
  • Date Published
    January 03, 2008
    17 years ago
Abstract
A data phase locked loop circuit includes a phase locked loop circuit, a judging circuit, a detecting circuit and a control circuit. The phase locked loop circuit outputs a reference signal according to a data signal, which is generated by an optical drive reading an optical disk. When the judging circuit judges that a jitter signal is smaller than a threshold value, the control circuit stores a frequency of the reference signal. When the detecting circuit detects a defect zone of the optical disk read by the optical drive, the phase locked loop circuit fixes the frequency of the reference signal to a latest stored one.
Description

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will become more fully understood from the detailed description given herein below illustration only, and thus is not limitative of the present invention, and wherein:



FIG. 1 is a schematic illustration showing a conventional data phase locked loop circuit;



FIG. 2 is a schematic illustration showing a data phase locked loop circuit according to an embodiment of the invention; and



FIG. 3 is a flow chart showing a method of generating a frequency of a reference signal of the data phase locked loop circuit according to the embodiment of the invention.





DETAILED DESCRIPTION OF THE INVENTION

The present invention will be apparent from the following detailed description, which proceeds with reference to the accompanying drawings, wherein the same references relate to the same elements.



FIG. 2 is a schematic illustration showing a data phase locked loop circuit 20 according to an embodiment of the invention. As shown in FIG. 2, the data phase locked loop circuit 20 may be implemented by way of a digital logic circuit. The data phase locked loop circuit 20 includes a phase locked loop circuit 21, a judging circuit 22, a control circuit 23 and a detecting circuit 24. The control circuit 23 includes a storing circuit 231, a registering circuit 232 and a loading circuit 233. An optical drive has an optical pickup head 101 for reading a data signal SD from an optical disk 100 and inputting the data signal SD to the phase locked loop circuit 21. Then, a reference signal SR is generated according to the data signal SD and is outputted to an optical drive signal processing circuit 102 by the phase locked loop circuit 21. The reference signal SR may serve as a signal processing reference in the optical drive signal processing circuit 102. The data signal SD is continuously tracked to equalize the frequency of the reference signal SR to the frequency of the data signal SD. The phase locked loop circuit 21 outputs a jitter signal SJ to the judging circuit 22 according to a phase difference between the reference signal SR and the data signal SD. Then, a storing signal SSV is outputted to the storing circuit 231 of the control circuit 23 by the judging circuit 22 according to the jitter signal SJ. When the judging circuit 22 judges that the jitter signal SJ is smaller than a threshold value, the storing signal SSV is set to a first level by the judging circuit 22. When the storing circuit 231 detects that the storing signal SSV is at the first level, a frequency FREF of the reference signal is stored to the registering circuit 232 by the storing circuit 231. Alternatively, when the judging circuit 22 judges that the jitter signal SJ exceeds the threshold value, the storing signal SSV is set to a second level by the judging circuit 22. When the storing circuit 231 detects that the storing signal SSV is at the second level, the storing circuit 231 stops storing the frequency FREF of the reference signal to the registering circuit 232.


The detecting circuit 24 detects whether a defect zone of the optical disk 100 read by the optical drive exists according to a radio frequency signal RF. The detecting circuit 24 outputs a loading signal SLA to the loading circuit 233 of the control circuit 23 according to the radio frequency signal RF. The radio frequency signal RF is generated by the optical pickup head 101 reading the zone of the optical disk 100. When the radio frequency signal RF is at the first level, the detecting circuit 24 judges that the defect zone exists in the optical disk 100. When the radio frequency signal RF has the second level, the detecting circuit 24 judges that the zone of the optical disk 100 has no defect. Thus, when the detecting circuit 24 detects that the zone of the optical disk 100 has the defect, the detecting circuit 24 sets the loading signal SLA to the first level and inputs the loading signal SLA to the loading circuit 233. When the loading circuit 233 detects that the loading signal SLA is at the first level, the loading circuit 233 retrieves the latest stored frequency FLST of the reference signal from the registering circuit 232 and loads it into the phase locked loop circuit 21. Alternatively, when the detecting circuit 24 detects that the zone in the optical disk 100 has no defect, the loading signal SLA is set at the second level and is outputted to the loading circuit 233 by the detecting circuit 24. When the loading circuit 233 detects that the loading signal SLA is at the second level, it stops retrieving the latest stored frequency FLST from the registering circuit 232 and thus stops loading the latest stored frequency FLST to the phase locked loop circuit 21.


Thus, when a defect zone in the optical disk 100 is detected by the detecting circuit 24, the outputted frequency of the reference signal SR is fixed to the latest stored frequency FLST by the phase locked loop circuit 21, and the frequency FREF of the reference signal equals the latest stored frequency FLST. Once the detecting circuit 24 detects that the optical drive has been moved from the defect zone to a defect-free zone of the optical disk 100, the frequency of the reference signal SR is no longer fixed by the phase locked loop circuit 21 but the data signal SD is directly tracked to generate the frequency of the reference signal SR so as to equalize the frequency of the reference signal SR to that of the data signal SD. Because the latest stored frequency FLST is very close to the frequency of the data signal SD, the frequency of the reference signal SR may be tracked from the latest stored frequency FLST to the frequency of the data signal SD by the phase locked loop circuit 21 in a short period of delay time. Herein, the frequency of the reference signal SR is equal to that of the data signal SD. Thus, it is possible to shorten the prior art delay time of tracking the frequency FREF of the reference signal from the arbitrary frequency to the frequency of the data signal such that the optical drive signal processing circuit 102 can rapidly recover to normal operation.


In summary, the method of generating the frequency of the reference signal of the data phase locked loop circuit according to the embodiment of the invention is applied to the optical drive, as shown in FIG. 3. The method includes steps S31 to S34. First, in step S31, the reference signal is generated according to the data signal, which is generated by the optical drive reading the optical disk. Next, in step S32, the jitter signal is generated according to the data signal and the reference signal, wherein the jitter signal is generated according to a phase difference between the data signal and the reference signal. Then, in step S33, the frequency of the reference signal is stored when the jitter signal is smaller than the threshold value. However, when the jitter signal exceeds the threshold value, the storing process of the frequency of the reference signal is stopped. At last, in step S34, the frequency of the reference signal is fixed to the fixed frequency equal to the latest stored frequency, when detecting the defect in the zone of the optical disk. However, the data signal is tracked to generate the frequency of the reference signal when detecting no defect in the zone of the optical disk.


Although the invention has been described with reference to specific embodiments, this description is not meant to be construed in a limiting sense. Various modifications of the disclosed embodiments, as well as alternative embodiments, will be apparent to persons skilled in the art. It is, therefore, contemplated that the appended claims will cover all modifications that fall within the true scope of the invention.

Claims
  • 1. A data phase locked loop circuit applied to an optical drive, the data phase locked loop circuit comprising: a control circuit for storing a frequency of a reference signal when a jitter signal is smaller than a threshold value, and outputting a fixed frequency when the optical drive detects a defect zone of an optical disk, wherein the fixed frequency is a latest stored frequency of the reference signal; anda phase locked loop circuit for fixing the frequency of the reference signal to the fixed frequency when receiving the fixed frequency.
  • 2. The data phase locked loop circuit according to claim 1, wherein when the optical drive reads a defect-free zone in the optical disk, a data signal is tracked to generate the frequency of the reference signal by the phase locked loop circuit, and the optical disk is read to generate the data signal by the optical drive.
  • 3. The data phase locked loop circuit according to claim 2, wherein the jitter signal is generated by the phase locked loop circuit according to a phase difference between the reference signal and the data signal.
  • 4. The data phase locked loop circuit according to claim 1, wherein the control circuit comprises: a registering circuit for storing the frequency of the reference signal;a storing circuit for judging whether to store the frequency of the reference signal to the registering circuit; anda loading circuit for judging whether to load the fixed frequency to the phase locked loop circuit.
  • 5. The data phase locked loop circuit according to claim 1, further comprising: a judging circuit for enabling the control circuit to store the frequency of the reference signal when judging that the jitter signal is smaller than the threshold value, and disabling the control circuit from storing the frequency of the reference signal when judging that the jitter signal exceeds the threshold value.
  • 6. The data phase locked loop circuit according to claim 1, further comprising: a detecting circuit for enabling the control circuit to output the fixed frequency when detecting the defect zone of the optical disk, and disabling the control circuit from outputting the fixed frequency when detecting a defect-free zone of the optical disk.
  • 7. A method for generating a frequency of a reference signal of a data phase locked loop circuit in an optical drive, the method comprising the steps of: generating the reference signal according to a data signal, wherein the optical drive reads an optical disk to generate the data signal;generating a jitter signal according to the data signal and the reference signal;storing the frequency of the reference signal when the jitter signal is smaller than a threshold value; andfixing the frequency of the reference signal to a fixed frequency, which is a latest stored frequency of the reference signal, when detecting a defect zone of the optical disk.
  • 8. The method according to claim 7, further comprising the step of: tracking the data signal to generate the frequency of the reference signal when detecting a defect-free zone of the optical disk.
  • 9. The method according to claim 7, wherein the jitter signal is generated according to a phase difference between the data signal and the reference signal.
  • 10. The method according to claim 7, wherein when the jitter signal exceeds the threshold value, the step of storing the frequency of the reference signal is stopped.
Priority Claims (1)
Number Date Country Kind
095124055 Jun 2006 TW national