DATA PROCESSING METHOD, APPARATUS, AND DEVICE

TECHNICAL FIELD

This application relates to the field of communication technologies, and in particular, to a data processing method, an apparatus, and a device.

BACKGROUND

A polar code (Polar code) is a channel encoding scheme that can be strictly proved to “reach” a Shannon channel capacity. The polar code features good performance, low complexity, and the like, and may be applied to a 5th generation (5^thgeneration, 5G) communication system and a future communication system. The polar code is a linear block code, and encoded data may be generated by using an encoding matrix. Currently, the encoding matrix of the polar code determines that a device can start encoding or decoding only after receiving complete to-be-encoded data or to-be-decoded data.

SUMMARY

This application provides a data processing method, an apparatus, and a device. According to the method, a new encoding matrix of a polar code is designed, to implement stream encoding and/or stream decoding.

According to a first aspect, this application provides a first data processing method. The data processing method may be performed by a terminal device or a network device. An example in which the terminal device is an execution body and the terminal device is an encoding side is used. The terminal device obtains an information bit sequence, encodes the information bit sequence based on an encoding matrix G to obtain encoded data, and then sends the encoded data. The encoding matrix G is represented as:

$G = [\begin{matrix} G_{N^{'}} & O & \dots & O \\ O & G_{N^{'}} & \dots & O \\ \dots & \dots & ⋱ & \dots \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}],$

the encoding matrix G is a matrix with a size of (m×2ⁿ)×(m×2ⁿ), m and n are positive integers, the matrix G_N′is a polar generator matrix with a size of 2ⁿ×2ⁿ, and a matrix O is an all-zero matrix with a size of 2ⁿ×2ⁿ.

According to the method, a new encoding matrix G of a polar code is designed. When the terminal device encodes to-be-encoded information bits by using the encoding matrix G, after receiving a part of information bits in an encoding process, the terminal device may encode the part of information bits and send encoded data, to implement stream encoding and help reduce sizes of an encoder and a buffer in the terminal device. In addition, the to-be-encoded information bits are encoded by using the encoding matrix, to obtain the encoded data, which facilitates stream decoding.

In a possible implementation, the information bit sequence includes m segments, and a polar generator matrix of each segment is G_N′.

According to the method, the information bit sequence may alternatively be divided into the m segments, and a modulo two multiplication operation is performed on each segment and the matrix G_N′.

In a possible implementation, quantities of information bits in the m segments are k₀, k₁, . . . , k_m−1, where k₀is less than k_m−1, and k₀≤k₁≤ . . . ≤k_m−1.

In a possible implementation, a quantity of information bits in an i^thsegment is k_i, where i satisfies 0≤i≤m−1.

According to the method, quantities of information bits in all segments are different, and change according to a specific quantity rule.

In a possible implementation, m pieces of buffered data are obtained, where a j^thpiece of buffered data is obtained by encoding a j^thsegment of the information bit sequence by using the matrix G_N′, and j satisfies 0≤j≤m−1; and

- the encoded data includes m segments, a 0^thsegment of encoded data is an (m−1)^thpiece of buffered data, an i^thsegment of encoded data is obtained by performing exclusive OR processing on a j^thpiece of buffered data and the (m−1)^thpiece of buffered data, i satisfies 1≤i≤m−1, and j satisfies 0≤j≤m−2.

In a possible implementation, the (m−1)^thpiece of buffered data is first sent; and then the i^thsegment of encoded data is successively sent, where 1≤i≤m−1.

According to the method, after the information bits in the m segments are converted into the m pieces of buffered data, the encoded data is sent in specified order.

In a possible implementation, elementary column transformation is performed on the encoding matrix G, where a transformed encoding matrix

$G^{'} = [\begin{matrix} O & G_{N^{'}} & \dots & O \\ O & O & \dots & \dots \\ \dots & \dots & ⋱ & G_{N^{'}} \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}];$

and the information bit sequence is encoded based on the transformed encoding matrix G′, to obtain the encoded data.

According to the method, elementary column transformation is performed on the encoding matrix G, so that when the terminal device encodes the to-be-encoded information bits by using the transformed encoding matrix G′, stream encoding can also be implemented. This helps reduce the sizes of the encoder and the buffer in the terminal device.

In a possible implementation, quantities of information bits in the m segments are k₀, k₁, . . . , k_m−1,where k₁is less than k₀, and k₁≤ . . . ≤k_m−1≤k₀.

In a possible implementation, a quantity of information bits in an i^thsegment is k_i, where i satisfies 0≤i≤m−1.

According to the method, quantities of information bits included in all segments are different. It is assumed that first received k₀information bits have a largest quantity (that is, a 0^thsegment has a largest quantity of information bits), and the encoder separately encodes remaining m−1 segments based on encoded data corresponding to the first received k₀information bits, to facilitate stream encoding.

In a possible implementation, the encoded data includes m segments, a 0^thsegment of encoded data is obtained by encoding a 0^thsegment of the information bit sequence based on the matrix G_N′; and an i^thsegment of encoded data is obtained by encoding an i^thsegment of the information bit sequence based on the matrix G_N′and then performing exclusive OR processing on the i^thsegment and the 0^thsegment of encoded data.

According to the method, because the information bit sequence is divided into the m segments, the encoded data corresponding to the m segments is also divided into the m segments. In this encoding scheme, the 0^thsegment of encoded data is buffered, and exclusive OR processing (for example, information interleaving) is separately performed on the 0^thsegment of encoded data and the remaining m−1 segments of encoded data, to support stream encoding.

According to a second aspect, this application provides a second data processing method. The data processing method may be performed by a terminal device or a network device. An example in which the terminal device is an execution body and the terminal device is an encoding side is used. The terminal device obtains an information bit sequence, where the information bit sequence includes m segments, and processes each segment by using a polar generator matrix G_N′of the segment, to obtain m pieces of buffered data, where the matrix G_N′is a polar generator matrix with a size of 2ⁿ×2ⁿ. Then, the terminal device obtains and sends encoded data based on the m pieces of buffered data. The encoded data includes m segments, a 0^thsegment of encoded data is an (m−1)^thpiece of buffered data, an i^thsegment of encoded data is obtained by performing exclusive OR processing on a j^thpiece of buffered data and the (m−1)^thpiece of buffered data, i satisfies 1≤i≤m−1, and j satisfies 0≤j≤m−2.

According to the method, the terminal device divides the to-be-encoded information bit sequence into the m segments, performs encoding and information interleaving on each segment by using the polar generator matrix with the size of 2ⁿ×2ⁿ, and sends the encoded data in an interleaved manner, to facilitate stream decoding.

In a possible implementation, quantities of information bits in the m segments are k₀, k₁, . . . , k_m−1, where k₀is less than k_m−1, and k₀≤k₁≤ . . . ≤k_m−1.

In a possible implementation, a quantity of information bits in an i^thsegment is k_i, where i satisfies 0≤i≤m−1.

In a possible implementation, the terminal device may encode the information bit sequence based on an encoding matrix G to obtain the encoded data. The encoding matrix

$G = [\begin{matrix} G_{N^{'}} & O & \dots & O \\ O & G_{N^{'}} & \dots & O \\ \dots & \dots & ⋱ & \dots \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}],$

the encoding matrix G is a matrix with a size of (m×2ⁿ)×(m×2ⁿ), m and n are positive integers, the matrix G_N′is the polar generator matrix with the size of 2ⁿ×2ⁿ, and a matrix O is an all-zero matrix with a size of 2ⁿ×2ⁿ.

According to the method, the encoding matrix based on the polar generator matrix is designed, which is similar to constructing a coupling matrix of the polar generator matrix, to facilitate stream decoding with the encoding matrix G.

According to a third aspect, this application provides a third data processing method. The data processing method may be performed by a terminal device or a network device. An example in which the terminal device is an execution body and the terminal device is an encoding side is used. The terminal device obtains an information bit sequence, where the information bit sequence includes m segments, and processes each segment by using a polar generator matrix G_N′of the segment, to obtain and send encoded data. The matrix G_N′is a polar generator matrix with a size of 2ⁿ×2ⁿ, the encoded data includes m segments, a 0^thsegment of encoded data is obtained by encoding a o^thsegment of the information bit sequence based on the matrix G_N′, and an i^thsegment of encoded data is obtained by encoding an i^thsegment of the information bit sequence based on the matrix G_N′and then performing exclusive OR processing on the i^thsegment and the 0^thsegment of encoded data.

According to the method, the terminal device divides the to-be-encoded information bit sequence into the m segments, and performs encoding and information interleaving on each segment by using the polar generator matrix with the size of 2ⁿ×2ⁿ. In this way, after receiving a part of information in an encoding process, the terminal device can encode and send the part of information (that is, to support stream encoding), to reduce sizes of an encoder and a buffer.

In a possible implementation, quantities of information bits in the m segments are k₀, k₁, . . . , k_m−1, where k, is less than k₀, and k₁≤ . . . ≤k_m−1≤k₀.

In a possible implementation, a quantity of information bits in an i^thsegment is k_i, where i satisfies 0≤i≤m−1.

In a possible implementation, the terminal device may encode the information bit sequence based on an encoding matrix G′ to obtain the encoded data. The encoding matrix

$G^{'} = [\begin{matrix} O & G_{N^{'}} & \dots & O \\ O & O & \dots & \dots \\ \dots & \dots & ⋱ & G_{N^{'}} \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}],$

the encoding matrix G′ is a matrix with a size of (m×2ⁿ)×(m×2ⁿ), m and n are positive integers, the matrix G_N′is the polar generator matrix with the size of 2ⁿ×2ⁿ, and a matrix O is an all-zero matrix with a size of 2ⁿ×2ⁿ.

It should be noted that the methods in the first aspect to the third aspect may alternatively be performed by the network device. In this case, the network device is an encoding side, and the terminal device is a decoding side.

According to a fourth aspect, this application provides a fourth data processing method. The data processing method may be performed by a terminal device or a network device. An example in which the network device is an execution body and the network device is a decoding side is used. The network device receives encoded data, and decodes the encoded data to obtain decoded data. The encoded data is obtained by encoding an information bit sequence based on an encoding matrix G, the encoding matrix

$G = [\begin{matrix} G_{N^{'}} & O & \dots & O \\ O & G_{N^{'}} & \dots & O \\ \dots & \dots & ⋱ & \dots \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}],$

the encoding matrix G is a matrix with a size of (m×2ⁿ)×(m×2ⁿ), m and n are positive integers, a matrix G_N′is a polar generator matrix with a size of 2ⁿ×2ⁿ, and a matrix O is an all-zero matrix with a size of 2ⁿ×2ⁿ.

According to the method, because the encoded data is obtained based on a new encoding matrix G of a polar code designed in this application, after receiving the encoded data, the decoding side may support decoding of a part of information after receiving the part of information in a decoding process, to reduce a size of a decoder.

In a possible implementation, the information bit sequence includes m segments, and a polar generator matrix of each segment is G_N′.

In a possible implementation, the network device obtains marked data corresponding to a 0^thsegment of encoded data and marked data corresponding to a 1^stsegment of encoded data; performs an F operation on the marked data corresponding to the 0^thsegment of encoded data and the marked data corresponding to the 1^stsegment of encoded data, to obtain marked data corresponding to the 1^stsegment of encoded data after the F operation; performs polar code decoding on the marked data corresponding to the 1^stsegment of encoded data after the F operation, to obtain decoded data corresponding to the 1^stsegment of encoded data; and then enhances, based on the marked data corresponding to the 1^stsegment of encoded data and the decoded data corresponding to the 1^stsegment of encoded data, the marked data corresponding to the 0^thsegment of encoded data. It should be noted that the 0^thsegment of encoded data includes last N′ columns of the encoding matrix G, or the 0^thsegment of encoded data includes first N′ columns of an encoding matrix G′ obtained by performing elementary column transformation on first (m−1)×2ⁿcolumns and last 2ⁿcolumns of the encoding matrix G. The 1^stsegment of encoded data includes first N′ columns of the encoding matrix G, or the 1^stsegment of encoded data includes first N′+1 columns to first N′*2 columns of the encoding matrix G′.

According to the method, the network device performs decoding based on the 0^thsegment of encoded data that is received for the first time and the adjacent 1st segment of encoded data, to implement stream decoding. In addition, the 0^thsegment of encoded data is enhanced, which facilitates stream decoding based on the enhanced 0^thsegment of encoded data in a subsequent decoding process. In a possible implementation, the network device continues to obtain marked data corresponding to a q^thsegment of encoded data, where q is 2≤q≤m−1; performs an F operation on the marked data corresponding to the q^thsegment of encoded data and enhanced marked data corresponding to the 0^thsegment of encoded data, to obtain marked data corresponding to the q^thsegment of encoded data after the F operation; performs polar code decoding on the marked data corresponding to the q^thsegment of encoded data after the F operation, to obtain decoded data corresponding to the q^thsegment of encoded data; and enhances, based on the marked data corresponding to the q^thsegment of encoded data and the decoded data corresponding to the q^thsegment of encoded data, the enhanced marked data corresponding to the 0^thsegment of encoded data.

According to the method, a 2^ndsegment of encoded data to an (m−1)^thsegment of encoded data are decoded by using a same method. In addition, as decoding is performed, the marked data corresponding to the 0^thsegment of encoded data is continuously enhanced, which facilitates stream decoding.

It should be noted that the method in the fourth aspect may alternatively be performed by the terminal device. In this case, the network device is an encoding side, and the terminal device is a decoding side.

According to a fifth aspect, an embodiment of this application provides a data processing apparatus. The data processing apparatus may be a terminal device, or may be an apparatus in the terminal device, or may be an apparatus that can be used with the terminal device. In a design, the data processing apparatus may include a one-to-one corresponding module for performing the method/operation/step/action described in any one of the first aspect to the third aspect or the possible implementations of the first aspect to the third aspect. The module may be a hardware circuit, or may be software, or may be implemented by a combination of a hardware circuit and software. In a design, the data processing apparatus may include a processing unit and a communication unit.

For specific descriptions of the method/operation/step/action performed by the terminal device, refer to the corresponding descriptions in any one of the first aspect to the third aspect or the possible implementations of the first aspect to the third aspect. Details are not described herein again. It may be understood that the data processing apparatus can also achieve effects that can be achieved in the first aspect to the third aspect.

According to a sixth aspect, an embodiment of this application provides a data processing apparatus. The data processing apparatus may be a network device, or may be an apparatus in the network device, or may be an apparatus that can be used with the network device. In a design, the data processing apparatus may include a one-to-one corresponding module for performing the method/operation/step/action described in any one of the fourth aspect or the possible implementations of the fourth aspect. The module may be a hardware circuit, or may be software, or may be implemented by a combination of a hardware circuit and software. In a design, the data processing apparatus may include a processing unit and a communication unit.

For specific descriptions of the method performed by the network device, refer to the corresponding descriptions in any one of the fourth aspect or the possible implementations of the fourth aspect. Details are not described herein again. It may be understood that the data processing apparatus can also achieve effects that can be achieved in the fourth aspect.

According to a seventh aspect, an embodiment of this application provides a communication apparatus. The communication apparatus includes an input/output interface and a logic circuit. The input/output interface is configured to input or output data. The logic circuit processes the data according to the method in any one of the first aspect to the third aspect or the possible implementations of the first aspect to the third aspect, to obtain processed data.

According to an eighth aspect, an embodiment of this application provides a communication apparatus. The communication apparatus includes an input/output interface and a logic circuit. The input/output interface is configured to input or output data. The logic circuit processes the data according to the method in any one of the fourth aspect or the possible implementations of the fourth aspect, to obtain processed data.

According to a ninth aspect, an embodiment of this application provides a terminal device, including a processor, where the processor is coupled to a memory, the memory is configured to store instructions, and when the instructions are executed by the processor, the terminal device is enabled to implement the method in any one of the first aspect to the fourth aspect or the possible implementations of the first aspect to the fourth aspect.

According to a tenth aspect, an embodiment of this application provides a network device, including a processor, where the processor is coupled to a memory, the memory is configured to store instructions, and when the instructions are executed by the processor, the network device is enabled to implement the method in any one of the first aspect to the fourth aspect or the possible implementations of the first aspect to the fourth aspect.

According to an eleventh aspect, an embodiment of this application provides a communication system. The communication system includes a transmitting end and a receiving end. The transmitting end is configured to implement a function in the method in any one of the first aspect to the third aspect or the possible implementations of the first aspect to the third aspect. The receiving end is configured to implement a function in the method in any one of the fourth aspect or the possible implementations of the fourth aspect. Optionally, the communication system may include the data processing apparatuses described in the fifth aspect and the sixth aspect, or may include the communication apparatuses described in the seventh aspect and the eighth aspect, or may include the devices described in the ninth aspect and the tenth aspect.

According to a twelfth aspect, an embodiment of this application further provides a computer-readable storage medium. The computer-readable storage medium stores instructions, and when the instructions are run on a computer, the computer is enabled to perform the method in any one of the first aspect to the fourth aspect or the possible implementations of the first aspect to the fourth aspect.

According to a thirteenth aspect, an embodiment of this application provides a chip system. The chip system includes a processor, and may further include a memory, configured to implement a function in the method in any one of the first aspect to the fourth aspect or the possible implementations of the first aspect to the fourth aspect. The chip system may include a chip, or may include a chip and another discrete component.

According to a fourteenth aspect, an embodiment of this application further provides a computer program product, including instructions. When the instructions are run on a computer, the computer is enabled to perform the method in any one of the first aspect to the fourth aspect or the possible implementations of the first aspect to the fourth aspect.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a diagram of a communication system according to this application;

FIG. 2 is a diagram of encoding a polar code of8×8;

FIG. 3 is a schematic flowchart of a data processing method according to this application;

FIG. 4 is a diagram of stream encoding supporting stream decoding according to this application;

FIG. 5 is a diagram of stream encoding according to this application;

FIG. 6 is a schematic flowchart of another data processing method according to this application;

FIG. 7 is a diagram of stream decoding according to this application;

FIG. 8 is a performance analysis diagram of a data processing method according to this application;

FIG. 9 is a diagram of an apparatus according to this application; and

FIG. 10 is a diagram of a communication device according to this application.

DESCRIPTION OF EMBODIMENTS

In this application, “/” may represent an “or” relationship between associated objects. For example, A/B may represent A or B. In addition, “and/or” may indicate that there are three relationships between associated objects. For example, A and/or B may represent the following three cases: Only A exists, both A and B exist, and only B exists, where A and B may be singular or plural. For ease of description of technical solutions of this application, in this application, terms such as “first” and “second” may be used to distinguish between technical features with same or similar functions. The terms such as “first” and “second” do not limit a quantity and an execution sequence, and the terms such as “first” and “second” do not limit a definite difference. In this application, the terms such as “example” or “for example” is used to represent an example, an illustration, or a description. Any embodiment or design scheme described as “example” or “for example” should not be explained as being more preferred or having more advantages than another embodiment or design scheme. The terms such as “example” or “for example” is used to present a related concept in a specific manner for ease of understanding.

The following describes the technical solutions of this application with reference to the accompanying drawings in this application.

This application provides a data processing method. According to the method, a new encoding matrix of a polar code is constructed, and to-be-encoded information bits are processed by using the encoding matrix, to implement stream encoding and/or stream decoding of the polar code. The data processing method may be applied to a communication system, and a system architecture is shown in FIG. 1. The communication system includes a network device and a terminal device, and the network device may provide a communication service for the terminal device.

The communication system mentioned in this application includes but is not limited to: a narrowband-internet of things (narrowband-Internet of things, NB-IoT) system, a global system for mobile communications (global system for mobile communications, GSM), an enhanced data rate for GSM evolution (enhanced data rate for GSM evolution, EDGE) system, a wideband code division multiple access (wideband code division multiple access, WCDMA) system, a code division multiple access 2000 (code division multiple access, CDMA2000) system, a time division-synchronization code division multiple access (time division-synchronization code division multiple access, TD-SCDMA) system, a long term evolution (long term evolution, LTE) system, three application scenarios of a 5G mobile communication system: enhanced mobile broadband (enhanced mobility broad band, eMBB), ultra-reliable and low-latency communications (ultra-reliable and low-latency communications, URLLC), and enhanced machine-type communication (enhanced machine-type communication, eMTC), and a future communication system (such as 6G/7G). The network device may be a device that can communicate with the terminal device. The network device may be a base station, a relay station, or an access point. The base station may be a base transceiver station (base transceiver station, BTS) in a global system for mobile communications (global system for mobile communications, GSM) or a code division multiple access (code division multiple access, CDMA) network, or may be a 3G base station NodeB in a wideband code division multiple access (wideband code division multiple access, WCDMA) system, or may be an evolutional NodeB (eNB or eNodeB for short) in a long term evolution (long term evolution, LTE) system. The network device may alternatively be a satellite in a satellite communication system. The network device may alternatively be a radio controller in a cloud radio access network (cloud radio access network, CRAN) scenario. The network device may alternatively be a network device in a 5G network or a network device (for example, a gNodeB) in a future evolved public land mobile network (public land mobile network, PLMN) network. The network device may alternatively be a wearable device, an uncrewed aerial vehicle, a device in the internet of vehicles (for example, a vehicle to everything (vehicle to everything, V2X) device), a communication device in device to device (device to device, D2D) communication, or a network device used in a future communication system.

The terminal device may be user equipment (user equipment, UE), an access terminal, a terminal unit, a terminal station, a mobile station, a remote station, a remote terminal, a mobile device, a terminal, a wireless communication device, a terminal agent, a terminal apparatus, or the like. The access terminal may be a cellular phone, a cordless phone, a session initiation protocol (session initiation protocol, SIP) phone, a wireless local loop (wireless local loop, WLL) station, a personal digital assistant (personal digital assistant, PDA), a handheld device with a wireless communication function, a computing device, another processing device connected to a wireless modem, a wearable device, an uncrewed aerial vehicle, a V2X device, a D2D device, a terminal device in the 5G network, a terminal device in the future evolved PLMN network, a terminal device in the future communication system, or the like.

It may be understood that this application is an encoding scheme, and may be used for a dedicated network device or a general-purpose device, may be used for the network device, or may be used for various terminal devices or the like. This application may be implemented by using a dedicated chip (for example, an application-specific integrated circuit (application-specific integrated circuit, ASIC)), or may be implemented by using a programmable chip (for example, a field programmable gate array (field programmable gate array, FPGA)), or may be implemented by using software (program code in a memory). This is not limited in this application.

(1) Related Concepts in This Application
1. Polar Code:

The polar code is a channel encoding scheme that can be strictly proved to reach a channel capacity. The polar code features high performance, low complexity, a flexible matching manner, and the like. Currently, the polar code has been determined as an uplink and/or downlink control channel encoding scheme in a 5th generation mobile communication (5^thgeneration, 5G) control channel enhanced mobile broadband (enhanced mobile broadband, eMBB) scenario.

For example, FIG. 2 is a diagram of encoding a polar code of 8×8. To-be-encoded bits are sorted based on reliability of the to-be-encoded bits, and are successively arranged at different locations in a to-be-encoded block. Generally, a bit with high reliability is set as an information bit (data), and a bit with low reliability is set as a frozen (frozen) bit. A value of the frozen bit is usually set to 0, and is known to both a transmitting end and a receiving end during actual transmission. As shown in FIG. 2, u₇, u₆, u₅, u₃are four bits with higher reliability and are respectively set as information bits, and u₄, u₂, u₁, u₀are four bits with lower reliability and are respectively set as frozen bits.

The polar code is a linear block code. A generator matrix of the polar code is G_N, and an encoding process of the polar code is x₁^N=u₁^NG_N. u₁^N=(u₁, u₂, . . . , u_N) is a binary row vector, and has a length of N (that is, a code length). G_Nis a matrix of N×N, and G_N=F₂^⊗(log²^(N)), where

$F_{2} = [\begin{matrix} 1 & 0 \\ 1 & 1 \end{matrix}],$

and F₂^⊗(log²^(N))is defined as a Kronecker (Kronecker) product of log₂(N) matrices F₂. For example, when N=4, log₂(N)=log₂(4)=2, and

$? = [\begin{matrix} 1 & 0 & 0 & 0 \\ 1 & 1 & 0 & 0 \\ 1 & 0 & 1 & 0 \\ 1 & 1 & 1 & 1 \end{matrix}];$

$? indicates text missing or illegible when filed$

or when N=8, log₂(N)=log₂(8)=3, and

$? = [\begin{matrix} 1 & 0 & 0 & 0 & 0 & 0 & 0 & 0 \\ 1 & 1 & 0 & 0 & 0 & 0 & 0 & 0 \\ 1 & 0 & 1 & 0 & 0 & 0 & 0 & 0 \\ 1 & 1 & 1 & 1 & 0 & 0 & 0 & 0 \\ 1 & 0 & 0 & 0 & 1 & 0 & 0 & 0 \\ 1 & 1 & 0 & 0 & 1 & 1 & 0 & 0 \\ 1 & 0 & 1 & 0 & 1 & 0 & 1 & 0 \\ 1 & 1 & 1 & 1 & 1 & 1 & 1 & 1 \end{matrix}] .$

$? indicates text missing or illegible when filed$

Therefore, a standard mother code length of the polar code is N=2ⁿ, where n is a positive integer.

2. Encoding Matrix G Provided in This Application:

The encoding matrix provided in this application is

$G = [\begin{matrix} G_{N^{'}} & 0 & \dots & 0 \\ 0 & G_{N^{'}} & \dots & 0 \\ \dots & \dots & ⋱ & \dots \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}],$

G is a matrix with a size of (m×2ⁿ)×(m×2ⁿ), m and n are positive integers, a matrix G_N′is a polar generator matrix with a size of 2ⁿ×2ⁿ, and is represented as G_N′=F₂^⊗(log²^(N′)), and a matrix O is an all-zero matrix with a size of 2ⁿ×2ⁿ.

In other words, if the encoding matrix G is considered as a matrix of m×m, each element in the matrix is a matrix of 2ⁿ×2ⁿ, each element in a diagonal of the matrix is a matrix G_N′, each element in a bottom edge of the matrix is a matrix G_N′, and an element other than the elements in the diagonal and the bottom edge is a matrix O.

A mother code length of the encoding matrix G is N′=m×2ⁿ. It may be understood that when m=1 or m=2, the encoding matrix G is the same as an encoding matrix of an ordinary polar code. When m≥3, the encoding matrix

$G = [\begin{matrix} G_{N^{'}} & 0 & \dots & 0 \\ 0 & G_{N^{'}} & \dots & 0 \\ \dots & \dots & ⋱ & \dots \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}] .$

3. Another Encoding matrix G′ Provided in This Application:

Elementary column transformation may be performed on the encoding matrix G, to obtain the transformed encoding matrix

$G^{'} = [\begin{matrix} O & G_{N^{'}} & \dots & O \\ O & O & \dots & \dots \\ \dots & \dots & ⋱ & G_{N^{'}} \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}] .$

It may be understood that elementary column transformation may be performed on first (m−1)×2ⁿcolumns and last 2ⁿcolumns of the encoding matrix G, to obtain the encoding matrix G′. Same as the encoding matrix G, the encoding matrix G′ is a matrix with the size of (m×2ⁿ)×(m×2ⁿ), m and n are positive integers, the matrix G_N′is the polar generator matrix with the size of 2^n×2ⁿ, and is represented as G_N′=F₂^⊗(log²^(N′)), the matrix O is the all-zero matrix with the size of 2ⁿ×2ⁿ, and a mother code length of the encoding matrix G′ is N′=m×2ⁿ.

4. F operation:

The F operation is a basic decoding operation of the polar code, and a predefined F function (f-function) is used for processing. Inputs of the F function are L₀and L₁, and the F function may be simplified as:

$f (L_{0}, L_{1}) = (sig (L_{0}) ⋀ sig (L_{1}) ? - 1 : 1) * (abs (L_{0}) > abs (L_{1}) ? abs (L_{1}) : abs (L_{0})) .$

sig indicates a sign operation. If an immediate number is greater than 0, a return value is 0. If an immediate number is not greater than 0, a return value is 1. abs indicates an absolute value operation. For example, it is assumed that there is encoded data x₀and x_m−1with a length of N′, an F operation is performed on x₀and x_m−1, and signs of x₀and x_m−1are compared. If the signs are consistent, a value of the immediate number is 1. If the signs are not consistent, a value of the immediate number is −1.

5. G operation:

The G operation is a basic decoding operation of the polar code, and a predefined G function (g-function) is used for processing. Inputs of the G function are L₀, L₁, and a feedback value B, and the G function is g(L₀, L₁, B)=(B=0)?L₁+L₀: L₁−L₀.

(2) Data Processing Method for Implementing Stream Encoding Provided in this Application

1. Procedure of Implementing Stream Encoding by Using the Encoding Matrix G:

FIG. 3 is a schematic flowchart of a data processing method according to this application.

The data processing method may be performed by a terminal device, or may be performed by a network device, an encoding procedure is mainly performed, and the following steps are included.

S101: Obtain an information bit sequence.

The information bit sequence includes a plurality of to-be-encoded information bits. For example, the information bit sequence may be represented as {a₀, a₁, a₂, . . . , a_k−1}, and one element in the information bit sequence represents one to-be-encoded bit. It may be understood that a length of the information bit sequence may not be a specified code length (for example, the length is not m×2ⁿ), and the information bit sequence may be processed (for example, a frozen bit is inserted into the information bit sequence), so that a length of encoded data obtained by encoding the information bit sequence is N′=m×2ⁿ.

It may be further understood that the to-be-encoded bits in this application may further include a cyclic redundancy check (cyclic redundancy check, CRC) bit and/or a parity check (parity check, PC) bit, and may further involve an operation such as scrambling some bits or even all bits. Because this is not related to the essence of the solution in this application, the to-be-encoded bits are used for unified description. Details are not described herein. S102: Encode the information bit sequence based on an encoding matrix G to obtain encoded data.

For descriptions of the encoding matrix G, refer to the foregoing related concepts. Details are not described herein again. The following describes an encoding process by using an example. It is assumed that the information bit sequence is u={a₀, a₁, a₂, . . . , a_k−1}, and the encoding process may be represented as:

$\begin{matrix} x^{N} = u^{N} \times [\begin{matrix} G_{N^{'}} & 0 & \dots & 0 \\ 0 & G_{N^{'}} & \dots & 0 \\ \dots & \dots & ⋱ & \dots \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}] & (1) \end{matrix}$

u^Nis the information bit sequence, modulo two multiplication is performed on u^Nand the encoding matrix G to obtain the encoded data x^N, and a length of x^Nis m×2ⁿ.

In a possible implementation, the information bit sequence may be divided into m segments, that is, the information bit sequence includes the m segments, and a polar generator matrix of each segment is G_N′. A length of each segment is 2ⁿ. In this case, modulo two multiplication may be performed on each segment and the polar generator matrix G_N′with a size of 2ⁿ×2ⁿ, and information interleaving may be performed between segments, to obtain the encoded data. Specifically, two cases are included in this implementation in which the information bit sequence is encoded to obtain the encoded data.

Case 1: Quantities of information bits in the m segments are k₀, k₁, . . . , k_m−1, where k_ois less than k_m−1, and k₀≤k₁≤ . . . k_m−1.

k₀is a quantity of information bits in a 0^thsegment, k₁is a quantity of information bits in a 1^stsegment, and by analogy, k_m−1, is a quantity of information bits in an (m−1)^thsegment. In addition, the quantity of information bits in the 0^thsegment is less than the quantity of information bits in the (m−1)^thsegment, and the (m−1)^thsegment has a largest quantity of information bits (that is, a last segment includes a largest quantity of information bits). In this case, the encoding process includes the following steps:

- obtain m pieces of buffered data, where a j^thpiece of buffered data is obtained by encoding a j^thsegment of the information bit sequence by using the matrix G_N′, and j satisfies 0≤j≤m−1;
- the encoded data includes m segments;
- a 0^thsegment of encoded data is an (m−1)^thpiece of buffered data; and
- an i^thsegment of encoded data is obtained by performing exclusive OR processing on the j^thpiece of buffered data and the (m−1)^thpiece of buffered data, i satisfies 1≤i≤m−1, and j satisfies 0≤j≤m−2.

For example, the terminal device first separately performs a modulo two multiplication operation on each segment of the information bit sequence by using the matrix G_N′, to obtain the m pieces of buffered data, and then separately performs exclusive OR processing (for example, a modulo two addition operation) on the (m−1)^thpiece of buffered data and first m−2 pieces of buffered data, to obtain the encoded data.

It may be understood that an encoding principle of encoding the information bit sequence by using the encoding process described in the case 1 is similar to that of encoding the information bit sequence by using the encoding matrix G.

Case 2: Quantities of information bits in the m segments are k₀, k₁, . . . , k_m−1, where k₁is less than k₀, and k₁≤ . . . ≤k_m−1≤k₀.

k₀is a quantity of information bits in a 0^thsegment, k₁is a quantity of information bits in a 1^stsegment, and by analogy, k_m−1is a quantity of information bits in an (m−1)^thsegment. In addition, the quantity of information bits in the 0^thsegment is greater than the quantity of information bits in the 1^stsegment, and the 0^thsegment has a largest quantity of information bits (that is, the 1^stsegment includes a largest quantity of information bits). In this case, the encoded data includes m segments; a 0^thsegment of encoded data is obtained by encoding a 0^thsegment of the information bit sequence based on the matrix G_N′; and an i^thsegment of encoded data is obtained by encoding an i^thsegment of the information bit sequence based on the matrix G_N′and then performing exclusive OR processing on the i^thsegment and the 0^thsegment of encoded data. For example, the terminal device first performs a modulo two multiplication operation on the 0^thsegment of the information bit sequence by using the matrix G_N′, to obtain the 0^thsegment of encoded data, then performs a modulo two multiplication operation on the 1^stsegment of the information bit sequence by using the matrix G_N′, and performs exclusive OR processing (for example, a modulo two addition operation) on an operation result and the 0^thsegment of encoded data, to obtain a 1^stsegment of encoded data, and so on, until an (m−1)^thsegment of encoded data is obtained. It may be understood that the foregoing encoding process may be considered as a stream encoding process, that is, the encoder may receive to-be-encoded data while encoding received to-be-encoded data and then send encoded data.

Optionally, the encoding matrix G′ corresponding to the encoding process described in the case 2 is obtained by performing elementary column transformation on the encoding matrix G, where the encoding matrix

$G^{'} = [\begin{matrix} O & G_{N^{'}} & \dots & O \\ O & O & \dots & \dots \\ \dots & \dots & ⋱ & G_{N^{'}} \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}] .$

In other words, an encoding principle of encoding the information bit sequence by using the encoding process described in the case 2 is similar to that of encoding the information bit sequence by using the encoding matrix G.

S103: Send the encoded data.

If the encoding procedure described in S102 can implement stream encoding (for example, the case 2 described in S102), after completing a segment of encoded data, the terminal device may send the segment of encoded data, and does not need to wait for all bits in the information bit sequence to be encoded before sending all encoded data. If the encoding procedure described in S102 is designed to implement stream decoding (for example, the case 1 described in S102), the terminal device sends all encoded data after all bits in the information bit sequence are encoded.

It can be learned that, in the data processing method provided in this application, a new encoding matrix G of a polar code is designed. When the terminal device encodes to-be-encoded information bits by using the encoding matrix G, after receiving a part of information bits in an encoding process, the terminal device may encode the part of information bits and send encoded data, to implement stream encoding and help reduce sizes of an encoder and a buffer in the terminal device. In addition, the to-be-encoded information bits are encoded by using the encoding matrix, to obtain the encoded data, which facilitates stream decoding.

2. Stream Encoding Process Supporting Stream Decoding

FIG. 4 is a diagram of stream encoding supporting stream decoding according to this application. An information bit sequence may be represented as {a₀, a₁, a₂, . . . , a_k−1}, and one element in the information bit sequence represents one to-be-encoded bit. The information bit sequence is divided into m segments, and k_iinformation bits are allocated to each segment. A frozen bit is inserted into first received k₀information bits {a₀, a₁, a₂, . . . , a_k₀₋₁} to obtain u₀^N′, a modulo two multiplication operation is performed on u₀^N′and the matrix G_N′to obtain y₀^N′, and y₀^N′is retained in a buffer. y₁^N′˜y_m−1^N′may be obtained by using a same processing procedure for the k₀information bits, and y₁^N′˜y_m−1^N′are retained in the buffer.

It should be noted that an order of sending y₁^N′˜y_m−1^N′is as follows:

First, y_m−1^N′is assigned to x_m−1^N′and is sent.

Then, exclusive OR is performed on y₀^N′and y_m−1^N′to obtain and send x₀^N′.

Next, exclusive OR is performed on y₁^N′and y_m−1^N′to obtain and send x₁^N′.

By analogy, exclusive OR is performed on y_m−2^N′and y_m−1^N′to obtain and send x_m−2^N′.

After sending is completed in the foregoing order, the stream encoding process is completed.

3. Procedure Supporting Stream Encoding

FIG. 5 is a diagram of stream encoding according to this application. An information bit sequence may be represented as {a₀, a₁, a₂, . . . , a_k−1}, and one element in the information bit sequence represents one to-be-encoded bit. The information bit sequence is divided into m segments, and k_iinformation bits are allocated to each segment. A frozen bit is inserted into first received k₀information bits {a₀, a₁, a₂, . . . , a_k₁₋₁} to obtain u₀^N′, a modulo two multiplication operation is performed on u₀^N′and the matrix G_N′to obtain y₀^N′, one copy of y₀^N′is retained in a buffer, and y₀^N′is assigned to x₀^N′and is sent.

A frozen bit is inserted into later received k₁information bits {a_k₀, a_k₀₊₁, a_k₀₊₂, . . . , a_k₀_+k₁₋₁} to obtain u₁^N′, a modulo two multiplication operation is performed on u₁^N′and the matrix G_N′to obtain y₁^N′. y₀^N′is obtained from the buffer, exclusive OR is performed on y₁^N′and y₀^N′to obtain x₁^N′, and x₁^N′is sent. x₂^N′˜x_m−1^N′may be obtained and sent by using a same processing procedure for the k₁information bits. After x_m−1^N′is sent, y₀^N′in the buffer is deleted, and the stream encoding process is completed.

(3) Data Processing Method for Implementing Stream Decoding Provided in this Application

1. Stream Decoding Procedure

FIG. 6 is a schematic flowchart of another data processing method according to this application. The data processing method may be performed by a terminal device, or may be performed by a network device. It may be understood that when the terminal device performs the data processing method described in the third part herein, that is, the terminal device is a decoding side, the network device performs the data processing method described in the second part, that is, the network device is an encoding side. When a decoding procedure is performed, the following steps are included.

S201: Receive encoded data, where the encoded data is obtained by encoding an information bit sequence based on an encoding matrix G.

For descriptions of the encoding matrix G, the encoded data, and encoding of the information bit sequence based on the encoding matrix G, refer to the corresponding descriptions in the second part. Details are not described herein again. For example, to support stream decoding, the encoded data may be obtained by encoding the information bit sequence based on the encoding matrix G, or may be obtained by encoding the information bit sequence in the manner described in the case 1 in S102.

S202: Decode the encoded data to obtain decoded data.

A process of decoding the encoded data is a stream decoding procedure. The terminal device may first decode a received 0^thsegment of encoded data and a received 1^stsegment of encoded data. In other words, after receiving a part of information in the decoding process, the terminal device can decode the part of information. Specifically, the following steps may be included.

s11: Obtain marked data corresponding to the 0^thsegment of encoded data and marked data corresponding to the 1^stsegment of encoded data.

s12: Perform an F operation on the marked data corresponding to the 0^thsegment of encoded data and the marked data corresponding to the 1^stsegment of encoded data, to obtain marked data corresponding to the 1^stsegment of encoded data after the F operation.

s13: Perform polar code decoding on the marked data corresponding to the 1^stsegment of encoded data after the F operation, to obtain decoded data corresponding to the 1^stsegment of encoded data.

s14: Enhance, based on the marked data corresponding to the 1^stsegment of encoded data and the decoded data corresponding to the 1^stsegment of encoded data, the marked data corresponding to the 0^thsegment of encoded data.

The marked data corresponding to the 0^thsegment of encoded data is a log likelihood ratio (log likelihood ratio, LLR) of the 0^thsegment of encoded data, and the marked data corresponding to the 1^stsegment of encoded data is an LLR of the 1^stsegment of encoded data. The LLR of the 0^thsegment of encoded data and the LLR of the 1^stsegment of encoded data are used as inputs of an F function, to obtain the marked data corresponding to the 1^stsegment of encoded data after the F operation. For descriptions of the F function, refer to the foregoing descriptions. Details are not described herein again.

For a method for performing polar code decoding on the marked data corresponding to the 1^stsegment of encoded data after the F operation, refer to an existing polar code decoding scheme. This is not limited in this application. The LLR of the 0^thsegment of encoded data, the LLR of the 1^stsegment of encoded data, and the decoded data corresponding to the 1^stsegment of encoded data are used as inputs of a G function, to enhance the marked data corresponding to the 0^thsegment of encoded data, and facilitate stream decoding based on the enhanced 0^thsegment of encoded data in a subsequent decoding process. For descriptions of the G function, refer to the foregoing descriptions. Details are not described herein again.

In a possible implementation, the marked data corresponding to the 0^thsegment of encoded data may be a likelihood probability of the 0^thsegment of encoded data, and the marked data corresponding to the 1^stsegment of encoded data may be a likelihood probability of the 1^stsegment of encoded data. In this case, the foregoing step s12 is changed to: performing a probability operation on the marked data corresponding to the 0^thsegment of encoded data and the marked data corresponding to the 1^stsegment of encoded data, to obtain marked data corresponding to the 1^stsegment of encoded data in a probability domain. It may be understood that a subsequent processing procedure is still performed according to s13 and s14, and the marked data corresponding to the 0^thsegment of encoded data can be enhanced.

Further, for each segment of subsequently received encoded data, a processing manner is similar to that of s11 to s14, and may include the following steps.

s15: Obtain marked data corresponding to a q^thsegment of encoded data, where q is 2≤q≤m−1.

s16: Perform an F operation on the marked data corresponding to the q^thsegment of encoded data and enhanced marked data corresponding to the 0^thsegment of encoded data, to obtain marked data corresponding to the q^thsegment of encoded data after the F operation.

s17: Perform polar code decoding on the marked data corresponding to the q^thsegment of encoded data after the F operation, to obtain decoded data corresponding to the q^thsegment of encoded data.

s18: Enhance, based on the marked data corresponding to the q^thsegment of encoded data and the decoded data corresponding to the q^thsegment of encoded data, the enhanced marked data corresponding to the 0^thsegment of encoded data.

For example, marked data corresponding to a 2^ndsegment of encoded data is obtained, an F operation is performed on the marked data corresponding to the 2^ndsegment of encoded data and the enhanced marked data corresponding to the 0^thsegment of encoded data, to obtain marked data corresponding to the 2^ndsegment of encoded data after the F operation, polar code decoding is performed on the marked data corresponding to the 2^ndsegment of encoded data after the F operation, to obtain decoded data corresponding to the 2^ndsegment of encoded data, and secondary enhancement is performed, based on the marked data corresponding to the 2^ndsegment of encoded data and the decoded data corresponding to the 2^ndsegment of encoded data, on enhanced marked data corresponding to the 0^thsegment of encoded data, to obtain marked data corresponding to the 0^thsegment of encoded data after the secondary enhancement. For specific implementations of the foregoing steps, refer to specific implementations corresponding to s11 to s14. Details are not described herein again.

It can be learned that, in the data processing method provided in this application, after the encoded data is received, decoding of a part of information may be supported after receiving the part of information in the decoding process, to implement stream decoding, reduce a size of a decoder, and further reduce overheads of the decoding side.

2. Specific Example of a Stream Decoding Procedure

FIG. 7 is a diagram of stream decoding according to this application. When a 0^thsegment of encoded data (a length is N′=2ⁿ) is received, based on the descriptions in the foregoing embodiments, the 0^thsegment of encoded data is an (m−1)^thpiece of buffered data, and the 0^thsegment of encoded data is marked as L_m−1^N′and buffered. L_m−1^N′is an LLR of x_m−1^N′for sending data, and x_m−1^N′is x_m−1^N′to which y_m−1^N′is assigned for sending described in the third section of the second part.

When a 1^stsegment of encoded data (a length is N′=2ⁿ) is received, the 1^stsegment of encoded data is a 0^thpiece of buffered data, the 1^stsegment of encoded data is marked as L₀^N′, an F operation (for example, using an f-function defined for a polar code) is performed on the 1^stsegment of encoded data and L_m−1^N′to obtain {tilde over (L)}₀^N′, and ordinary polar code decoding is performed on {tilde over (L)}₀^N′to obtain decoded data {tilde over (x)}₀^N′. A G operation (for example, using a g-function defined for the polar code) is performed on {tilde over (L)}₀^N′, L_m−1^N′, {tilde over (x)}₀^N′, to obtain enhanced L_m−1^N′.

When a 2^ndsegment of encoded data (a length is N′=2ⁿ) is received, the 2^ndsegment of encoded data is a 1^stpiece of buffered data, the 2^ndsegment of encoded data is marked as L₁^N′, an F operation is performed on the 2^ndsegment of encoded data and L_m−1^N′to obtain {tilde over (L)}₁^N′, and ordinary polar code decoding is performed on {tilde over (L)}₁^N′to obtain decoded data {tilde over (x)}₁^N′. A G operation is performed on {tilde over (L)}₁^N′, L_m−1^N′, {tilde over (x)}_i^N′, to obtain secondary-enhanced L_m−1^N′.

It may be understood that, decoded data {tilde over (x)}₂^N′˜{tilde over (x)}_m−2^N′may be obtained by using the same method, and L_m−1^N′that is enhanced a plurality of times may be obtained as decoding is performed. Finally, ordinary polar code decoding is performed on L_m−1^N′that is enhanced the plurality of times, to obtain decoded data {tilde over (x)}_m−1^N′, and a stream decoding process is completed.

(4) Performance Analysis of a Data Processing Method Provided in This Application

The performance analysis diagram is a diagram of decoding performance obtained by using a simulation decoder with a code length of N′={128,512,2048} and a code rate of R=⅛. A horizontal coordinate of the performance analysis diagram is EsN0 and indicates a ratio of energy of each symbol to a noise power spectral density, and a vertical coordinate is a block error rate (block error rate, BLER), used to measure a system performance test. It may be understood that, by using the stream decoding procedure described in the third part, the decoder can start decoding only after receiving two segments of encoded data (that is, an LLR of N′×2). Therefore, a size of the decoder may be designed as N′×2.

A solid line, a first dashed line, and a second dashed line form a group, and may be used to compare differences in decoding performance when decoders with different sizes and a same decoding scheme are used or decoders with a same size and different decoding schemes are used for a same information bit sequence.

First group: The solid line with a diamond-shaped symbol, the first dashed line with the diamond-shaped symbol, and the second dashed line with the diamond-shaped symbol are decoding performance comparison of a first group. It is assumed that a quantity of information bits in an information bit sequence is K=64, and a sending length is E=K/R=64/(⅛)=512. It is assumed that a decoder size is 256 or 512, and a decoding scheme is existing polar code decoding or stream decoding provided in this application. For example, the first dashed line with the diamond-shaped symbol indicates decoding performance when the sending length E=512, the decoder size is 512, the quantity of information bits is K=64, and existing polar code decoding is used; the solid line with the diamond-shaped symbol indicates decoding performance when the sending length E=512, the decoder size is 256, the quantity of information bits is K=64, and stream decoding is used; and the second dashed line with the diamond-shaped symbol indicates decoding performance when the sending length E=512, the decoder size is 256, the quantity of information bits is K=64, and existing polar code decoding is used. It can be learned from the comparison of the first group that, in a case of the same EsN0, decoding performance of stream decoding is poorer than decoding performance of an ordinary polar code with a larger decoder (that is, a longer code length), but a decoding side of stream decoding uses a smaller decoder, which significantly reduces overheads of the decoding side. In a case of the same EsN0 and the same decoder size, decoding performance of stream decoding is better than decoding performance of the ordinary polar code.

Second group: The solid line with a square symbol, the first dashed line with the square symbol, and the second dashed line with the square symbol are decoding performance comparison of a second group. It is assumed that a quantity of information bits in an information bit sequence is K=256, and a sending length is E=K/R=256/(⅛)=2048. It is assumed that a size of a decoder is 1024 or 2048, and a decoding scheme is existing polar code decoding or stream decoding provided in this application. For example, the first dashed line with the square symbol indicates decoding performance when the sending length E=2048, the decoder size is 2048, the quantity of information bits is K=256, and existing polar code decoding is used; the solid line with the square symbol indicates decoding performance when the sending length E=2048, the decoder size is 1024, the quantity of information bits is K=256, and stream decoding is used; and the second dashed line with the square symbol indicates decoding performance when the sending length E=2048, the decoder size is 2048, the quantity of information bits is K=256, and existing polar code decoding is used. It can be learned from the comparison of the second group that, in a case of the same EsN0, decoding performance of stream decoding is poorer than decoding performance of an ordinary polar code with a larger decoder (that is, a longer code length), but a decoding side of stream decoding uses a smaller decoder, which significantly reduces overheads of the decoding side. In a case of the same EsN0 and the same decoder size, decoding performance of stream decoding is better than decoding performance of the ordinary polar code.

Third group: The solid line with an asterisk, the first dashed line with the asterisk, and the second dashed line with the asterisk are decoding performance comparison of a second group. It is assumed that a quantity of information bits in an information bit sequence is K=1024, and a sending length is E=K/R=1024/(⅛)=8192. It is assumed that a size of a decoder is 4096 or 8192, and a decoding scheme is existing polar code decoding or stream decoding provided in this application. For example, the first dashed line with the square symbol indicates decoding performance when the sending length E=8192, the decoder size is 8192, the quantity of information bits is K=1024, and existing polar code decoding is used; the solid line with the asterisk indicates decoding performance when the sending length E=8192, the decoder size is 4096, the quantity of information bits is K=1024, and stream decoding is used; and the second dashed line with the asterisk indicates decoding performance when the sending length E=8192, the decoder size is 8192, the quantity of information bits is K=1024, and existing polar code decoding is used. It can be learned from the comparison of the third group that, in a case of the same EsN0, decoding performance of stream decoding is poorer than decoding performance of an ordinary polar code with a larger decoder (that is, a longer code length), but a decoding side of stream decoding uses a smaller decoder, which significantly reduces overheads of the decoding side. In a case of the same EsN0 and the same decoder size, decoding performance of stream decoding is better than decoding performance of the ordinary polar code.

To implement the functions in the methods provided in this application, the apparatus or the device provided in this application may include a hardware structure and/or a software module, and implement the foregoing functions in a form of the hardware structure, the software module, or a combination of the hardware structure and the software module. Whether a function in the foregoing functions is performed by using the hardware structure, the software module, or the combination of the hardware structure and the software module depends on particular applications and design constraints of the technical solutions. Division into modules in this application is an example, and is merely logical function division. During actual implementation, another division manner may be used. In addition, functional modules in embodiments of this application may be integrated into one processor, or may exist alone physically, or two or more modules may be integrated into one module. The integrated module may be implemented in a form of hardware, or may be implemented in a form of a software functional module.

FIG. 9 is a diagram of an apparatus according to this application. The apparatus may include a one-to-one corresponding module for performing the methods/operations/steps/actions described in the method embodiments corresponding to FIG. 3 to FIG. 7. The module may be a hardware circuit, or may be software, or may be implemented by a combination of a hardware circuit and software. For example, the apparatus may be referred to as a data processing apparatus, or may be referred to as a communication apparatus.

The apparatus includes a communication unit 901 and a processing unit 902, configured to implement the method performed by the terminal device or the network device in the foregoing embodiments.

In a possible implementation, the processing unit 902 is configured to obtain an information bit sequence, and encode the information bit sequence based on an encoding matrix G to obtain encoded data. The encoding matrix

$G = [\begin{matrix} G_{N^{'}} & O & \dots & O \\ O & G_{N^{'}} & \dots & O \\ \dots & \dots & ⋱ & \dots \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}],$

G is a matrix with a size of (m×2ⁿ)×(m×2ⁿ), m and n are positive integers, a matrix G_N′is a polar generator matrix with a size of 2ⁿ×2ⁿ, and a matrix O is an all-zero matrix with a size of 2ⁿ×2ⁿ. The communication unit 901 is configured to send the encoded data.

Optionally, the information bit sequence includes m segments, and a polar generator matrix of each segment is G_N′.

Optionally, quantities of information bits in the m segments are k₀, k₁, . . . , k_m−1, where k₀is less than k_m−1, and k₀≤k₁≤ . . . ≤k_m−1.

Optionally, a quantity of information bits in an i^thsegment is k_i, where i satisfies 0≤i≤m−1.

Optionally, the processing unit 902 is configured to obtain m pieces of buffered data, where a j^thpiece of buffered data is obtained by encoding a j^thsegment of the information bit sequence by using the matrix G_N′, and j satisfies 0≤j≤m−1; the encoded data includes m segments; a 0^thsegment of encoded data is an (m−1)^thpiece of buffered data; and an i^thsegment of encoded data is obtained by performing exclusive OR processing on the j^thpiece of buffered data and the (m−1)^thpiece of buffered data, i satisfies 1≤i≤m−1, and j satisfies 0≤j≤m−2.

Optionally, the communication unit 901 is configured to first send the (m−1)^thpiece of buffered data; and then successively send the i^thsegment of encoded data, where 1≤i≤m−1.

Optionally, the processing unit 902 is configured to perform elementary column transformation on the encoding matrix G, where a transformed encoding matrix

$G^{'} = [\begin{matrix} O & G_{N^{'}} & \dots & O \\ O & O & \dots & \dots \\ \dots & \dots & ⋱ & G_{N^{'}} \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}];$

and encode the information bit sequence based on the transformed encoding matrix G′ to obtain the encoded data.

Optionally, quantities of information bits in the m segments are k₀, k₁, . . . , k_m−1, where k₁is less than k₀, and k₁≤ . . . ≤k_m−1≤k₀.

Optionally, the encoded data includes m segments; a 0^thsegment of encoded data is obtained by encoding a 0^thsegment of the information bit sequence based on the matrix G_N′; and an i^thsegment of encoded data is obtained by encoding an i^thsegment of the information bit sequence based on the matrix G_N′and then performing exclusive OR processing on the i^thsegment and the 0^thsegment of encoded data.

For specific execution procedures of the communication unit 901 and the processing unit 902 in this implementation, refer to the descriptions in the method embodiments corresponding to FIG. 3 to FIG. 7. Details are not described herein again. In the data processing method implemented by the apparatus, a new encoding matrix G of a polar code is designed. When the terminal device encodes to-be-encoded information bits by using the encoding matrix G, after receiving a part of information bits in an encoding process, the terminal device may encode the part of information bits and send encoded data, to implement stream encoding and help reduce sizes of an encoder and a buffer in the terminal device. In addition, the to-be-encoded information bits are encoded by using the encoding matrix, to obtain the encoded data, which facilitates stream decoding.

In another possible implementation, the processing unit 902 is configured to obtain an information bit sequence, where the information bit sequence includes m segments, and process each segment by using a polar generator matrix G_N′of the segment, to obtain m pieces of buffered data, where the matrix G_N′is a polar generator matrix with a size of 2ⁿ×2ⁿ. The processing unit 902 is further configured to obtain encoded data based on the m pieces of buffered data. The encoded data includes m segments, a 0^thsegment of encoded data is an (m−1)^thpiece of buffered data, an i^thsegment of encoded data is obtained by performing exclusive OR processing on a j^thpiece of buffered data and the (m−1)^thpiece of buffered data, i satisfies 1≤i≤m−1, and j satisfies 0≤j≤m−2. The communication unit 901 is configured to send the encoded data.

Optionally, quantities of information bits in the m segments are k₀, k₁, . . . , k_m−1, where k₀is less than k_m−1, and k₀≤k₁≤ . . . ≤k_m−1.

Optionally, a quantity of information bits in an i^thsegment is k_i, where i satisfies 0≤i≤m−1.

Optionally, the processing unit 902 is configured to encode the information bit sequence based on an encoding matrix G to obtain the encoded data. The encoding matrix

$G = [\begin{matrix} G_{N^{'}} & O & \dots & O \\ O & G_{N^{'}} & \dots & O \\ \dots & \dots & ⋱ & \dots \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}],$

In another possible implementation, the processing unit 902 is configured to obtain an information bit sequence, where the information bit sequence includes m segments, and process each segment by using a polar generator matrix G_N′of the segment, to obtain encoded data. The matrix G_N′is a polar generator matrix with a size of 2ⁿ×2ⁿ, the encoded data includes m segments, a 0^thsegment of encoded data is obtained by encoding a 0^thsegment of the information bit sequence based on the matrix G_N′, and an i^thsegment of encoded data is obtained by encoding an i^thsegment of the information bit sequence based on the matrix G_N′and then performing exclusive OR processing on the i^thsegment and the 0^thsegment of encoded data. The communication unit 901 is configured to send the encoded data.

Optionally, quantities of information bits in the m segments are k₀, k₁, . . . , k_m−1, where k₁is less than k₀, and k₁≤ . . . ≤k_m−1≤k₀.

Optionally, a quantity of information bits in an i^thsegment is k_i, where i satisfies 0≤i≤m−1.

Optionally, the processing unit 902 is configured to encode the information bit sequence based on an encoding matrix G′ to obtain the encoded data. The encoding matrix

$G^{'} = [\begin{matrix} O & G_{N^{'}} & \dots & O \\ O & O & \dots & \dots \\ \dots & \dots & ⋱ & G_{N^{'}} \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}],$

For specific execution procedures of the communication unit 901 and the processing unit 902 in this implementation, refer to the descriptions in the method embodiments corresponding to FIG. 3 to FIG. 7. Details are not described herein again. In the data processing method implemented by the apparatus, the to-be-encoded information bit sequence is divided into the m segments, and encoding and information interleaving are performed on each segment by using the polar generator matrix with the size of 2ⁿ×2ⁿ. In this way, after receiving a part of information in an encoding process, the terminal device can encode and send the part of information (that is, to support stream encoding), to reduce sizes of an encoder and a buffer.

In another possible implementation, the communication unit 901 is configured to receive encoded data, and the processing unit 902 is configured to decode the encoded data to obtain decoded data. The encoded data is obtained by encoding an information bit sequence based on an encoding matrix G, the encoding matrix

$G = [\begin{matrix} G_{N^{'}} & O & \dots & O \\ O & G_{N^{'}} & \dots & O \\ \dots & \dots & ⋱ & \dots \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}],$

Optionally, the processing unit 902 is configured to obtain marked data corresponding to a 0^thsegment of encoded data and marked data corresponding to a 1^stsegment of encoded data; perform an F operation on the marked data corresponding to the 0^thsegment of encoded data and the marked data corresponding to the 1^stsegment of encoded data, to obtain marked data corresponding to the 1^stsegment of encoded data after the F operation; perform polar code decoding on the marked data corresponding to the 1^stsegment of encoded data after the F operation, to obtain decoded data corresponding to the 1^stsegment of encoded data; and then enhance, based on the marked data corresponding to the 1^stsegment of encoded data and the decoded data corresponding to the 1st segment of encoded data, the marked data corresponding to the 0^thsegment of encoded data.

Optionally, the processing unit 902 is configured to obtain marked data corresponding to a q^thsegment of encoded data, where q is 2≤q≤m−1; perform an F operation on the marked data corresponding to the q^thsegment of encoded data and enhanced marked data corresponding to the 0^thsegment of encoded data, to obtain marked data corresponding to the q^thsegment of encoded data after the F operation; perform polar code decoding on the marked data corresponding to the q^thsegment of encoded data after the F operation, to obtain decoded data corresponding to the q^thsegment of encoded data; and enhance, based on the marked data corresponding to the q^thsegment of encoded data and the decoded data corresponding to the q^thsegment of encoded data, the enhanced marked data corresponding to the 0^thsegment of encoded data.

The following describes a device including a plurality of functional units shown in FIG. 9. The device in this application includes the plurality of functional units shown in FIG. 9. FIG. 10 is a diagram of a communication device according to this application. The communication device is configured to implement the data processing methods in the foregoing method embodiments. The communication device 1000 may alternatively be a chip system. It may be understood that the communication device 1000 may be, for example, a terminal device, or may be a network device.

The communication device 1000 includes a communication interface 1001 and a processor 1002. The communication interface 1001 may be, for example, a transceiver, an interface, a bus, a circuit, or an apparatus that can implement a receiving function and a sending function. The communication interface 1001 is configured to communicate with another device through a transmission medium, so that the device 1000 may communicate with the another device. The processor 1002 is configured to perform a processing-related operation.

In a possible implementation, the processor 1002 is configured to obtain an information bit sequence, and encode the information bit sequence based on an encoding matrix G to obtain encoded data. The encoding matrix

$G = [\begin{matrix} G_{N^{'}} & O & \dots & O \\ O & G_{N^{'}} & \dots & O \\ \dots & \dots & ⋱ & \dots \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}],$

G is a matrix with a size of (m×2ⁿ)×(m×2ⁿ), m and n are positive integers, a matrix G_N′is a polar generator matrix with a size of 2ⁿ×2ⁿ, and a matrix O is an all-zero matrix with a size of 2ⁿ×2ⁿ. The communication interface 1001 is configured to send the encoded data.

For specific execution procedures of the communication interface 1001 and the processor 1002 in this implementation, refer to the descriptions in the first aspect and the method embodiments corresponding to FIG. 3 to FIG. 7. Details are not described herein again. In the data processing method implemented by the communication device, a new encoding matrix G of a polar code is designed. When the terminal device encodes to-be-encoded information bits by using the encoding matrix G, after receiving a part of information bits in an encoding process, the terminal device may encode the part of information bits and send encoded data, to implement stream encoding and help reduce sizes of an encoder and a buffer in the terminal device. In addition, the to-be-encoded information bits are encoded by using the encoding matrix, to obtain the encoded data, which facilitates stream decoding.

In another possible implementation, the processor 1002 is configured to obtain an information bit sequence, where the information bit sequence includes m segments, and process each segment by using a polar generator matrix G_N′of the segment, to obtain m pieces of buffered data, where the matrix G_N′is a polar generator matrix with a size of 2ⁿ×2ⁿ. The processor 1002 is further configured to obtain encoded data based on the m pieces of buffered data. The encoded data includes m segments, a 0^thsegment of encoded data is an (m−1)^thpiece of buffered data, an i^thsegment of encoded data is obtained by performing exclusive OR processing on a j^thpiece of buffered data and the (m−1)^thpiece of buffered data, i satisfies 1≤i≤m−1, and j satisfies 0≤j≤m−2. The communication interface 1001 is configured to send the encoded data.

For specific execution procedures of the communication interface 1001 and the processor 1002 in this implementation, refer to the descriptions in the second aspect and the method embodiments corresponding to FIG. 3 to FIG. 7. Details are not described herein again. In the data processing method implemented by the communication device, the to-be-encoded information bit sequence is divided into the m segments, encoding and information interleaving are performed on each segment by using the polar generator matrix with the size of 2ⁿ×2ⁿ, and the encoded data is sent in an interleaved manner, to facilitate stream decoding.

In another possible implementation, the processor 1002 is configured to obtain an information bit sequence, where the information bit sequence includes m segments, and process each segment by using a polar generator matrix G_N′of the segment, to obtain encoded data. The matrix G_N′is a polar generator matrix with a size of 2ⁿ×2ⁿ, the encoded data includes m segments, a 0^thsegment of encoded data is obtained by encoding a 0^thsegment of the information bit sequence based on the matrix G_N′, and an i^thsegment of encoded data is obtained by encoding an i^thsegment of the information bit sequence based on the matrix G_N′and then performing exclusive OR processing on the i^thsegment and the 0^thsegment of encoded data. The communication interface 1001 is configured to send the encoded data.

For specific execution procedures of the communication interface 1001 and the processor 1002 in this implementation, refer to the descriptions in the third aspect and the method embodiments corresponding to FIG. 3 to FIG. 7. Details are not described herein again. In the data processing method implemented by the communication device, the to-be-encoded information bit sequence is divided into the m segments, and encoding and information interleaving are performed on each segment by using the polar generator matrix with the size of 2ⁿ×2ⁿ. In this way, after receiving a part of information in an encoding process, the terminal device can encode and send the part of information (that is, to support stream encoding), to reduce sizes of an encoder and a buffer.

In another possible implementation, the communication interface 1001 is configured to receive encoded data, and the processor 1002 is configured to decode the encoded data to obtain decoded data. The encoded data is obtained by encoding an information bit sequence based on an encoding matrix G, the encoding matrix

$G = [\begin{matrix} G_{N^{'}} & O & \dots & O \\ O & G_{N^{'}} & \dots & O \\ \dots & \dots & ⋱ & \dots \\ G_{N^{'}} & G_{N^{'}} & \dots & G_{N^{'}} \end{matrix}],$

For specific execution procedures of the communication interface 1001 and the processor 1002 in this implementation, refer to the descriptions in the fourth aspect and the method embodiments corresponding to FIG. 3 to FIG. 7. Details are not described herein again. In the data processing method implemented by the communication device, decoding of a part of information may be supported after the part of information is received in a decoding process, to reduce a size of a decoder.

Optionally, the communication device 1000 may further include at least one memory 1003, configured to store program instructions and/or data. In an implementation, the memory is coupled to the processor. The coupling in this application may be an indirect coupling or a communication connection between apparatuses, units, or modules in an electrical form, a mechanical form, or another form, and is used for information exchange between the apparatuses, the units, or the modules. The processor may perform an operation in collaboration with the memory. The processor may execute the program instructions stored in the memory. The at least one memory and the processor are integrated together.

In this application, a specific connection medium between the communication interface, the processor, and the memory is not limited. For example, the memory, the processor, and the communication interface are connected through a bus. The bus 1004 is represented by a thick line in FIG. 10. A manner of a connection between other components is merely an example for description, and is not construed as a limitation. The bus may be classified into an address bus, a data bus, a control bus, and the like. For ease of representation, only one thick line is for representing the bus in FIG. 10, but this does not mean that there is only one bus or only one type of bus.

In this application, the processor may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or another programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component, and may implement or perform the methods, steps, and logical block diagrams disclosed in this application. The general-purpose processor may be a microprocessor, any conventional processor, or the like. The steps of the methods disclosed with reference to this application may be directly implemented by a hardware processor, or may be implemented by a combination of hardware and a software module in a processor.

In this application, the memory may be a non-volatile memory, for example, a hard disk drive (hard disk drive, HDD) or a solid-state drive (solid-state drive, SSD), or may be a volatile memory (volatile memory), for example, a random access memory (random access memory, RAM). The memory is any other medium that can carry or store expected program code in a form of an instruction structure or a data structure and that can be accessed by a computer, but is not limited thereto. Alternatively, the memory in this application may be a circuit or any other apparatus that can implement a storage function, and is configured to store program instructions and/or data.

This application provides a communication apparatus. The communication apparatus includes an input/output interface and a logic circuit. The input/output interface is configured to input or output data. The logic circuit processes the data according to the methods in the embodiments corresponding to FIG. 3 to FIG. 7, to obtain processed data.

This application provides a communication system. The communication system includes the terminal device and the network device in the embodiments corresponding to FIG. 3 to FIG. 7.

This application provides a computer-readable storage medium. The computer-readable storage medium stores a program or instructions. When the program or the instructions are run on a computer, the computer is enabled to perform the data processing methods in the embodiments corresponding to FIG. 3 to FIG. 7.

This application provides a computer program product. The computer program product includes instructions. When the instructions are run on a computer, the computer is enabled to perform the data processing methods in the embodiments corresponding to FIG. 3 to FIG. 7.

This application provides a chip or a chip system. The chip or the chip system includes at least one processor and an interface. The interface and the at least one processor are interconnected through a line. The at least one processor is configured to run a computer program or instructions, to perform the data processing methods in the embodiments corresponding to FIG. 3 to FIG. 7.

The interface in the chip may be an input/output interface, a pin, a circuit, or the like.

The chip system may be a system on chip (system on chip, SoC), or may be a baseband chip, or the like. The baseband chip may include a processor, a channel encoder, a digital signal processor, a modem, an interface module, and the like.

In an implementation, the chip or the chip system described above in this application further includes at least one memory, and the at least one memory stores instructions. The memory may be a storage unit inside the chip, for example, a register or a buffer, or may be a storage unit (for example, a read-only memory or a random access memory) of the chip.

All or some of the technical solutions provided in this application may be implemented by using software, hardware, firmware, or any combination thereof. When software is used to implement embodiments, all or some of embodiments may be implemented in a form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the procedure or functions according to this application are all or partially generated. The computer may be a general-purpose computer, a dedicated computer, a computer network, a network device, a terminal device, or another programmable apparatus. The computer instructions may be stored in a computer-readable storage medium, or may be transmitted from a computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from a website, computer, server, or data center to another website, computer, server, or data center in a wired (for example, a coaxial cable, an optical fiber, or a digital subscriber line (digital subscriber line, DSL)) or wireless (for example, infrared, radio, or microwave) manner. The computer-readable storage medium may be any usable medium accessible to the computer, or a data storage device, for example, a server or a data center, integrating one or more usable media. The usable medium may be a magnetic medium (for example, a floppy disk, a hard disk, or a magnetic tape), an optical medium (for example, a digital video disc (digital video disc, DVD)), a semiconductor medium, or the like.

In this application, on the premise that there is no logical conflict, embodiments may be mutually referenced. For example, methods and/or terms in the method embodiments may be mutually referenced. For example, functions and/or terms in the apparatus embodiments may be mutually referenced. For example, functions and/or terms in the apparatus embodiments and the method embodiments may be mutually referenced.

It is clear that a person skilled in the art can make various modifications and variations to this application without departing from the scope of this application. This application is intended to cover these modifications and variations of this application provided that they fall within the scope of protection defined by the following claims and their equivalent technologies.

	Number	Date	Country
Parent	PCT/CN2022/110968	Aug 2022	WO
Child	19047769		US

DATA PROCESSING METHOD, APPARATUS, AND DEVICE

Information

Publication Number

Date Filed

Date Published

Inventors

Original Assignees

CPC

International Classifications

Abstract

Description

Claims

CROSS-REFERENCE TO RELATED APPLICATIONS

Continuations (1)