Patent Grant
12131160
The present invention relates generally to data processing systems, and more specifically to a data processing system that separates complex programming algorithms into networks and computations, wherein the networks store logic in the form of relationships that is utilized to make decisions, wherein the computations are reduced to simple data processing algorithms. The core of the domain logic complexity is represented by networks which can utilize the principles of Network Science to analyze the complexity within a complex system with the ability to identify both direct and indirect dependencies within a system.
Generally, logic is abstracted to be executed on a traditional central processing unit (CPU) and an arithmetic logic unit (ALU). Within the last decade, advancements in computer programming have allowed logic to become more complex. However, such logic is costly to maintain and manage during the software development lifecycle. In addition, complex logic of current computer programming is represented in high level languages that become translated into machine language. When such logic is abstracted, the high-level language is converted into an unrecognizable form. Thus, the demand for an improved data processing system for maintaining and managing complex logic has significantly grown.
Accordingly, it is an object of the present invention to provide a data processing system that addresses the limitations discussed above.
The novel features believed characteristic of the embodiments of the present application are set forth in the appended claims. However, the embodiments themselves, as well as a preferred mode of use, and further objectives and advantages thereof, will best be understood by reference to the following detailed description when read in conjunction with the accompanying drawings, wherein:
While the system and method of use of the present application is susceptible to various modifications and alternative forms, specific embodiments thereof have been shown by way of example in the drawings and are herein described in detail. It should be understood, however, that the description herein of specific embodiments is not intended to limit the invention to the particular embodiment disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the present application as defined by the appended claims.
Illustrative embodiments of the system and method of use of the present application are provided below. It will of course be appreciated that in the development of any actual embodiment, numerous implementation-specific decisions will be made to achieve the developer's specific goals, such as compliance with system-related and business-related constraints, which will vary from one implementation to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking for those of ordinary skill in the art having the benefit of this disclosure.
The system and method of use in accordance with the present application overcomes one or more of the above-discussed problems commonly associated with conventional data processing systems. Specifically, the system of the present invention allows logic abstracted in high-level languages to be translated in the same form and be executed as networks. These and other unique features of the system and method of use are discussed below and illustrated in the accompanying drawings.
The system and method of use will be understood, both as to its structure and operation, from the accompanying drawings, taken in conjunction with the accompanying description. Several embodiments of the system are presented herein. It should be understood that various components, parts, and features of the different embodiments may be combined together and/or interchanged with one another, all of which are within the scope of the present application, even though not all variations and particular embodiments are shown in the drawings. It should also be understood that the mixing and matching of features, elements, and/or functions between various embodiments is expressly contemplated herein so that one of ordinary skill in the art would appreciate from this disclosure that the features, elements, and/or functions of one embodiment may be incorporated into another embodiment as appropriate, unless described otherwise.
The preferred embodiment herein described is not intended to be exhaustive or to limit the invention to the precise form disclosed. It is chosen and described to explain the principles of the invention and its application and practical use to enable others skilled in the art to follow its teachings.
Referring now to the drawings wherein like reference characters identify corresponding or similar elements throughout the several views,
In the contemplated embodiment, system 101 includes a central processing unit (CPU) interface unit 103, one or more relationship units (e.g., first relationship unit 105a, second relationship unit 105b, . . . nth relationship unit 105n; generally referred to as relationship unit 105), a layer unit 107, a layer router 109, and a frame controller 111. In some embodiments, system 101 also includes a relationship path unit 113 and a frame capture unit 115. It should be appreciated that more or fewer of such components may be included in different embodiments of system 101.
The CPU interface unit 103 is configured to manage the interface between a central processing unit (CPU) 117 and a relationship logic processor intellectual property (IP) 119 (i.e., CPU 117 to relationship logic processor 119 and relationship logic processor IP 119 to CPU 117). The CPU interface unit 103 triggers the start of frame processing by the frame controller 111.
The relationship unit 105 is configured to process logic from flow through a network representation which includes nodes and links, wherein logic is extracted from network path flow. A relationship unit can be assigned to one or more layers.
The layer unit 107 is configured to manage flow of logic through the relationship unit 105 which provides order in the form of the sequential processing of sets of relationship units.
The layer router 109 is configured to route the output of the relationship unit 105 to the input of the relationship unit 105 on different layers after each layer is processed.
The frame controller 111 is configured to manage the frame-to-frame processing of relationship processing for the data processing system 101. It should be noted that the frame controller 111 serves as the control unit of the relationship logic processor 119. The frame controller 111 manages the layer unit 107, the layer router 109, the relationship path unit 133, and the frame capture unit 115.
The relationship path unit 113 is configured to provide the ability to receive requests to determine the paths or relationships between a start and end point in a network. Upon determination, the relationship path unit 113 will then return a list of routes that defines all the relationships between the two end points. The relationship path unit 113 can translate the list of routes into language text that can be utilized to support such functionality as text-to-speech operations. It should be noted that the relationship path unit 113 is controlled from frame logic path analysis.
The frame capture unit 115 is configured to capture frame-to-frame analysis of paths taken through a network. It should be noted that the frame capture unit 115 is used to support the concept of debugging of logic from network flow. The frame capture unit 115 is controlled by the frame controller 111 and interfaces with the relationship path unit 113 and the layer router 109.
System 101 further includes a shared memory 121. The shared memory 121 provides the mechanism for the configuration of the relationship processor IP 119 and data exchange between the CPU 117 and the relationship logic processor IP 119. The configuration includes network and router configuration whereas the network configuration contains the definition of relationships for logic and router configurations defines the routes to flow logic paths between network layers.
It should be appreciated that system 101 can be implemented as: (1) an intellectual property (IP) for a field programmable gate array (FPGA) to be interfaced with a CPU; (2) an IP to be incorporated into a system-on-a-chip (SOC) within a hybrid FPGA and hard processor; or (3) as an application specific integrated circuit (ASIC) to be interfaced with a CPU.
It should also be appreciated that one of the unique features believed characteristic of the present application is that it provides a means for complex logic of an algorithm to be stored in the form of networks. Networks are a natural form to represent complexity and thus, complex logic can be abstracted in a single form that is the same for both programming and execution.
The results of the CPU computations within the input layer 201 are converted into discrete state which correspond to nodes 205 within the networks 203. The propagation of logic flows into layer n, 211a, layer n+1, 211b, etc., and then an output layer 213. A frame 215 of the flow of state through all defined layers (e.g., layers 201, 211, and 213) of the set of networks 203. It should be understood that logic paths are evaluated using route propagation through the networks 203.
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The particular embodiments disclosed above are illustrative only, as the embodiments may be modified and practiced in different but equivalent manners apparent to those skilled in the art having the benefit of the teachings herein. It is therefore evident that the particular embodiments disclosed above may be altered or modified, and all such variations are considered within the scope and spirit of the application. Accordingly, the protection sought herein is as set forth in the description. Although the present embodiments are shown above, they are not limited to just these embodiments, but are amenable to various changes and modifications without departing from the spirit thereof.
| Number | Name | Date | Kind |
|---|---|---|---|
| 20230410011 | Ofoche | Dec 2023 | A1 |
| Number | Date | Country | |
|---|---|---|---|
| 63425243 | Nov 2022 | US |
