Number | Date | Country | Kind |
---|---|---|---|
4-326435 | Dec 1992 | JPX |
This application is a continuation of application Ser. No. 08/162,252, filed on Dec. 7, 1993.
Number | Name | Date | Kind |
---|---|---|---|
4340932 | Bakula et al. | Jul 1982 | |
5111389 | McAuliffe et al. | May 1992 | |
5179674 | Williams et al. | Jan 1993 | |
5247645 | Mirza et al. | Sep 1993 | |
5278963 | Hattersley et al. | Jan 1994 | |
5388235 | Ikenaga et al. | Feb 1995 | |
5437043 | Fujii et al. | Jul 1995 | |
5438669 | Nakazawa et al. | Aug 1995 |
Number | Date | Country |
---|---|---|
0476722 | Mar 1992 | EPX |
0543366 | May 1993 | EPX |
166649 | Oct 1982 | JPX |
Entry |
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Hennessy et al.; "Computer Architecture: A Quantitative Approach"; pp. 450-454 (1990). |
Rau et al. ; "Register Allocation for Software Pipeland Loops"; pp. 283-299 (1992). |
Tirumalai et al; "Parallelization of Loops with Exits On Pipelined Architectures" (1990). |
Proceedings Supercomputing '92, "Pseudo Vector Processor Based on Register-Windowed Superscaler Pipeline", N. Kisaburo, et al., Minneapolis, Minnesota, Nov. 16-20, 1992, IEEE Computer Society Press. |
Number | Date | Country | |
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Parent | 162252 | Dec 1993 |