Patent Application
20110093651
This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2009-242660, filed Oct. 21, 2009; the entire contents of which are incorporated herein by reference.
Embodiments described herein relate generally to a technique of controlling allocation of a storage region, which is suitable for, for example, hybrid hard disk drives (HDDs) including a nonvolatile semiconductor memory.
In recent years, various types of personal computers such as notebook computers and desk-top computers have been widely used. Personal computers of these types are generally equipped with an HDD as an external storage device serving as a boot disk.
To improve response performance of such HDDs, so-called hybrid HDDs including a nonvolatile semiconductor memory have been developed (for example, see Jpn. Pat. Appln. KOKAI Pub. No. 6-314177).
Current hybrid HDDs are broadly classified into the following two types: (1) hybrid HDDs which allocate a nonvolatile semiconductor memory to part of a logical address space (which is expected to be frequently accessed) and use it as a storage area for substantial data; and (2) hybrid HDDs which use a nonvolatile semiconductor memory as nonvolatile cache area for the HDDs.
However, hybrid HDDs of type 1 cannot achieve improvement in access to logical address spaces to which the HDDs are allocated, and hybrid HDDs of type 2 cannot connect increase in capacity of nonvolatile semiconductor memories, which have been achieved by virtue of recent reduction in cost, to increase in capacity of the hybrid HDDs.
A general architecture that implements the various feature of the embodiments will now be described with reference to the drawings. The drawings and the associated descriptions are provided to illustrate the embodiments and not to limit the scope of the invention.
Various embodiments will be described hereinafter with reference to the accompanying drawings.
In general, according to one embodiment, a data storage apparatus includes a first nonvolatile storage, a second nonvolatile storage and a controller. The controller is configured to control data writing and data reading for the first and second nonvolatile storage. The controller includes an allocation control module. The allocation control module is configured to allocate part of a storage area of the first nonvolatile storage to a logical address space and to allocate part or all of a storage area of the second nonvolatile storage to the logical address space in order to use the part of the storage area of the first nonvolatile storage allocated to the logical address space as storage area of substantial data, and to use part or whole of a remaining part of the storage area of the first nonvolatile storage not allocated to the logical address space as nonvolatile cache for the second nonvolatile storage.
As illustrated in
The controller 11 is a microprocessor for controlling operation in the hybrid HDD 1. The control module 11 includes an allocation control module 111 and a wear leveling control module 112. The ATAC 12 is a controller which connects the hybrid HDD 1 with a host apparatus, which write data in, and read data out of, the hybrid HDD 1, by an AT attachment (ATA) interface.
The nonvolatile semiconductor memory 13 is, for example, a dynamic RAM (DRAM [random access memory]), which temporarily stores write data transmitted from the host apparatus and read data to be transmitted to the host apparatus, while the hybrid HDD 1 is in a power-on state.
In contrast, the nonvolatile semiconductor memory 14 is, for example, a NAND flash memory, which can maintain stored data even while the hybrid HDD 1 is in a power-off state. In addition, the storage portion 16 is an HDD which is formed of, for example, a magnetic head and a magnetic disk, and can maintain stored data even while the hybrid HDD 1 is in a power-off state. The HDC 15 is a controller which drives and controls the magnetic head and the magnetic disk of the storage portion 16.
The hybrid HDD 1 achieves efficient use of a storage area, while response performance thereof is improved, by controlling allocation of the nonvolatile semiconductor memory 14 and the storage portion 16 to the logical address space of the hybrid HDD 1, which is recognized by the host apparatus. This point will now be detailed below.
In this embodiment, suppose that the nonvolatile semiconductor memory 14 includes a storage capacity of 32 GB, and the storage portion 16 includes a storage capacity of 120 GB. In addition, the hybrid HDD 1 of the embodiment provides the host apparatus with a storage capacity of 146 GB (which is larger than 120 GB of the storage portion 16, and smaller than 152 GB being the sum of the capacities of the nonvolatile semiconductor memory 14 and the storage portion 16). Specifically, the hybrid HDD 1 makes itself appear to the host apparatus to include a storage capacity of 146 GB. Therefore, the host apparatus executes writing of data and reading of data in and from a logical block address (LBA) space of 146 GB having addresses from 0000—0000h to 1100—4E6Fh. The hybrid HDD 1 converts a logical address designated by the host apparatus into a physical address, and executes access to the nonvolatile semiconductor memory 14 or the storage portion 16.
Therefore, the allocation control module 111 of the control module 11 allocates, for example, 26 GB in a storage capacity of 32 GB, which the nonvolatile semiconductor memory 14 includes, to 0000—0000h to 0306_DC41h, that is, the first half part (26 GB from the head address) of the logical address space. In addition, the allocation control module 111 allocates 120 GB of the storage portion 16 to 0306_DC42h to 1100—4E6Fh, that is, the second half part of the logical address space following the first half part.
In addition, among the remaining 6 GB not allocated to the logical address space in the storage capacity of 32 GB of the nonvolatile semiconductor memory 14, the allocation control module 111 of the control module 11 manages 4 GB to use it as a nonvolatile cache (NVC), and manages 2 GB to use it as a management data storage portion for storing various management data such as a cluster table relating logical addresses to physical addresses.
Specifically, in the hybrid HDD 1, part of the nonvolatile semiconductor memory 14 is used as a solid-state drive (SSD), and another part of the nonvolatile semiconductor memory 14 is used as a nonvolatile cache of the storage portion 16. The cache method used when the nonvolatile semiconductor memory 14 is used as a nonvolatile cache of the storage portion 16 is not specifically provided in this embodiment.
Thereby, the hybrid HDD 1 achieves the following points simultaneously: (1) improvement in response performance of access to the logical address space to which the storage portion 16 is allocated; and (2) connection of increase in capacity of the nonvolatile semiconductor memory 14 to increase in capacity of the hybrid HDD 1.
To simplify the explanation,
In addition, although
In the example shown in
In addition, although this embodiment shows an example in which 26 GB among 32 GB of the nonvolatile semiconductor memory 14 is used as SSD, 4 GB is used as an NVC, and 2 GB is used as management data storage portion, the allocation control module 11 of the control module 11 includes a function of setting allocation of 32 GB of the nonvolatile semiconductor memory 14, based on a command such as a host protected area (HPA) feature set specified by the ATA, when such a command is received by the ATAC 12. Specifically, it is possible to designate the capacity of the SSD and the capacity of the NVC in the hybrid HDD 1 from the host apparatus.
On the other hand, the wear leveling control module 112 executes wear leveling processing for the nonvolatile semiconductor memory 14, to level the numbers of erases of the storage area in the nonvolatile semiconductor memory 14. In this processing, the wear leveling control module 112 does not level the number of erases of the storage area for each of the three uses, but executes wear leveling processing for the whole nonvolatile semiconductor memory 14.
More specifically, for example, since update of data stored in the NAND flash memory is executed by nullification of the old data and new writing of updated data, compaction is performed, in which effective data in two blocks occupied by nullified data at a considerably increased rate is rearranged in one block. Therefore, a block which has become empty by the compaction is positioned at the last of a waiting queue to be used when a new empty block is required for any of the three uses, regardless of which of the three uses the block was used for. Thereby, wear leveling processing for the whole nonvolatile semiconductor memory 14 is executed.
In the wear leveling processing by the wear leveling control module 112 of the control module 11 in the hybrid HDD 1, it is important to execute wear leveling processing for the whole nonvolatile semiconductor memory 14, and any method other than the above method can be adopted as method of the wear leveling processing.
As illustrated in
In comparison with this, a hybrid HDD 1 according to the modification illustrated in
Also according to the structure illustrated in
As described above, according to the hybrid HDD 1 of the embodiment, response performance is improved, and allocation control for effective use of storage areas is achieved.
The various modules of the systems described herein can be implemented as software applications, hardware and/or software modules, or components on one or more computers, such as servers. While the various modules are illustrated separately, they may share some or all of the same underlying logic or code.
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2009-242660 | Oct 2009 | JP | national |
