This application is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2012-018760, filed Jan. 31, 2012, the entire contents of which are incorporated herein by reference.
Embodiments described herein relate generally to a data storage control apparatus, a data storage apparatus and a data storage method.
In any data storage apparatus such as a hard disk drive (referred to as a disk drive in some cases hereinafter), the data transferred, in units of sectors, from a host is temporarily stored in a buffer memory and then transferred from the buffer memory to a disk that is a nonvolatile recording medium.
In recent years, disk drives have been developed, which use sector size larger (e.g., 4 K bytes each) than the sector size hitherto used (e.g., 512 bytes each), thereby to increase the storage capacity of the disk. More specifically, the error correction code (ECC) data added to each sector can be reduced to increase the user-data storage area. For convenience, the sector of the conventional sector size will be called a sub-sector (or short sector), and the sector of large sector size will be called a long sector.
In any disk drive of the long sector (or media sector) type, data of a long sector format is written to the disk. A disk drive of the long sector type is called a native 4K type if a host uses long sector format. If a host uses short sector format, however, the disk drive of the long sector type is called an emulation mode type and is distinguished from the first-mentioned long sector type.
To the disk drive of the emulation mode type, the host transfers data in sub-sector units (in short sector format) as hitherto been practiced. As a result, sub-sector data (i.e., partial sector data), smaller than long-sector data, increases in the buffer memory.
Therefore, the sector format must be changed in the buffer of the disk drive. That is, a sub-sector process is performed, changing the data to data in the long sector format and then transferring the data to the disk. More precisely, data in units of long sectors must be read from the disk and replaced by the data stored in the buffer memory in units of sub-sectors, and the data in units of sub-sectors must be written to the disk. This process is known as a read-modify-write (RMW) process.
In any disk drive of the long sector type (media sector type) in emulation mode, the RMW process is performed to change the sector format. To enhance the operating efficiency of the disk drive, the RMW process is better performed in, for example, the idling period when read/write commands are not executed at all. If the power supply is cut in the idling period, however, the data stored in the buffer memory in units of sub-sectors will be erased before it is written to the disk.
In general, according to one embodiment, a data storage control apparatus includes an interface module and a controller. The interface module receives first data, in specific units, from a host and stores the data in a buffer memory. The controller generates second data from the first data stored in the buffer memory, and performs a control to write the second data to a nonvolatile storage medium. The controller generates the second data of a second format having the same size as the first format of the data stored in an ordinary recording area provided at the nonvolatile storage medium, and including a plurality of units of the first data and invalid data. The controller further performs a control to write the second data in a save area provided on the nonvolatile storage medium.
An embodiment will be described hereinafter with reference to the accompanying drawings.
As
The controller 11 includes a read/write circuit 12, a hard disk controller (HDC) 13, and a microprocessor (MPU) 14. The read/write (R/W) circuit 12 is also known as a read/write channel, and reads data from, and writes data to, the storage medium (disk) 10, under the control of the HDC 13. The MPU 14 cooperates with the HDC 13 to control the other components of the disk drive 1. More specifically, the MPU 14 performs servo control, executes read/write commands and performs an entry process with respect to a table (described later).
The HDC 13 includes a read/write (R/W) controller 15, a host interface module 16, and a data transfer controller 17. The R/W controller 15 generates sector pulses from the sector pulse control data stored in the memory 18. Further, the R/W controller 15 supplies a read/write gate to the R/W circuit 12, causing the R/W circuit 12 to read or write data. The host interface module 16 performs a transfer control, whereby data or commands transferred from a host 20 are received or the data read from the buffer memory 180 is transmitted to the host 20. Note that the host 20 is an interface module of, for example, the Serial ATA (SATA) standard which is included in a personal computer.
The data transfer controller 17 comprises hardware such as logic gates, and controls the data transfer between the buffer memory 180 and the R/W circuit 12. In this embodiment, the data transfer controller 17 first combines the data stored in the respective sub-sectors of the buffer memory 180 before subjecting the data to an RMW process, and then performs a process of converting the data to data of long sector format.
As shown in
The disk 10 is rotated by a spindle motor 8 (in the direction indicated by arrow 130). On the disk 10, tracks 100 are provided, each is composed of a plurality of sectors, and servo data 110 is recorded.
How the data transfer is controlled in this embodiment will be explained with reference to
In
As a result, the buffer memory 180 stores not only long sector data, but also stores sub-sector data, i.e., partial data not as large as the long sector data (i.e., media sector data). That is, each of the data at the logic block addresses LBA (N−1), LBA (N+3) and LBA (N+4) lacks a part of the long sector (of, for example, 8-sub-sector size). By contrast, the data at the logic block addresses LBA (N), LBA (N+1) and LBA (N+2) have the long sector size.
The data transfer controller 17 reads the long sector data at the logic block addresses LBA (N), LBA (N+1) and LBA (N+2) from the buffer memory 180 and transfer them via the R/W circuit 12 to the disk 10. The long sector data are thus written (over-written) in the ordinary recording area 400 that is provided on the disk 10, as is shown in
On the other hand, the data at the logic block addresses LBA (N−1), LBA (N+3) and LBA (N+4) cannot be written in the ordinary recording area 400 provided on the disk 10, if they stay partial data in format. In order change the data in format, the RMW process is performed on the data as described above. The RMW process is better performed in the idling period of the disk drive 1. If the power supply to the disk drive 1 is cut in the idling period, however, the data stored in the buffer memory 180 will be lost before it has been written to the disk 10.
Hence, before the RMW process is performed, the data transfer controller 17 perform a control, first converting every sub-sector data stored in the buffer memory 180 to data of the long sector format and then recording (saving) this data temporarily in the save areas 410 provided on the disk 10. As shown in
The data transfer controller 17 uses such a table as shown in
The buffer address (Address) represents the head address of a subsector to be transferred. The sub-sector
ID flag (GAP) is a flag that identifies the sub-sector data existing in the buffer memory 180. This flag is provided, because a sub-sector may exist outside the buffer memory 180 for a partial long sector, if any. The sub-sector ID flag (GAP) is used to update the seed value of the CRC code that should be added to a subsector, as will be described later.
The last transfer ID flag (END) is a flag that identifies the last sub-sector data to be transferred to a save area. This flag (END) is set in the entry containing the sub-sector valid for the last transfer, and is used to designate the position at which to insert invalid data, which will be described later. The additional LBA value (Skip LBA) represents LBAs added in the save areas before data is transferred to the save areas. The additional LBA value (Skip LBA) is used to write partial sub-sectors, all at one time. That is, the additional LBA value (Skip LBA) is added to the present LBA value, enabling the disk drive 1 to keep operating. The number of sectors (Num) represents the number of continuous sub-sectors stored in the buffer memory 180, which can be handed with one entry. That is, the number of sectors (Num) is the continuous sub-sectors per GAP, i.e., Num/GAP. The smallest number of sub-sectors the one entry can handle is one, and the largest number of sub-sectors the one entry can handle is one less than the number of sub-sectors in a long sector.
How the data transfer from the buffer memory 180 to a save area 410 of the disk 10 will be explained with reference to
To start the data transfer, the data transfer controller 17 refers to the table of
As shown in
The data transfer controller 17 determines whether the LBA value (Skip LBA) added to the present LBA value is 0 or not (Block 201). If the addition LBA value (Skip LBA) is 0, the data transfer controller 17 determines, from the sub-sector ID flag (GAP), whether sub-sectors exist in the buffer memory 180 (GAP=0) or not (GAP=1) (Block 202). If the addition LBA value (Skip LBA) is not 0, partial sub-sectors are spaced apart as in the LBA (N+3) shown in
If the sub-sector ID flag (GAP) is 1 (GAP=1), no sub-sectors exist in the buffer memory 180. In this case, the data transfer controller 17 adds the sub-sector number (Num=1) to the seed value for the CRC data (Block 208, if NO in Block 202). The number added is a blank part that is indicated as a buffer address (Address=*) for the LBA (N−1) shown in
Next, the data transfer controller 17 reads the items of the second entry (#1) shown in
As transmitting sub-sectors, the data transfer controller 17 generates CRC data 310 for each sub-sector. If the sub-sector ID flag (GAP) is 1 (GAP=1), continuous sub-sectors (A and B) do not exist in the buffer memory 180. In this case, the seed value of the CRC data to be added is updated (Block 208). That is, partial sub-sectors (C and D) are spaced apart as in the LBA (N+3) shown in
The data transfer controller 17 then determines whether the sub-sectors have been transferred (Block 204). If the sub-sectors are found transferred, the data transfer controller 17 calculates the size of invalid data (PAD) 320 required for constituting a long sector format (Block 205, if YES in Block 204). The data transfer controller 17 inserts invalid data (PAD) 320 of the size calculated as shown in
The data transfer controller 17 repeats the process of transferring sub-sector data for remaining entries #2 to #6. When the last transfer ID flag (END) is detected, the data transfer controller 17 determines that the data transfer from the buffer memory 180 to the save area 410 is complete (Block 209).
Thus, the CRC data 310 can be added to any one of the sub-sector data units 300 existing as partial data in the buffer memory 180. Moreover, sub-sector data of the format including invalid data (PAD) 320 can be transferred to (saved in) the save area 410 provided on the disk 10. In other words, data stored in the buffer memory, in units of sub-sectors, can be reliably saved before the RMW process is performed. The sector format written in the data saving area 410 has the same size as the long sector format (see
The data of the long sector format remain saved in the save area 410 until the HDC 13 performs the RMW process. This greatly reduces the possibility that the sub-sector data stored in the buffer memory 180 is lost before being written to the disk 10, because the power supply to the disk drive 1, for example, is cut before the sub-sector data is written to the disk 10. The HDC 13 performs the RMW process during the idling period of the disk drive 1, first reading data of the long sector format from the save area 410 into the buffer memory 180, then merging this data with the data stored in the ordinary reads, and finally writing the merged data to the disk 10.
In this embodiment, the sector format in which data is transferred to the save area 410 has the same size as the ordinary long sector format. Therefore, the save area 410 can be provided in each track or in each zone as shown in
If the save areas differ in format from the ordinary sectors, the R/W controller 15 needs to perform a transfer switching process, thereby to change various parameters set in a register, such as sector pulse. In this embodiment, the save areas have the same format as the ordinary sectors, and the /W controller 15 need not perform a transfer switching process. This can decrease the overhead of the R/W controller 15.
In this embodiment, CRC data 310 is added to each sub-sector in the sector format transferred to any save area 410. If the invalid data (PAD) 320, for example, has a defective part, the long sector holding the invalid data (PAD) 320 will become a read-error sector 900. In this embodiment, such a read-error in any sub-sector can be detected from the CRC data 310. Hence, normal data reading can be completed by performing an error correction process on every sub-sector 910.
The host interface module 16 adds CRC data to any data transferred from the host 20, and the data now including the CRC data is stored in the buffer memory 180. Before each sub-sector data read from the buffer memory 180 is written in a save area 410, new CRC data may be added to the sub-sector data or the CRC data added to the sub-sector data by the host interface module 16 may be changed.
Moreover, the entries in the tables of
To be more specific, the data read from any save area 410 is stored in units of sectors, the buffer memory 180, spacing the data units for the respective table entries, by GAP 920, as shown in
Therefore, the data recorded in any save area 410 can be merged with the data recorded in any ordinary area 400 in the buffer memory 180, by using the tables of
In this embodiment, the RMW process is performed in the buffer memory 180 that is a DRAM. Nonetheless, the RMW process may be performed in the SRAM included in the memory 18.
The data storage apparatus 1 according to this embodiment is not limited to a disk drive. Rather, it may be a solid-state drive (SSD) having flash memories used as a nonvolatile storage medium 10.
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
Number | Date | Country | Kind |
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2012-018760 | Jan 2012 | JP | national |