Data storage device employing a phase offset to generate power from a spindle motor during a power failure

Information

  • Patent Grant
  • 9343102
  • Patent Number
    9,343,102
  • Date Filed
    Wednesday, March 25, 2015
    9 years ago
  • Date Issued
    Tuesday, May 17, 2016
    8 years ago
Abstract
A data storage device is disclosed comprising a disk, a spindle motor configured to rotate the disk, wherein the spindle motor comprises a plurality of windings, and a head actuated over the disk. The windings are commutated based on a commutation sequence while applying a periodic driving voltage to each winding, wherein the periodic driving voltage comprises an operating amplitude during normal operation. When a supply voltage falls below a threshold, the spindle motor is configured into a power generator by at least adjusting a phase of the periodic driving voltage by a phase offset and adjusting the amplitude of the periodic driving voltage based on the phase offset.
Description
BACKGROUND

Data storage devices such as disk drives comprise a disk and a head connected to a distal end of an actuator arm which is rotated about a pivot by a voice coil motor (VCM) to position the head radially over the disk. The disk comprises a plurality of radially spaced, concentric tracks for recording user data sectors and servo sectors. The servo sectors comprise head positioning information (e.g., a track address) which is read by the head and processed by a servo control system to control the actuator arm as it seeks from track to track.



FIG. 1 shows a prior art disk format 2 as comprising a number of servo tracks 4 defined by servo sectors 60-6N recorded around the circumference of each servo track. Each servo sector 6i comprises a preamble 8 for storing a periodic pattern, which allows proper gain adjustment and timing synchronization of the read signal, and a sync mark 10 for storing a special pattern used to symbol synchronize to a servo data field 12. The servo data field 12 stores coarse head positioning information, such as a servo track address, used to position the head over a target data track during a seek operation. Each servo sector 6i further comprises groups of servo bursts 14 (e.g., N and Q servo bursts), which are recorded with a predetermined phase relative to one another and relative to the servo track centerlines. The phase based servo bursts 14 provide fine head position information used for centerline tracking while accessing a data track during write/read operations. A position error signal (PES) is generated by reading the servo bursts 14, wherein the PES represents a measured position of the head relative to a centerline of a target servo track. A servo controller processes the PES to generate a control signal applied to a head actuator (e.g., a voice coil motor) in order to actuate the head radially over the disk in a direction that reduces the PES.


The disk 2 is typically rotated by a spindle motor at a high speed so that an air bearing forms between the head and the disk surface. A commutation controller applies a driving signal to the windings of the spindle motor using a particular commutation sequence in order to generate a rotating magnetic field that causes the spindle motor to rotate. Prior art disk drives have typically controlled the commutation of the windings by measuring a zero-crossing frequency of a back electromotive force (BEMF) voltage generated by the windings of the spindle motor. Prior art disk drives may also utilize the BEMF voltage generated by the spindle motor as a power source during power failure to assist with power down operations, such as unloading the head onto a ramp.





BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 shows a prior art disk format comprising servo tracks defined by servo sectors.



FIG. 2A shows a data storage device in the form of a disk drive according to an embodiment comprising a head actuated over a disk rotated by a spindle motor.



FIG. 2B is a flow diagram according to an embodiment wherein when a supply voltage falls below a threshold the spindle motor is configured into a power generator by adjusting a phase of a periodic driving voltage by a phase offset and by adjusting an amplitude of the periodic driving voltage based on the phase offset.



FIG. 3 shows control circuitry according to an embodiment comprising a plurality of switches for driving the windings of the spindle motor based on a commutation sequence.



FIG. 4A is a flow diagram according to an embodiment wherein a digital-to-analog converter (DAC) value (scalar) is configured based on the phase offset, and the amplitude of the periodic driving voltage is configured based on the DAC value.



FIG. 4B shows a number of efficiency versus power generation curves for a plurality of different phase offset values according to an embodiment.



FIG. 5 is a flow diagram according to an embodiment wherein when the supply voltage falls to a minimum value, a load of the disk drive is reduced such as by reducing a power consumed by a voice coil motor configured to actuate the head radially over the disk.





DETAILED DESCRIPTION


FIG. 2A shows a data storage device in the form of a disk drive according to an embodiment comprising a disk 16, a spindle motor 18 configured to rotate the disk 16, wherein the spindle motor 18 comprises a plurality of windings, and a head 20 actuated over the disk. The windings are commutated based on a commutation sequence while applying a periodic driving voltage 21 to each winding, wherein the periodic driving voltage comprises an operating amplitude during normal operation. The disk drive further comprises control circuitry 22 powered by a supply voltage and configured to execute the flow diagram of FIG. 2B, wherein when the supply voltage falls below a threshold (block 24), the spindle motor is configured into a power generator by at least adjusting a phase of the periodic driving voltage by a phase offset (block 26) and adjusting the amplitude of the periodic driving voltage based on the phase offset (block 28).


In the embodiment of FIG. 2A, the disk 16 comprises a plurality of servo sectors 300-30N that define a plurality of servo tracks 32, wherein data tracks are defined relative to the servo tracks at the same or different radial density. The control circuitry 22 processes a read signal 34 emanating from the head 20 to demodulate the servo sectors 300-30N and generate a position error signal (PES) representing an error between the actual position of the head and a target position relative to a target track. A servo control system in the control circuitry 22 filters the PES using a suitable compensation filter to generate a control signal 36 applied to a voice coil motor (VCM) 38 which rotates an actuator arm 40 about a pivot in order to actuate the head 20 radially over the disk 16 in a direction that reduces the PES. The servo sectors 300-30N may comprise any suitable head position information, such as a track address for coarse positioning and servo bursts for fine positioning. The servo bursts may comprise any suitable pattern, such as an amplitude based servo pattern or a phase based servo pattern (FIG. 1).



FIG. 3 shows control circuitry 22 according to an embodiment wherein a back electromotive force (BEMF) voltage 42 generated by the windings of the spindle motor 18 may be processed in order to drive the commutation sequence of a commutation controller 44. A spindle control block 46 may process a BEMF signal 48 which may be a square wave representing the BEMF zero-crossings as detected by a BEMF detector 50. The commutation controller 44 may generate a control signal 52 which configures the BEMF detector 50 to detect the zero-crossing of the BEMF voltage generated by each winding as the disk rotates. The commutation controller 44 also generates a control signal 54 applied to commutation logic 56. In the embodiment of FIG. 3, the commutation logic 56 is configured by the control signal 54 to control the state of switches 58 in order to drive the windings with driving voltages +V and −V. The commutation logic 44 may operate in any suitable manner, such as by driving the switches 58 as linear amplifiers that apply continuous-time sinusoidal voltages to the windings. In another embodiment, the commutation logic 56 may drive the switches 58 using pulse width modulation (PWM), such as using square wave PWM, trapezoidal PWM, or sinusoidal PWM. Regardless as to how the windings are driven, the commutation controller 44 generates the control signal 54 so that the windings are commutated at the correct periods, thereby generating the desired rotating magnetic field that causes the spindle motor to rotate. In one embodiment, the spindle control block 46 may generate a control signal 60 that controls the effective amplitude of the periodic driving voltage applied to the windings (continuous or PWM), thereby controlling the speed of the spindle motor 18.


If a power failure occurs while the disk 16 is spinning, there is residual kinetic energy as the disk 16 continues to rotate the spindle motor 18, and therefore the spindle motor 18 can be converted into a power generator used to power the control circuitry 22 while executing power down operations, such as completing a current write operation to the disk 16 before unloading the head 20 onto a ramp. In one embodiment, the spindle motor 18 may generate power by sourcing current to the supply voltage Vpwr 62 when the supply voltage Vpwr 62 falls below a threshold (e.g., due to a power failure or other power transient event).



FIG. 4A is a flow diagram according to an embodiment wherein the periodic driving voltage Vd for driving the windings of the spindle motor is generated (block 64) while rotating the disk during normal operation based on:

Vd=|Vd|sin(ωecyct+φphaseT)

where |Vd| represents the amplitude of the periodic driving voltage, ωecyc represents the rotation frequency (in electrical cycles), φphase represents a phase offset that corresponds to the phase of the winding, and φT represents a phase offset that applies an accelerating force to the spindle motor. When the supply voltage Vpwr 62 falls below the threshold at block 66 (e.g., during a power failure), the periodic driving voltage Vd is generated (block 68) based on:

Vd=|Vd|sin(ωecyct+φphasePO)

where φPO represents a phase offset that operates to brake the spindle motor. The amplitude |Vd| of the periodic driving voltage is also reduced based on the phase offset φPO which causes the windings of the spindle motor to source current to the supply voltage Vpwr 62. In the embodiment of FIG. 4A, the amplitude of the periodic driving voltage |Vd| is configured based on a digital-to-analog converter (DAC) value. For example, the amplitude of the periodic driving voltage |Vd| may be configured (block 72) based on:

C2·Vpwr·DAC %

where C2 represents a scalar and DAC % represents the DAC value (a scalar) as a percentage of a DAC range (from 0 to 100%). In one embodiment, the spindle motor 18 comprises a three phase spindle motor such that the scalar C2 in the above equation may be 1/√{square root over (3)}. In one embodiment, the DAC value in the above equation is configured (block 70) so as to substantially maximize the power generated by the spindle motor 18 relative to the selected phase offset φPO under a worst case load condition during the power failure event. To satisfy this condition, in one embodiment the DAC value is configured based on:






C






1
·



Vbo


Vpwr_min




(


cos






ϕ
PO


-



L






ω
ecyco


R


sin






ϕ
PO



)





where C1 represents a scalar, |Vbo| represents an amplitude of a sinusoidal back electromotive force (BEMF) voltage generated by one of the windings, L represents an inductance of the winding, ωecyco represents a frequency of the sinusoidal BEMF voltage generated by the winding, R represents a resistance of the winding, and Vpwr_min represents a minimum amplitude of the supply voltage. In one embodiment, the spindle motor 18 comprises a three phase spindle motor such that the scalar C1 in the above equation may be √{square root over (3)}/2.



FIG. 4B shows a number of efficiency versus power generation curves for a plurality of different phase offset values. In this embodiment, as the phase offset increases the peak power generated by the spindle motor 18 increases, whereas the efficiency of the power generation decreases. Any suitable phase offset may be selected to achieve a desired balance between peak power and efficiency. For a selected phase offset (e.g., φPO=−5 degrees), when the load powered by the supply voltage Vpwr is minimum, the supply voltage Vpwr will reach a maximum Vpwr_max. As the load increases, the supply voltage Vpwr will decrease so that the spindle motor sources more current (provides more power). When the load increases to a worst case condition, the supply voltage Vpwr will reach the above described minimum Vpwr_min wherein the spindle motor 18 generates the maximum power. Any suitable value may be selected for the minimum Vpwr_min, wherein in one embodiment the value is selected based on the worst case load condition of the disk drive during the power failure event (i.e., the maximum voltage needed to safely perform the power fail operations such as parking the head).



FIG. 5 is a flow diagram which extends on the flow diagram of FIG. 4B, wherein in this embodiment, the amplitude of the supply voltage Vpwr 62 is monitored during the power failure event, and if the amplitude substantially equals the minimum Vpwr_min (block 74), the load from the disk drive is decreased (block 76). For example, in one embodiment Vpwr_min is selected based on a peak power needed to park the head (e.g., on a ramp) under worst case conditions. If the supply voltage Vpwr falls to Vpwr_min, the load may be decreased in one embodiment by reducing the power consumed when parking the head. For example, the power consumed when parking the head may be reduced by reducing a power consumed by the VCM 38 in FIG. 2A (e.g., by reducing the driving current and therefore the speed of the park operation). In this embodiment, reducing the load from the disk drive causes the supply voltage Vpwr to rise and remain above Vpwr_min as illustrated in FIG. 4B. In one embodiment, when the load on the disk drive decreases causing the supply voltage Vpwr to rise significantly above Vpwr_min, the control circuitry may reconfigure the load such as by increasing the amount of power consumed by the VCM 38 (e.g., by increasing the driving current to increase the speed of the park operation).


The following is a derivation of the above embodiment for selecting the DAC value (for a three phase spindle motor) that results in the maximum power being generated by the spindle motor 18 when the supply voltage Vpwr reaches the minimum value Vpwr_min under the worst case load condition. The phasor model of the spindle motor:

|Vd|=|Vb|e−jφPO+(R+jLωeyc)I






I
=






V
d



-




V
b








-
j








ϕ





PO






R
+

j





L






ω
eyc




=



(




V
d



-




V
b








-
j







ϕ
PO





)



(

R
-

j





L






ω
eyc



)




R
2

+


L
2



ω
eyc
2










The power generated by the spindle motor:










P
gen

=





-

3
2



Re


{



V
d

_


I

}


=


-

3
2






V
d




Re


{
I
}










Re


{
I
}


=








V
d




R

-




V
b





(


R





cos






ϕ
PO


-

L






ω
eyc


sin






ϕ
PO



)





R
2

+


L
2



ω
eyc
2











P
gen

=




-

3
2










V
d



2


R

-




V
d







V
b





(


R





cos






ϕ
PO


-

L






ω
eyc


sin






ϕ
PO



)





R
2

+


L
2



ω
eyc
2













To maximize the power generated when Vpwr reaches the minimum value Vpwr_min:










P
gen




DAC


=
0








2









V
d



*


R

-




V
b





(


R





cos






ϕ
PO


-

L






ω
eyc


sin






ϕ
PO



)



=
0










V
d



*

=





V
b





(


R





cos






ϕ
PO


-

L






ω
eyc


sin






ϕ
PO



)



2





R









DAC






%
*


=



3

2






V

b





0




Vpwr_min



(


cos






ϕ
PO


-



L






ω

ecyc





0



R


sin






ϕ
PO



)












z



P
gen





DAC
2



=




-

3




V
pwr


R

<
0

:

Maximum





Power





Generated






Any suitable control circuitry may be employed to implement the flow diagrams in the above embodiments, such as any suitable integrated circuit or circuits. For example, the control circuitry may be implemented within a read channel integrated circuit, or in a component separate from the read channel, such as a disk controller, or certain operations described above may be performed by a read channel and others by a disk controller. In one embodiment, the read channel and disk controller are implemented as separate integrated circuits, and in an alternative embodiment they are fabricated into a single integrated circuit or system on a chip (SOC). In addition, the control circuitry may include a suitable preamp circuit implemented as a separate integrated circuit, integrated into the read channel or disk controller circuit, or integrated into a SOC.


In one embodiment, the control circuitry comprises a microprocessor executing instructions, the instructions being operable to cause the microprocessor to perform the flow diagrams described herein. The instructions may be stored in any computer-readable medium. In one embodiment, they may be stored on a non-volatile semiconductor memory external to the microprocessor, or integrated with the microprocessor in a SOC. In another embodiment, the instructions are stored on the disk and read into a volatile semiconductor memory when the disk drive is powered on. In yet another embodiment, the control circuitry comprises suitable logic circuitry, such as state machine circuitry.


In various embodiments, a disk drive may include a magnetic disk drive, an optical disk drive, etc. In addition, while the above examples concern a disk drive, the various embodiments are not limited to a disk drive and can be applied to other data storage devices and systems, such as magnetic tape drives, solid state drives, hybrid drives, etc. In addition, some embodiments may include electronic devices such as computing devices, data server devices, media content storage devices, etc. that comprise the storage media and/or control circuitry as described above.


The various features and processes described above may be used independently of one another, or may be combined in various ways. All possible combinations and subcombinations are intended to fall within the scope of this disclosure. In addition, certain method, event or process blocks may be omitted in some implementations. The methods and processes described herein are also not limited to any particular sequence, and the blocks or states relating thereto can be performed in other sequences that are appropriate. For example, described tasks or events may be performed in an order other than that specifically disclosed, or multiple may be combined in a single block or state. The example tasks or events may be performed in serial, in parallel, or in some other manner. Tasks or events may be added to or removed from the disclosed example embodiments. The example systems and components described herein may be configured differently than described. For example, elements may be added to, removed from, or rearranged compared to the disclosed example embodiments.


While certain example embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions disclosed herein. Thus, nothing in the foregoing description is intended to imply that any particular feature, characteristic, step, module, or block is necessary or indispensable. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the embodiments disclosed herein.

Claims
  • 1. A data storage device comprising: a disk;a spindle motor configured to rotate the disk, wherein the spindle motor comprises a plurality of windings;a head actuated over the disk; andcontrol circuitry powered by a supply voltage, the control circuitry configured to: commutate the windings based on a commutation sequence while applying a periodic driving voltage to each winding, wherein the periodic driving voltage comprises an operating amplitude during normal operation; andwhen the supply voltage falls below a threshold, configure the spindle motor into a power generator by at least adjusting a phase of the periodic driving voltage by a phase offset and by adjusting the amplitude of the periodic driving voltage based on the phase offset.
  • 2. The data storage device as recited in claim 1, wherein the control circuitry is further configured to adjust the amplitude of the periodic driving voltage based on:
  • 3. The data storage device as recited in claim 2, wherein an amplitude of the periodic driving voltage is generated based on: C2·Vpwr·DAC %where:C2 represents a scalar;Vpwr represents the supply voltage; andDAC % represents a scalar.
  • 4. The data storage device as recited in claim 3, wherein:
  • 5. The data storage device as recited in claim 4, wherein the spindle motor generates a peak power when Vpwr falls to Vpwr_min.
  • 6. The data storage device as recited in claim 5, wherein Vpwr_min is selected based on a peak power needed to park the head under worst case conditions.
  • 7. The data storage device as recited in claim 6, wherein when Vpwr substantially equals Vpwr_min the control circuitry is further configured to reduce the power consumed when parking the head.
  • 8. The data storage device as recited in claim 7, wherein when Vpwr substantially equals Vpwr_min, the control circuitry is configured to reduce the power consumed when parking the head by reducing a power consumed by a voice coil motor configured to actuate the head radially over the disk.
  • 9. The data storage device as recited in claim 3, wherein a power generating efficiency of the spindle motor increases as Vpwr rises above Vpwr_min.
  • 10. The data storage device as recited in claim 9, wherein Vpwr rises above Vpwr_min when a load powered by the spindle motor decreases.
  • 11. A method of operating a data storage device, the method comprising: rotating a disk using a spindle motor comprising a plurality of windings;actuating a head over the disk;commutating the windings based on a commutation sequence while applying a periodic driving voltage to each winding, wherein the periodic driving voltage comprises an operating amplitude during normal operation; andwhen a supply voltage falls below a threshold, configuring the spindle motor into a power generator by adjusting a phase of the periodic driving voltage by a phase offset and by at least adjusting the amplitude of the periodic driving voltage based on the phase offset.
  • 12. The method as recited in claim 11, further comprising adjusting the amplitude of the periodic driving voltage based on:
  • 13. The method as recited in claim 12, wherein an amplitude of the periodic driving voltage is generated based on: C2·Vpwr·DAC %where:C2 represents a scalar;Vpwr represents the supply voltage; andDAC % represents a scalar.
  • 14. The method as recited in claim 13, wherein:
  • 15. The method as recited in claim 14, wherein the spindle motor generates a peak power when Vpwr falls to Vpwr_min.
  • 16. The method as recited in claim 15, wherein Vpwr_min is selected based on a peak power needed to park the head under worst case conditions.
  • 17. The method as recited in claim 16, wherein when Vpwr substantially equals Vpwr_min the method further comprises reducing the power consumed when parking the head.
  • 18. The method as recited in claim 17, wherein when Vpwr substantially equals Vpwr_min, the method further comprises reducing the power consumed when parking the head by reducing a power consumed by a voice coil motor configured to actuate the head radially over the disk.
  • 19. The method as recited in claim 13, wherein a power generating efficiency of the spindle motor increases as Vpwr rises above Vpwr_min.
  • 20. The method as recited in claim 19, wherein Vpwr rises above Vpwr_min when a load powered by the spindle motor decreases.
  • 21. Control circuitry powered by a supply voltage, the control circuitry configured to: commutate windings of a spindle motor based on a commutation sequence while applying a periodic driving voltage to each winding, wherein the periodic driving voltage comprises an operating amplitude during normal operation; andwhen the supply voltage falls below a threshold, configure the spindle motor into a power generator by at least adjusting a phase of the periodic driving voltage by a phase offset and adjusting the amplitude of the periodic driving voltage based on the phase offset.
  • 22. The control circuitry as recited in claim 21, further configured to adjust the amplitude of the periodic driving voltage based on:
  • 23. The control circuitry as recited in claim 22, wherein an amplitude of the periodic driving voltage is generated based on: C2·Vpwr·DAC %where:C2 represents a scalar;Vpwr represents the supply voltage; andDAC % represents a scalar.
  • 24. The control circuitry as recited in claim 23, wherein:
US Referenced Citations (341)
Number Name Date Kind
6014283 Codilian et al. Jan 2000 A
6052076 Patton, III et al. Apr 2000 A
6052250 Golowka et al. Apr 2000 A
6067206 Hull et al. May 2000 A
6078453 Dziallo et al. Jun 2000 A
6091564 Codilian et al. Jul 2000 A
6094020 Goretzki et al. Jul 2000 A
6101065 Alfred et al. Aug 2000 A
6104153 Codilian et al. Aug 2000 A
6122133 Nazarian et al. Sep 2000 A
6122135 Stich Sep 2000 A
6141175 Nazarian et al. Oct 2000 A
6160368 Plutowski Dec 2000 A
6181502 Hussein et al. Jan 2001 B1
6195222 Heminger et al. Feb 2001 B1
6198584 Codilian et al. Mar 2001 B1
6198590 Codilian et al. Mar 2001 B1
6204988 Codilian et al. Mar 2001 B1
6243223 Elliott et al. Jun 2001 B1
6281652 Ryan et al. Aug 2001 B1
6285521 Hussein Sep 2001 B1
6292320 Mason et al. Sep 2001 B1
6310742 Nazarian et al. Oct 2001 B1
6320718 Bouwkamp et al. Nov 2001 B1
6342984 Hussein et al. Jan 2002 B1
6347018 Kadlec et al. Feb 2002 B1
6369972 Codilian et al. Apr 2002 B1
6369974 Asgari et al. Apr 2002 B1
6462896 Codilian et al. Oct 2002 B1
6476996 Ryan Nov 2002 B1
6484577 Bennett Nov 2002 B1
6493169 Ferris et al. Dec 2002 B1
6496324 Golowka et al. Dec 2002 B1
6498698 Golowka et al. Dec 2002 B1
6507450 Elliott Jan 2003 B1
6534936 Messenger et al. Mar 2003 B2
6538839 Ryan Mar 2003 B1
6545835 Codilian et al. Apr 2003 B1
6549359 Bennett et al. Apr 2003 B1
6549361 Bennett et al. Apr 2003 B1
6560056 Ryan May 2003 B1
6568268 Bennett May 2003 B1
6574062 Bennett et al. Jun 2003 B1
6577465 Bennett et al. Jun 2003 B1
6614615 Ju et al. Sep 2003 B1
6614618 Sheh et al. Sep 2003 B1
6636377 Yu et al. Oct 2003 B1
6690536 Ryan Feb 2004 B1
6693764 Sheh et al. Feb 2004 B1
6707635 Codilian et al. Mar 2004 B1
6710953 Vallis et al. Mar 2004 B1
6710966 Codilian et al. Mar 2004 B1
6714371 Codilian Mar 2004 B1
6714372 Codilian et al. Mar 2004 B1
6724564 Codilian et al. Apr 2004 B1
6731450 Codilian et al. May 2004 B1
6735041 Codilian et al. May 2004 B1
6738220 Codilian May 2004 B1
6747837 Bennett Jun 2004 B1
6760186 Codilian et al. Jul 2004 B1
6788483 Ferris et al. Sep 2004 B1
6791785 Messenger et al. Sep 2004 B1
6795268 Ryan Sep 2004 B1
6819518 Melkote et al. Nov 2004 B1
6826006 Melkote et al. Nov 2004 B1
6826007 Patton, III Nov 2004 B1
6847502 Codilian Jan 2005 B1
6850383 Bennett Feb 2005 B1
6850384 Bennett Feb 2005 B1
6865049 Codilian et al. Mar 2005 B1
6867944 Ryan Mar 2005 B1
6876508 Patton, III et al. Apr 2005 B1
6882496 Codilian et al. Apr 2005 B1
6885514 Codilian et al. Apr 2005 B1
6900958 Yi et al. May 2005 B1
6900959 Gardner et al. May 2005 B1
6903897 Wang et al. Jun 2005 B1
6914740 Tu et al. Jul 2005 B1
6914743 Narayana et al. Jul 2005 B1
6920004 Codilian et al. Jul 2005 B1
6924959 Melkote et al. Aug 2005 B1
6924960 Melkote et al. Aug 2005 B1
6924961 Melkote et al. Aug 2005 B1
6934114 Codilian et al. Aug 2005 B1
6934135 Ryan Aug 2005 B1
6937420 McNab et al. Aug 2005 B1
6937423 Ngo et al. Aug 2005 B1
6952322 Codilian et al. Oct 2005 B1
6954324 Tu et al. Oct 2005 B1
6958881 Codilian et al. Oct 2005 B1
6963465 Melkote et al. Nov 2005 B1
6965488 Bennett Nov 2005 B1
6967458 Bennett et al. Nov 2005 B1
6967811 Codilian et al. Nov 2005 B1
6970319 Bennett et al. Nov 2005 B1
6972539 Codilian et al. Dec 2005 B1
6972540 Wang et al. Dec 2005 B1
6972922 Subrahmanyam et al. Dec 2005 B1
6975480 Codilian et al. Dec 2005 B1
6977789 Cloke Dec 2005 B1
6980389 Kupferman Dec 2005 B1
6987636 Chue et al. Jan 2006 B1
6987639 Yu Jan 2006 B1
6989954 Lee et al. Jan 2006 B1
6992848 Agarwal et al. Jan 2006 B1
6992851 Cloke Jan 2006 B1
6992852 Ying et al. Jan 2006 B1
6995941 Miyamura et al. Feb 2006 B1
6999263 Melkote et al. Feb 2006 B1
6999267 Melkote et al. Feb 2006 B1
7006320 Bennett et al. Feb 2006 B1
7016134 Agarwal et al. Mar 2006 B1
7023637 Kupferman Apr 2006 B1
7023640 Codilian et al. Apr 2006 B1
7027256 Subrahmanyam et al. Apr 2006 B1
7027257 Kupferman Apr 2006 B1
7035026 Codilian et al. Apr 2006 B2
7046472 Melkote et al. May 2006 B1
7050249 Chue et al. May 2006 B1
7050254 Yu et al. May 2006 B1
7050258 Codilian May 2006 B1
7054098 Yu et al. May 2006 B1
7061714 Yu Jun 2006 B1
7064918 Codilian et al. Jun 2006 B1
7068451 Wang et al. Jun 2006 B1
7068459 Cloke et al. Jun 2006 B1
7068461 Chue et al. Jun 2006 B1
7068463 Ji et al. Jun 2006 B1
7078873 Suzuki et al. Jul 2006 B2
7088547 Wang et al. Aug 2006 B1
7095579 Ryan et al. Aug 2006 B1
7110208 Miyamura et al. Sep 2006 B1
7110214 Tu et al. Sep 2006 B1
7113362 Lee et al. Sep 2006 B1
7113365 Ryan et al. Sep 2006 B1
7116505 Kupferman Oct 2006 B1
7126781 Bennett Oct 2006 B1
7158329 Ryan Jan 2007 B1
7161757 Krishnamoorthy et al. Jan 2007 B1
7180703 Subrahmanyam et al. Feb 2007 B1
7184230 Chue et al. Feb 2007 B1
7196864 Yi et al. Mar 2007 B1
7199966 Tu et al. Apr 2007 B1
7203021 Ryan et al. Apr 2007 B1
7209321 Bennett Apr 2007 B1
7211973 Hoo et al. May 2007 B1
7212364 Lee May 2007 B1
7212374 Wang et al May 2007 B1
7215504 Bennett May 2007 B1
7224546 Orakcilar et al. May 2007 B1
7248426 Weerasooriya et al. Jul 2007 B1
7251098 Wang et al. Jul 2007 B1
7253582 Ding et al. Aug 2007 B1
7253989 Lau et al. Aug 2007 B1
7265933 Phan et al. Sep 2007 B1
7289288 Tu Oct 2007 B1
7298574 Melkote et al. Nov 2007 B1
7301717 Lee et al. Nov 2007 B1
7304819 Melkote et al. Dec 2007 B1
7327106 Hoo et al. Feb 2008 B1
7330019 Bennett Feb 2008 B1
7330327 Chue et al. Feb 2008 B1
7333280 Lifchits et al. Feb 2008 B1
7333290 Kupferman Feb 2008 B1
7339761 Tu et al. Mar 2008 B1
7365932 Bennett Apr 2008 B1
7388728 Chen et al. Jun 2008 B1
7391583 Sheh et al. Jun 2008 B1
7391584 Sheh et al. Jun 2008 B1
7433143 Ying et al. Oct 2008 B1
7440210 Lee Oct 2008 B1
7440225 Chen et al. Oct 2008 B1
7450334 Wang et al. Nov 2008 B1
7450336 Wang et al. Nov 2008 B1
7453661 Jang et al. Nov 2008 B1
7457071 Sheh Nov 2008 B1
7466509 Chen et al. Dec 2008 B1
7468855 Weerasooriya et al. Dec 2008 B1
7477471 Nemshick et al. Jan 2009 B1
7480116 Bennett Jan 2009 B1
7489464 McNab et al. Feb 2009 B1
7492546 Miyamura Feb 2009 B1
7495857 Bennett Feb 2009 B1
7499236 Lee et al. Mar 2009 B1
7502192 Wang et al. Mar 2009 B1
7502195 Wu et al. Mar 2009 B1
7502197 Chue Mar 2009 B1
7505223 McCornack Mar 2009 B1
7542225 Ding et al. Jun 2009 B1
7548392 Desai et al. Jun 2009 B1
7551390 Wang et al. Jun 2009 B1
7558016 Le et al. Jul 2009 B1
7560883 Hoo et al. Jul 2009 B1
7573670 Ryan et al. Aug 2009 B1
7576941 Chen et al. Aug 2009 B1
7580212 Li et al. Aug 2009 B1
7583470 Chen et al. Sep 2009 B1
7595954 Chen et al. Sep 2009 B1
7602575 Lifchits et al. Oct 2009 B1
7616399 Chen et al. Nov 2009 B1
7619844 Bennett Nov 2009 B1
7626782 Yu et al. Dec 2009 B1
7630162 Zhao et al. Dec 2009 B2
7639447 Yu et al. Dec 2009 B1
7656604 Liang et al. Feb 2010 B1
7656607 Bennett Feb 2010 B1
7660067 Ji et al. Feb 2010 B1
7663835 Yu et al. Feb 2010 B1
7675707 Liu et al. Mar 2010 B1
7679854 Narayana et al. Mar 2010 B1
7688534 McCornack Mar 2010 B1
7688538 Chen et al. Mar 2010 B1
7688539 Bryant et al. Mar 2010 B1
7697233 Bennett et al. Apr 2010 B1
7701661 Bennett Apr 2010 B1
7710676 Chue May 2010 B1
7715138 Kupferman May 2010 B1
7729079 Huber Jun 2010 B1
7733189 Bennett Jun 2010 B1
7746592 Liang et al. Jun 2010 B1
7746594 Guo et al. Jun 2010 B1
7746595 Guo et al. Jun 2010 B1
7760461 Bennett Jul 2010 B1
7800853 Guo et al. Sep 2010 B1
7800856 Bennett et al. Sep 2010 B1
7800857 Calaway et al. Sep 2010 B1
7816876 Tomigashi Oct 2010 B2
7839102 Rana et al. Nov 2010 B1
7839591 Weerasooriya et al. Nov 2010 B1
7839595 Chue et al. Nov 2010 B1
7839600 Babinski et al. Nov 2010 B1
7843662 Weerasooriya et al. Nov 2010 B1
7852588 Ferris et al. Dec 2010 B1
7852592 Liang et al. Dec 2010 B1
7864481 Kon et al. Jan 2011 B1
7864482 Babinski et al. Jan 2011 B1
7869155 Wong Jan 2011 B1
7876522 Calaway et al. Jan 2011 B1
7876523 Panyavoravaj et al. Jan 2011 B1
7916415 Chue Mar 2011 B1
7916416 Guo et al. Mar 2011 B1
7916420 McFadyen et al. Mar 2011 B1
7916422 Guo et al. Mar 2011 B1
7929238 Vasquez Apr 2011 B1
7961422 Chen et al. Jun 2011 B1
7974038 Krishnan et al. Jul 2011 B2
8000053 Anderson Aug 2011 B1
8031423 Tsai et al. Oct 2011 B1
8054022 Ryan et al. Nov 2011 B1
8059357 Knigge et al. Nov 2011 B1
8059360 Melkote et al. Nov 2011 B1
8072703 Calaway et al. Dec 2011 B1
8077428 Chen et al. Dec 2011 B1
8078901 Meyer et al. Dec 2011 B1
8081395 Ferris Dec 2011 B1
8085020 Bennett Dec 2011 B1
8116023 Kupferman Feb 2012 B1
8145934 Ferris et al. Mar 2012 B1
8179626 Ryan et al. May 2012 B1
8189286 Chen et al. May 2012 B1
8213106 Guo et al. Jul 2012 B1
8254222 Tang Aug 2012 B1
8300348 Liu et al. Oct 2012 B1
8315005 Zou et al. Nov 2012 B1
8320069 Knigge et al. Nov 2012 B1
8351174 Gardner et al. Jan 2013 B1
8358114 Ferris et al. Jan 2013 B1
8358145 Ferris et al. Jan 2013 B1
8390367 Bennett Mar 2013 B1
8432031 Agness et al. Apr 2013 B1
8432629 Rigney et al. Apr 2013 B1
8451697 Rigney et al. May 2013 B1
8471509 Bonvin Jun 2013 B2
8482873 Chue et al. Jul 2013 B1
8498076 Sheh et al. Jul 2013 B1
8498172 Patton, III et al. Jul 2013 B1
8508881 Babinski et al. Aug 2013 B1
8531798 Xi et al. Sep 2013 B1
8537486 Liang et al. Sep 2013 B2
8542455 Huang et al. Sep 2013 B2
8553351 Narayana et al. Oct 2013 B1
8564899 Lou et al. Oct 2013 B2
8576506 Wang et al. Nov 2013 B1
8605382 Mallary et al. Dec 2013 B1
8605384 Liu et al. Dec 2013 B1
8610391 Yang et al. Dec 2013 B1
8611040 Xi et al. Dec 2013 B1
8619385 Guo et al. Dec 2013 B1
8630054 Bennett et al. Jan 2014 B2
8630059 Chen et al. Jan 2014 B1
8634154 Rigney et al. Jan 2014 B1
8634283 Rigney et al. Jan 2014 B1
8643976 Wang et al. Feb 2014 B1
8649121 Smith et al. Feb 2014 B1
8654466 McFadyen Feb 2014 B1
8654467 Wong et al. Feb 2014 B1
8665546 Zhao et al. Mar 2014 B1
8665551 Rigney et al. Mar 2014 B1
8670206 Liang et al. Mar 2014 B1
8687312 Liang Apr 2014 B1
8693123 Guo et al. Apr 2014 B1
8693134 Xi et al. Apr 2014 B1
8699173 Kang et al. Apr 2014 B1
8711027 Bennett Apr 2014 B1
8717696 Ryan et al. May 2014 B1
8717699 Ferris May 2014 B1
8717704 Yu et al. May 2014 B1
8724245 Smith et al. May 2014 B1
8724253 Liang et al. May 2014 B1
8724422 Agness et al. May 2014 B1
8724524 Urabe et al. May 2014 B2
8737008 Watanabe et al. May 2014 B1
8737013 Zhou et al. May 2014 B2
8743495 Chen et al. Jun 2014 B1
8743503 Tang et al. Jun 2014 B1
8743504 Bryant et al. Jun 2014 B1
8749904 Liang et al. Jun 2014 B1
8760796 Lou et al. Jun 2014 B1
8767332 Chahwan et al. Jul 2014 B1
8767343 Helmick et al. Jul 2014 B1
8767354 Ferris et al. Jul 2014 B1
8773787 Beker Jul 2014 B1
8779574 Agness et al. Jul 2014 B1
8780473 Zhao et al. Jul 2014 B1
8780477 Guo et al. Jul 2014 B1
8780479 Helmick et al. Jul 2014 B1
8780489 Gayaka et al. Jul 2014 B1
8792202 Wan et al. Jul 2014 B1
8797664 Guo et al. Aug 2014 B1
8804267 Huang et al. Aug 2014 B2
8824081 Guo et al. Sep 2014 B1
8824262 Liu et al. Sep 2014 B1
8873193 Galbiati Oct 2014 B2
9093105 Ferris et al. Jul 2015 B2
20080111423 Baker et al. May 2008 A1
20100002331 Tan Jan 2010 A1
20100035085 Jung et al. Feb 2010 A1
20110198931 Ly Aug 2011 A1
20120284493 Lou et al. Nov 2012 A1
20130120870 Zhou et al. May 2013 A1
20130148240 Ferris et al. Jun 2013 A1
Non-Patent Literature Citations (2)
Entry
Michael T. Nicholls, U.S. Appl. No. 14/582,068, filed Dec. 23, 2014, 23 pages.
Michael T. Nicholls, U.S. Appl. No. 14/668,949, filed Mar. 25, 2015, 28 pages.