Claims
- 1. A data transmission apparatus for transferring data between non-synchronous systems, comprising:
- an input data transmission path, an output data transmission path, and a branch data transmission path,
- each data transmission path being composed of a shift register having a plurality of data storage stages and a plurality of data transfer control circuits each corresponding to a said data storage stage and controlling said corresponding data storage stage in accordance with control signals from transfer control circuits of adjacent stages indicating whether data is present at said adjacent stages;
- branching control means for determining whether data on said input data transmission path is to be sent to said output data transmission path or said branch data transmission path and transmitting the data on said input path to said output path or said branch path in accordance with the result of the determination; and
- initialization means for initializing the apparatus upon commencement of operation by eliminating data remaining on any transmission path from a previous operation.
- 2. The data transmission apparatus of claim 1, wherein said initialization means comprises means for transmitting data for initializing said input data transmission path to said input data transmission path at the start of operation.
- 3. The data transmission apparatus of claim 1, wherein said input data transmission path, said output data transmission path, and said branch data transmission path are in a loop configuration, and said initialization means comprises an absorption circuit provided on said loop for eliminating the data on the loop at the time when the apparatus is initialized.
- 4. The data transmission apparatus of claim 1, wherein each said data storage stage comprises a data latch.
- 5. A data transmission apparatus, comprising:
- a data transmission path composed of a non-synchronous self running shift register having a plurality of data storage stages and a plurality of data transfer control circuits each corresponding to a said data storage stage and controlling said corresponding data storage stage to transfer data to a succeeding stage in accordance with control signals from transfer control circuits of preceding and succeeding adjacent stages which indicate whether data is present at said adjacent stages and independent of any external clock signal;
- initiating means for initiating timing of data transfer and clearing any data existing on said data transmission path at the start of operation of said apparatus; and
- transfer control means responsive to said initiating means for controlling the timing of the control signals of at least one data transfer control circuit in accordance with the timing of data transfer.
- 6. The data transmission apparatus of claim 5, wherein each said data storage stage is a data latch.
- 7. A data transmission apparatus for transmitting data between systems comprising:
- a data transmission path composed of a non-synchronous self running shift register having a plurality of data storage stages and a plurality of data transfer control circuits each corresponding to a said data storage stage to transfer data to a succeeding stage and controlling said corresponding data storage stage in accordance with control signals from transfer control circuits of preceding and succeeding adjacent stages which indicate whether data is present at said adjacent stages and independent of any external clock signal; and
- an interface provided between two adjacent transfer control circuits one of which is of a speed dependent type and the other of which is of a speed independent type, wherein a control signal input operates the interface to change the output in response to the control signal input, which interface transmits control signals between the transfer control circuits at predetermined times;
- initiating means for initiating timing of data transfer and clearing any data existing on said data transmission path at the start of operation of said apparatus; and
- transfer control means responsive to said initiating means for controlling the timing of the control signals of at least one data transfer control circuit in accordance with the timing of data transfer.
- 8. The data transmission apparatus of claim 7, wherein each said data storage stage is a data latch.
- 9. The apparatus as defined by claim 7 wherein said control signal input comprises a clock signal.
Priority Claims (5)
Number |
Date |
Country |
Kind |
60-151981 |
Jul 1985 |
JPX |
|
60-151982 |
Jul 1985 |
JPX |
|
60-151983 |
Jul 1985 |
JPX |
|
60-151984 |
Jul 1985 |
JPX |
|
60-151985 |
Jul 1985 |
JPX |
|
Parent Case Info
This application is a continuation of application Ser. No. 07/245,773 filed on Sept. 19, 1988, now abandoned, which is a continuation of application Ser. No. 06/883,706 filed on July 29, 1986, now abandoned.
US Referenced Citations (2)
Continuations (2)
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Number |
Date |
Country |
Parent |
245773 |
Sep 1988 |
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Parent |
883706 |
Jul 1986 |
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