1. Field of the Invention
The present invention relates to a system for compensating for a DC offset that occurs in a radio receiver employing a direct conversion system when an interfering wave is input thereto.
2. Description of Related Art
In recent years, technology that uses a direct conversion system has been proposed as a system suitable for miniaturization and price reduction of radio receivers. In this system, an RF input signal is converted directly to a low-frequency baseband signal, and so in comparison to a conventional system that requires an intermediate frequency, it has the advantage that an intermediate frequency filter is not necessary.
Frequency conversion is performed by mixing an RF input signal with a local signal having the same frequency as the RF input signal using a mixer. However, in a direct conversion system, when second order nonlinear distortion is present in the mixer, a DC offset occurs in the output baseband signal in accordance with the level of the input signal. This DC offset will be described in detail with reference to
The value of this DC offset varies depending on the interfering wave level. In order to distinguish this DC offset from a DC offset that is present in an output when there is no input of the RF input signal and is independent of the interfering wave level, the former is referred to as a “dynamic DC offset” and the latter is referred to as a “static DC offset”. If the differential balance is perfectly symmetrical in a differential circuit constituting the mixer, the second order nonlinear distortion is not present. However, the elements constituting the differential circuit cannot be made completely symmetrical due to manufacturing variations. Therefore, eliminating the second order nonlinear distortion practically is impossible.
Thus, technology for compensating for a dynamic DC offset caused by the second order nonlinear distortion has been proposed. For example, U.S. Pat. No. 6,535,725 discloses a method for compensating for a dynamic DC offset that occurs in the mixer output by detecting an interfering wave included in an RF input signal. The method disclosed in U.S. Pat. No. 6,535,725 will be described below with reference to
The mixer 1 includes an RF input cell 41 and a switching cell 42. The RF input cell 41 includes bipolar transistors Q5 and Q6 and resistors R. The switching cell 42 includes bipolar transistors Q1, Q2, Q3, and Q4. An RF signal input from RF input terminals 43 and 44 is amplified in the RF input cell 41. In the switching cell 42, the amplified RF signal is mixed with a local signal that is input from local input terminals 45 and 46, and thus is converted into a baseband signal whose center frequency is DC. The baseband signal is output from output terminals 47 and 48.
If all the bipolar transistors Q1, Q2, Q3, and Q4 included in the switching cell 42 have exactly the same properties, the balance of a differential circuit is perfectly symmetrical. However, because the properties of the individual transistors Q1, Q2, Q3 and Q4 deviate from the ideal properties due to manufacturing variations, second order nonlinear distortion may occur during the conversion of the RF input signal into the baseband signal. This leads to a dynamic DC offset in the mixer output, as shown in
The dynamic DC offset compensator 40 shown in
In U.S. Pat. No. 6,535,725, the method of determining the adjustment signal 5 shown in
As an internal circuit for the detector 2, the inventor of the present invention made a study on the configuration as shown in
The comparator 9 shown in
As described above, a series of DC offset calibration processes is completed by first inputting the output from the comparator 9 to the static DC offset compensator 13 side to perform the static DC offset calibration and then to the adjustment signal generator 16 side to perform the dynamic DC offset calibration.
The correlation coefficient a is defined as the correlation coefficient between an amount of DC offset change in the mixer output that the compensation signal 8 causes by acting on the mixer 1 and an input to the detector 2. The correlation coefficient a is adjusted so that Y=α·(I0+Idet−I1) is satisfied, where Y denotes the magnitude of a dynamic DC offset caused by the mixer 1 when an interfering wave is input. When the circuit constants are set so that I1 is equal to I0, then α·(I0+Idet−I1) is α·Idet. When the interfering wave is switched off after the adjustment, the magnitude of the dynamic DC offset caused by the mixer 1 becomes zero and the increment Idet of the detector output current 54 resulting from the interfering wave input also becomes zero, so that the DC offset in the mixer output is maintained at zero.
The change in DC offset with time in each of the blocks shown in FIG. 8 during the above-described processes will be described specifically with reference to
When the static DC offset calibration is performed at the time t1, the compensation amount d becomes −X, so that the DC offset in the mixer output temporarily is made zero. Thereafter, when the interfering wave is switched on at the time t2, a dynamic DC offset with the magnitude of −Y is generated in the mixer output due to the second order nonlinear distortion of the mixer. Then, at the time t3, the dynamic DC offset calibration is performed, so that the dynamic DC offset compensation amount c=Y is generated to make the DC offset in the mixer output zero. Finally, when the interfering wave is switched off at the time t4, the dynamic DC offset compensation amount c becomes zero. The DC offset X caused by the mixer and the static DC offset compensation amount d=−X are added together, so that the DC offset in the mixer output is made zero. That is, in this state, no dynamic DC offset is generated if the interfering wave is switched on/off.
However, for example, if I0 is greater than I1 (I0>I1) due to manufacturing variations, the state as shown in
Therefore, with the foregoing in mind, it is an object of the present invention to reduce an adjustment error of a dynamic DC offset with the magnitude of Z caused by manufacturing variations as described above.
In order to achieve the above object, a DC offset calibration system according to a first configuration of the present invention includes: a mixer that performs frequency conversion of an RF input signal by mixing the RF input signal with a local signal whose frequency is equal to a carrier frequency; a level detector that detects a level of the RF input signal; a controller that generates a dynamic DC offset compensation signal for compensating for a dynamic DC offset included in an output signal of the mixer, the dynamic DC offset compensation signal being generated based on an output from the level detector; a comparator that discriminates a polarity of the DC offset in the output signal of the mixer; a static DC offset compensator that generates a static DC offset compensation signal for making a DC offset that is included in the output signal of the mixer when there is no input of the RF input signal zero; and an adjustment signal generator that generates an adjustment signal for determining a magnitude of the dynamic DC offset compensation signal generated by the controller. When determining the magnitude of the adjustment signal, the DC offset calibration system is controlled so that DC offset calibration that determines a magnitude of the static DC offset compensation signal when there is no input of the RF input signal based on an output from the comparator and DC offset calibration that determines the magnitude of the adjustment signal when an interfering wave is input based on the output from the comparator are repeated alternately a plurality of times.
A DC offset calibration system according to a second configuration of the present invention includes: a mixer that performs frequency conversion of an RF input signal by mixing the RF input signal with a local signal whose frequency is equal to a carrier frequency; a level detector that detects a level of the RF input signal; a controller that generates a dynamic DC offset compensation signal for compensating for a dynamic DC offset included in an output signal of the mixer, the dynamic DC offset compensation signal being generated based on an output from the level detector; a comparator that discriminates a polarity of the DC offset in the output signal of the mixer; a static DC offset compensator that generates a static DC offset compensation signal for making a DC offset that is included in the output signal of the mixer when there is no input of the RF input signal zero; an adjustment signal generator that generates an adjustment signal for determining a magnitude of the dynamic DC offset compensation signal generated by the controller; and an input adjustment feedback loop that makes an input to the controller zero when there is no input of the RF input signal. When determining the magnitude of the adjustment signal, the DC offset calibration system is controlled so that a magnitude of the static DC offset compensation signal when there is no input of the RF input signal is determined based on an output from the comparator, then the input to the controller when there is no input of the RF input signal is adjusted so as to be zero by an operation of the input adjustment feedback loop, and finally the magnitude of the adjustment signal when an interfering wave is input is determined based on the output from the comparator.
With the above-described configurations, it is possible to reduce an adjustment error of a dynamic DC offset with the magnitude of Z caused by manufacturing variations. Therefore, in a radio receiver employing a direct conversion system, it becomes possible to compensate for a dynamic DC offset generated in a mixer output signal when an interfering wave is input with high accuracy.
The DC offset calibration system according to the second configuration may be configured so that the input adjustment feedback loop includes an input adjustment portion that adds a DC level to the input to the controller and an input adjustment level compensating portion that compensates for the DC level supplied by the input adjustment portion based on the output from the comparator so as to make the input to the controller zero when there is no input of the RF input signal. When adjusting the input to the controller to be zero when there is no input of the RF input signal, the compensation by the input adjustment level compensating portion is performed, with a temporary adjustment signal having a predetermined magnitude being supplied to the controller instead of the adjustment signal.
The controller may be configured so that an output current from the level detector is supplied to an input stage of a current mirror circuit and an output current from the current mirror circuit is varied by changing a mirror ratio thereof, thereby generating the dynamic DC offset compensation signal for compensating for the dynamic DC offset included in the output signal of the mixer.
Hereinafter, the present invention will be described by way of illustrative embodiments with reference to the drawings.
Hereinafter, a DC offset calibration system according to a first embodiment of the present invention will be described with reference to the drawings.
A dynamic DC offset compensator including a detector 2, an input adjustment portion 3, and a controller 4 is connected to a mixer 1. In order to supply a dynamic DC offset adjustment signal 5 to the controller 4, a circuit including a comparator 9, a changeover switch 17a, a static DC offset compensator 13, and an adjustment signal generator 16 is provided. The static DC offset compensator 13 includes a DAC 11 and a register 12, and the adjustment signal generator 16 includes a DAC 14 and a register 15. A control portion of this system in not shown in
The detector 2 detects the level of an RF input signal that is input from RF input lines 6 and outputs a detection signal represented by I0+Idet. A signal obtained by deducting a current I1 supplied by the input adjustment portion 3 from the detection signal is input to the controller 4, where the magnitude of the signal is adjusted so as to convert the signal to a compensation signal 8. The compensation signal 8 then is input to the mixer 1. Due to the second order nonlinear distortion of the mixer 1, an interfering wave included in the RF input signal causes a dynamic DC offset to be generated in the mixer output signal output from mixer output lines 7. However, the compensation signal 8 acts on the mixer 1 so as to decrease the dynamic DC offset included in the mixer output signal. The controller 4 may be configured so that, for example, an output current from the detector 2 is supplied to an input stage of a current mirror circuit and an output current from the current mirror circuit is varied by changing a mirror ratio thereof, thereby generating the compensation signal 8 for compensating for a dynamic DC offset included in an output signal of the mixer 1.
The basic configuration of the calibration system according to the present embodiment is the same as that of the system shown in
The operation of repeating the static DC offset calibration and the dynamic DC offset calibration a plurality of times as described above and an advantageous effect brought about by this operation will be described in detail with reference to
The type of the signal and the processes until the time t4 in
Then, at the time t7, the correlation coefficient α is changed to (Y+Z)/(I0+Idet−I1) in order to cancel −Z. As a result, the dynamic DC offset compensation amount c becomes Y+Z. Finally, when the interfering wave is switched off at the time t8, an input to the controller 4 is (I0−I1)/(I0+Idet−I1)=Z/Y. Accordingly, the dynamic DC offset compensation amount c becomes (Y+Z)·Z/Y=Z+Z2/Y. Thus, the DC offset a in the mixer output becomes b+c+d=X+(Z+Z2/Y)+(−X−Z)=Z2/Y. That is, in this state, the dynamic DC offset with the magnitude of Z2/Y is generated by switching on/off the interfering wave.
The above-described processes can be summarized as follows. The magnitude of the dynamic DC offset, which is Y before the adjustment, becomes Z after the first-time adjustment and then becomes Z2/Y after the second-time adjustment. Similarly, after the nth-time adjustment, the magnitude of the dynamic DC offset becomes Y·(Z/Y)n. Since Z/Y is (I0−I1)/(I0+Idet−I1)<1, the adjustment error becomes closer and closer to zero as the number of times the adjustment is performed increases.
By the above-described operation, it becomes possible to reduce an adjustment error of the dynamic DC offset with the magnitude of Z caused by manufacturing variations.
Next, a DC offset calibration system according the second embodiment of the present invention will be described with reference to the drawings.
The configuration of this calibration system is different from that of the system shown in
The operation of this system will be described with reference to
Then, at the time t2, the changeover switch 17b is switched over so that the output from the comparator 9 is input to the detector-output-adjustment-current compensator 21 side. At the same time, the switch 20 is turned on as shown in
After I1 has been made equal to I0, an adjustment current 5 is turned to an output from the DAC 14 by the switch 23 at the time t4, and an output from the comparator 9 is input to the dynamic DC offset adjustment signal generator 16 side by the changeover switch 17b. Then, an interfering wave is input through the RF input, and dynamic DC offset calibration is performed at the time t5. By this dynamic DC offset calibration, the DC offset in the mixer output becomes identical to the response shown in
By the above-describes operation, it is possible to make I1 equal to I0 regardless of the manufacturing variations, thus allowing an adjustment error of the dynamic DC offset with the magnitude of Z=α·(I0−I1) to be made zero.
The invention may be embodied in other forms without departing from the spirit or essential characteristics thereof. The embodiments disclosed in this application are to be considered in all respects as illustrative and not limiting. The scope of the invention is indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are intended to be embraced therein.
Number | Date | Country | Kind |
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JP2005-139934 | May 2005 | JP | national |