Patent Application
20080007344
The invention will be described in greater detail with reference to the accompanying drawings which represent preferred embodiments thereof, wherein:
The present invention solves the aforementioned problem by using the output current from a photodiode monitoring circuit, e.g. a Receive Signal Strength Indicator (RSSI), to cancel the dc offset current from the photodiode before entering the trans-impedance amplifier (TIA). As illustrated in
Conventional DC offset cancellation is accomplished by a feedback network 15 including a feedback amplifier 16/low pass capacitor filter 17, and bypass transistor 18 combination, as hereinbefore discussed, integrated on a integrated circuit chip; however other means of DC offset cancellation are possible within the scope of this invention.
A photocurrent monitor function provides a DC signal proportional to the average received optical power, as required by digital diagnostic standards, e.g. SFP, XFP (The 10 Gigabit/second Ethernet XFP MSA is the source of the power monitor circuit spec and application notes, which is incorporated herein by reference). The photocurrent monitor function also allows active optical alignment during the manufacturing process. A conventional power monitor circuit, in the form of an integrated Received Signal Strength Indicator (RSSI) circuit 20 is electrically connected to the photodiode 12 and generates a DC output current IRSSI, which accurately replicates the DC current drawn through the photodiode 12. Preferably, the RSSI function resides on the TIA chip inside the ROSA thus eliminating the need for additional external components resulting in a considerable reduction of the assembly costs. For conventional use, the DC output current IRSSI is converted by additional circuitry (not shown) into a digital readout for monitoring the photodiode to ensure the photodiode is operating within design specifications.
The present invention includes a current mirror circuit 25, which also receives the DC output current IRSS, at input connection Iin, and replicates the output current IRSSI forming a mirrored copy, i.e. replicated DC current Ireplica. The current mirror circuit 25 can take any suitable form, including a NFET current mirror, an NPN current mirror or a cascode current mirror, as is well known in the art. The replicated DC current Ireplica is used to cancel the DC component of the full, signal-laden, AC+DC photodiode current IPD. The closer the replicated DC current Ireplica is to the DC component of the photodiode current IPD the less of a DC error current Ierror will be transmitted to the trans-impedance amplifier 11. As stated above, the range of the DC component of IPD is about 1000 μA=10 μA=100 which corresponds to approximately 40dB. DC offset cancellation circuits must compensate for this gain by employing a large gain amplifier 16 and consequently a large capacitor 17 for setting the low-frequency cutoff. By subtracting the Ireplica current, the new input current range for the offset cancellation feedback loop can be reduced to under 10 μA or less than 5 dB depending on the accuracy of the RSSI and mirror circuits. The specified accuracy for RSSI is 3 dB, with an additional 2 dB for the accuracy of the current mirror. When the range of the error current Ierror has been reduced by 35 dB, the gain of the feedback circuit 15 can also be reduced by 35 dB (40 dB-5 dB=35 dB) and functions primarily to cancel offsets generated internal to the front end and gain stages of the integrated circuit. Accordingly, the size of the feedback capacitor 17 can be at least 50 times smaller while still maintaining the required low-frequency cutoff. The new size can be made to fit “on-chip” instead of as a separate element reducing production costs.
As a secondary function, the capacitor 7 also serves to stabilize the feedback loop 5. It is assumed that the reduction in capacitance doesn't affect the stability of the loop 5, since stability gets much better with lower loop gain, which has been taken out of the loop 5. Moreover, with the amount of capacitance required to achieve the low-frequency range, which is required for Datacom and Telecom operation, stability is all but guaranteed. The value of the capacitance is rarely chosen for stability concerns—it is always for the low-frequency cutoff.
The RSSI circuit 20 does not create a feedback loop. The input node on the TIA 11 generates an inherently stable voltage by the nature of the input circuit. As long as the current being subtracted does not take the input circuit out of it's designed operating range, the input voltage will remain controlled. Furthermore, the voltage at the anode of the photodiode 12 has a secondary effect on the amount of current generated for a given amount of light, and this effect is more pronounced at higher frequencies. Therefore, there is very little risk that the DC current that gets subtracted from the photodiode current IPD can affect the average signal coming out of the photodetector 12. As for signal integrity, the voltage signal used to generate the RSSI current (the photodiode cathode) is highly filtered—essentially it is the power supply. Therefore, it is easy to achieve a “DC” signal that won't subtract any useful data signals using on-chip components.
