The present invention relates to an encoding method, decoding method, encoder and decoder using low density parity check convolutional codes (LDPC-CC) supporting a plurality of coding rates.
In recent years, attention has been attracted to a low-density parity-check (LDPC) code as an error correction code that provides high error correction capability with a feasible circuit scale. Because of its high error correction capability and ease of implementation, an LDPC code has been adopted in an error correction coding scheme for IEEE802.11n high-speed wireless LAN systems, digital broadcasting systems, and so forth.
An LDPC code is an error correction code defined by low-density parity check matrix H. Furthermore, the LDPC code is a block code having the same block length as the number of columns N of check matrix H (see Non-Patent Literature 1, Non-Patent Literature 2, Non-Patent Literature 3). For example, random LDPC code, QC-LDPC code (QC: Quasi-Cyclic) are proposed.
However, a characteristic of many current communication systems is that transmission information is collectively transmitted per variable-length packet or frame, as in the case of Ethernet (registered trademark). A problem with applying an LDPC code, which is a block code, to a system of this kind is, for example, how to make a fixed-length LDPC code block correspond to a variable-length Ethernet (registered trademark) frame. IEEE802.11n applies padding processing or puncturing processing to a transmission information sequence, and thereby adjusts the length of the transmission information sequence and the block length of the LDPC code. However, it is difficult to avoid the coding rate from being changed or a redundant sequence from being transmitted through padding or puncturing.
Studies are being carried out on LDPC-CC (Low-Density Parity-Check Convolutional Codes) capable of performing encoding or decoding on an information sequence of an arbitrary length for LDPC code (hereinafter, this will be represented by “LDPC-BC: Low-Density Parity-Check Block Code”) of such a block code (e.g., see Non-Patent Literature 8 and Non-Patent Literature 9).
LDPC-CC is a convolutional code defined by a low density parity check matrix. For example, parity check matrix HT[0, n] of LDPC-CC of a coding rate of R=½(=b/c) is shown in
All elements other than h1(m)(t) are 0. M represents the LDPC-CC memory length, and n represents the length of an LDPC-CC codeword. As shown in
An LDPC-CC encoder defined by parity check matrix HT[0, n] when h1(0)(t)=1 and h2(0)(t)=1 here is represented by
Also, since the encoder in
Patent Literature 1 describes an LDPC-CC generating method based on a parity check polynomial. In particular, Patent Literature 1 describes a method of generating an LDPC-CC using parity check polynomials of a time varying period of 2, time varying period of 3, time varying period of 4 and time varying period of a multiple of 3.
PTL 1
NPL 1
NPL 2
NPL 3
NPL 4
NPL 5
NPL 6
NPL 7
NPL 8
NPL 9
NPL 10
NPL 11
NPL 12
NPL 13
NPL 14
NPL 15
NPL 16
However, although Patent Literature 1 describes details of the method of generating an LDPC-CC of time varying periods of 2, 3 and 4, and a time varying period of a multiple of 3, the time varying periods are limited.
It is therefore an object of the present invention to provide an encoding method, decoding method, encoder and decoder of a time-varying LDPC-CC having high error correction capability.
One aspect of the encoding method of the present invention is an encoding method of performing low density parity check convolutional coding (LDPC-CC) of a time varying period of q using a parity check polynomial of a coding rate of (n−1)/n (where n is an integer equal to or greater than 2), the time varying period of q being a prime number greater than 3, the method receiving an information sequence as input and encoding the information sequence using equation 116 as the g-th (g=0, 1, . . . , q−1) parity check polynomial that satisfies 0.
One aspect of the encoding method of the present invention is an encoding method of performing low density parity check convolutional coding (LDPC-CC) of a time varying period of q using a parity check polynomial of a coding rate of (n−1)/n (where n is an integer equal to or greater than 2), the time varying period of q being a prime number greater than 3, the method receiving an information sequence as input and encoding the information sequence using a parity check polynomial that satisfies:
“a#0,k,1%q=a#1,k,1%q=a#2,k,1%q=a#3,k,1%q= . . . =a#g,k,1%q= . . . =a#q-2,k,1%q=a#q-1,k,1%q=vp=k (vp=k: fixed-value),”
“b#0,1%q=b#1,1%q=b#2,1%q=b#3,1%q= . . . =b#g,1%q= . . . =b#q-2,1%q=b#q-1,1%q=w (w: fixed-value),”
“a#0,k,2%q=a#1,k,2%q=a#2,k,2%q=a#3,k,2%q= . . . =a#g,k,2%q= . . . =a#q-2,k,2%q=a#q-1,k,2%q=yp=k (yp=k: fixed-value),”
“b#0,2%q=b#1,2%q=b#2,2%q=b#3,2%q= . . . =b#g,2%q= . . . =b#q-2,2%q=b#q-1,2%q=z (z: fixed-value),” and
“a#0,k,3%q=a#1,k,3%q=a#2,k,3%q=a#3,k,3%q= . . . =a#g,k,3%q= . . . =a#q-2,k,3%q=a#q-1,k,3%q=sp=k (sp=k: fixed-value)”
of a g-th (g=0, 1, . . . , q−1) parity check polynomial that satisfies 0 represented by equation 117 for k=1, 2, . . . , n−1.
One aspect of the encoder of the present invention is an encoder hat performs low density parity check convolutional coding (LDPC-CC) of a time varying period of q using a parity check polynomial of a coding rate of (n−1)/n (where n is an integer equal to or greater than 2), the time varying period of q being a prime number greater than 3, including a generating section that receives information bit Xr[i] (r=1, 2, . . . , n−1) at point in time i as input, designates an equation equivalent to the g-th (g=0, 1, . . . , q−1) parity check polynomial that satisfies 0 represented by equation 116 as equation 118 and generates parity bit P[i] at point in time i using an equation with k substituting for g in equation 118 when i%q=k and an output section that outputs parity bit P[i].
One aspect of the decoding method of the present invention is a decoding method corresponding to the above-described encoding method for performing low density parity check convolutional coding (LDPC-CC) of a time varying period of q (prime number greater than 3) using a parity check polynomial of a coding rate of (n−1)/n (where n is an integer equal to or greater than 2), for decoding an encoded information sequence encoded using equation 116 as the g-th (g=0, 1, . . . , q−1) parity check polynomial that satisfies 0, the method receiving the encoded information sequence as input and decoding the encoded information sequence using belief propagation (BP) based on a parity check matrix generated using equation 116 which is the g-th parity check polynomial that satisfies 0.
One aspect of the decoder of the present invention is a decoder corresponding to the above-described encoding method for performing low density parity check convolutional coding (LDPC-CC) of a time varying period of q (prime number greater than 3) using a parity check polynomial of a coding rate of (n−1)/n (where n is an integer equal to or greater than 2), that performs decoding an encoded information sequence encoded using equation 116 as the g-th (g=0, 1, . . . , q-1) parity check polynomial that satisfies 0, including a decoding section that receives the encoded information sequence as input and decodes the encoded information sequence using belief propagation (BP) based on a parity check matrix generated using equation 116 which is the g-th parity check polynomial that satisfies 0.
The present invention can achieve high error correction capability, and can thereby secure high data quality.
Now, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Before describing specific configurations and operations of embodiments, an LDPC-CC based on parity check polynomials described in Patent Literature 1 will be described first.
[LDPC-CC Based on Parity Check Polynomial]
First, an LDPC-CC of a time varying period of 4 will be described. A case in which the coding rate is 1/2 is described below as an example.
Consider equations 1-1 to 1-4 as parity check polynomials of an LDPC-CC having a time varying period of 4. At this time, X(D) is a polynomial representation of data (information) and P(D) is a parity polynomial representation. Here, in equations 1-1 to 1-4, parity check polynomials have been assumed in which there are four terms in X(D) and P(D), respectively, the reason being that four terms are desirable from the standpoint of achieving good received quality.
[1]
(Da1+Da2+Da3+Da4)X(D)+(Db1+Db2+Db3+Db4)P(D)=0 (Equation 1-1)
(DA1+DA2+DA3+DA4)X(D)+(DB1+DB2+DB3+DB4)P(D)=0 (Equation 1-2)
(Dα1+Dα2+Dα3+Dα4)X(D)+(Dβ1+Dβ2+Dβ3+Dβ4)P(D)=0 (Equation 1-3)
(DE1+DE2+DE3+DE4)X(D)+(DF1+DF2+DF3+DF4)P(D)=0 (Equation 1-4)
In equation 1-1, it is assumed that a1, a2, a3 and a4 are integers (where a1≠a2≠a3≠a4, and a1 to a4 are all mutually different). Use of the notation “X≠Y≠ . . . ≠Z” is assumed to express the fact that X, Y, Z are all mutually different. Also, it is assumed that b1, b2, b3 and b4 are integers (where b1≠b2≠b3≠b4). A parity check polynomial of equation 1-1 is called “check equation #1,” and a sub-matrix based on the parity check polynomial of equation 1-1 is designated first sub-matrix H1.
In equation 1-2, it is assumed that A1, A2, A3, and A4 are integers (where A1≠A2≠A3≠A4). Also, it is assumed that B1, B2, B3, and B4 are integers (where B1≠B2≠B3≠B4). A parity check polynomial of equation 1-2 is called “check equation #2,” and a sub-matrix based on the parity check polynomial of equation 1-2 is designated second sub-matrix H2.
In equation 1-3, it is assumed that α1, α2, α3, and α4 are integers (where α1≠α2≠α3≠α4). Also, it is assumed that β1, β2, β3, and β4 are integers (where β1≠β2≠β3≠β4). A parity check polynomial of equation 1-3 is called “check equation #3,” and a sub-matrix based on the parity check polynomial of equation 1-3 is designated third sub-matrix H3.
In equation 1-4, it is assumed that E1, E2, E3, and E4 are integers (where E1≠E2≠E3≠E4). Also, it is assumed that F1, F2, F3, and F4 are integers (where F1≠F2≠F3≠F4). A parity check polynomial of equation 1-4 is called “check equation #4,” and a sub-matrix based on the parity check polynomial of equation 1-4 is designated fourth sub-matrix H4.
Next, consider an LDPC-CC of a time varying period of 4 that generates a check matrix as shown in
At this time, if k is designated as a remainder after dividing the values of combinations of orders of X(D) and P(D), (a1, a2, a3, a4), (b1, b2, b3, b4), (A1, A2, A3, A4), (B1, B2, B3, B4), (α1, α2, α3, α4), (β1, β2, β3, β4), (E1, E2, E3, E4) and (F1, F2, F3, F4), in equations 1-1 to 1-4 by 4, provision is made for one each of remainders 0, 1, 2, and 3 to be included in four-coefficient sets represented as shown above (for example, (a1, a2, a3, a4)), and to hold true for all the above four-coefficient sets.
For example, if orders (a1, a2, a3, a4) of X(D) of “check equation #1” are set as (a1, a2, a3, a4)=(8, 7, 6, 5), remainders k after dividing orders (a1, a2, a3, a4) by 4 are (0, 3, 2, 1), and one each of 0, 1, 2 and 3 are included in the four-coefficient set as remainders k. Similarly, if orders (b1, b2, b3, b4) of P(D) of “check equation #1” are set as (b1, b2, b3, b4)=(4, 3, 2, 1), remainders k after dividing orders (b1, b2, b3, b4) by 4 are (0, 3, 2, 1), and one each of 0, 1, 2 and 3 are included in the four-coefficient set as remainders k. It is assumed that the above condition about “remainder” also holds true for the four-coefficient sets of X(D) and P(D) of the other parity check equations (“check equation #2,” “check equation #3” and “check equation #4”).
By this means, the column weight of parity check matrix H configured from equations 1-1 to 1-4 becomes 4 for all columns, which enables a regular LDPC code to be formed. Here, a regular LDPC code is an LDPC code that is defined by a parity check matrix for which each column weight is equally fixed, and is characterized by the fact that its characteristics are stable and an error floor is unlikely to occur. In particular, since the characteristics are good when the column weight is 4, an LDPC-CC offering good reception performance can be achieved by generating an LDPC-CC as described above.
Table 1 shows examples of LDPC-CCs (LDPC-CCs #1 to #3) of a time varying period of 4 and a coding rate of 1/2 for which the above condition about “remainder” holds true. In table 1, LDPC-CCs of a time varying period of 4 are defined by four parity check polynomials: “check polynomial #1,” “check polynomial #2,” “check polynomial #3,” and “check polynomial #4.”
A case with a coding rate of 1/2 has been described above as an example, but even when the coding rate is (n−1)/n, if the above condition about “remainder” also holds true for four coefficient sets of information X1(D), X2(D), . . . , Xn-1(D), respectively, the code is still a regular LDPC code and good receiving quality can be achieved.
In the case of a time varying period of 2, also, it has been confirmed that a code with good characteristics can be found if the above condition about “remainder” is applied. An LDPC-CC of a time varying period of 2 with good characteristics is described below. A case in which the coding rate is 1/2 is described below as an example.
Consider equations 2-1 and 2-2 as parity check polynomials of an LDPC-CC having a time varying period of 2. At this time, X(D) is a polynomial representation of data (information) and P(D) is a parity polynomial representation. Here, in equations 2-1 and 2-2, parity check polynomials have been assumed in which there are four terms in X(D) and P(D), respectively, the reason being that four terms are desirable from the standpoint of achieving good received quality.
[2]
(Dα1+Dα2+Dα3+Dα4)X(D)+(Dβ1+Dβ2+Dβ3+Dβ4)P(D)=0 (Equation 2-1)
(DA1+DA2+DA3+DA4)X(D)+(DB1+DB2+DB3+DB4)P(D)=0 (Equation 2-2)
In equation 2-1, it is assumed that a1, a2, a3, and a4 are integers (where a1≠a2≠a3≠a4). Also, it is assumed that b1, b2, b3, and b4 are integers (where b1≠b2≠b3≠b4). A parity check polynomial of equation 2-1 is called “check equation #1,” and a sub-matrix based on the parity check polynomial of equation 2-1 is designated first sub-matrix H1.
In equation 2-2, it is assumed that A1, A2, A3, and A4 are integers (where A1≠A2≠A3≠A4). Also, it is assumed that B1, B2, B3, and B4 are integers (where B1≠B2≠B3≠B4). A parity check polynomial of equation 2-2 is called “check equation #2,” and a sub-matrix based on the parity check polynomial of equation 2-2 is designated second sub-matrix H2.
Next, consider an LDPC-CC of a time varying period of 2 generated from first sub-matrix H1 and second sub-matrix H2.
At this time, if k is designated as a remainder after dividing the values of combinations of orders of X(D) and P(D), (a1, a2, a3, a4), (b1, b2, b3, b4), (A1, A2, A3, A4), (B1, B2, B3, B4), in equations 2-1 and 2-2 by 4, provision is made for one each of remainders 0, 1, 2, and 3 to be included in four-coefficient sets represented as shown above (for example, (a1, a2, a3, a4)), and to hold true for all the above four-coefficient sets.
For example, if orders (a1, a2, a3, a4) of X(D) of “check equation #1” are set as (a1, a2, a3, a4)=(8, 7, 6, 5), remainders k after dividing orders (a1, a2, a3, a4) by 4 are (0, 3, 2, 1), and one each of 0, 1, 2 and 3 are included in the four-coefficient set as remainders k. Similarly, if orders (b1, b2, b3, b4) of P(D) of “check equation #1” are set as (b1, b2, b3, b4)=(4, 3, 2, 1), remainders k after dividing orders (b1, b2, b3, b4) by 4 are (0, 3, 2, 1), and one each of 0, 1, 2 and 3 are included in the four-coefficient set as remainders k. It is assumed that the above condition about “remainder” also holds true for the four-coefficient sets of X(D) and P(D) of “check equation #2.”
By this means, the column weight of parity check matrix H configured from equations 2-1 and 2-2 becomes 4 for all columns, which enables a regular LDPC code to be formed. Here, a regular LDPC code is an LDPC code that is defined by a parity check matrix for which each column weight is equally fixed, and is characterized by the fact that its characteristics are stable and an error floor is unlikely to occur. In particular, since the characteristics are good when the column weight is 8, an LDPC-CC enabling reception performance to be further improved can be achieved by generating an LDPC-CC as described above.
Table 2 shows examples of LDPC-CCs (LDPC-CCs #1 and #2) of a time varying period of 2 and a coding rate of 1/2 for which the above condition about “remainder” holds true. In table 2, LDPC-CCs of a time varying period of 2 are defined by two parity check polynomials: “check polynomial #1” and “check polynomial #2.”
A case has been described above where (LDPC-CC of a time varying period of 2), the coding rate is 1/2 as an example, but even when the coding rate is (n−1)/n, if the above condition about “remainder” holds true for the four coefficient sets in information X1(D), X2(D), . . . , Xn-1(D), respectively, the code is still a regular LDPC code and good receiving quality can be achieved.
In the case of a time varying period of 3, also, it has been confirmed that a code with good characteristics can be found if the following condition about “remainder” is applied. An LDPC-CC of a time varying period of 3 with good characteristics is described below. A case in which the coding rate is 1/2 is described below as an example.
Consider equations 3-1 to 3-3 as parity check polynomials of an LDPC-CC having a time varying period of 3. At this time, X(D) is a polynomial representation of data (information) and P(D) is a parity polynomial representation. Here, in equations 3-1 to 3-3, parity check polynomials are assumed such that there are three terms in X(D) and P(D), respectively.
[3]
(Da1+Da2+Da3)X(D)+(Db1+Db2+Db3)P(D)=0 (Equation 3-1)
(DA1+DA2+DA3)X(D)+(DB1+DB2+DB3)P(D)=0 (Equation 3-2)
(Dα1+Dα2+Dα3)X(D)+(Dβ1+Dβ2+Dβ3)P(D)=0 (Equation 3-3)
In equation 3-1, it is assumed that a1, a2, and a3 are integers (where a1≠a2≠a3). Also, it is assumed that b1, b2 and b3 are integers (where b1≠b2≠b3). A parity check polynomial of equation 3-1 is called “check equation #1,” and a sub-matrix based on the parity check polynomial of equation 3-1 is designated first sub-matrix H1.
In equation 3-2, it is assumed that A1, A2 and A3 are integers (where A1≠A2≠A3). Also, it is assumed that B1, B2 and B3 are integers (where B1≠B2≠B3). A parity check polynomial of equation 3-2 is called “check equation #2,” and a sub-matrix based on the parity check polynomial of equation 3-2 is designated second sub-matrix H2.
In equation 3-3, it is assumed that α1, α2 and α3 are integers (where α1≠α2≠α3). Also, it is assumed that β1, β2 and β3 are integers (where β1≠β2≠β3). A parity check polynomial of equation 3-3 is called “check equation #3,” and a sub-matrix based on the parity check polynomial of equation 3-3 is designated third sub-matrix H3.
Next, consider an LDPC-CC of a time varying period of 3 generated from first sub-matrix H1, second sub-matrix H2 and third sub-matrix H3.
At this time, if k is designated as a remainder after dividing the values of combinations of orders of X(D) and P(D), (a1, a2, a3), (b1, b2, b3), (A1, A2, A3), (B1, B2, B3), (α1, α2, α3) and (β1, β2, β3), in equations 3-1 to 3-3 by 3, provision is made for one each of remainders 0, 1, and 2 to be included in three-coefficient sets represented as shown above (for example, (a1, a2, a3)), and to hold true for all the above three-coefficient sets.
For example, if orders (a1, a2, a3) of X(D) of “check equation #1” are set as (a1, a2, a3)=(6, 5, 4), remainders k after dividing orders (a1, a2, a3) by 3 are (0, 2, 1), and one each of 0, 1, 2 are included in the three-coefficient set as remainders k. Similarly, if orders (b1, b2, b3) of P(D) of “check equation #1” are set as (b1, b2, b3)=(3, 2, 1), remainders k after dividing orders (b1, b2, b3) by 3 are (0, 2, 1), and one each of 0, 1, 2 are included in the three-coefficient set as remainders k. It is assumed that the above condition about “remainder” also holds true for the three-coefficient sets of X(D) and P(D) of “check equation #2” and “check equation #3.”
By generating an LDPC-CC as above, it is possible to generate a regular LDPC-CC code in which the row weight is equal in all rows and the column weight is equal in all columns, without some exceptions. Here, “exceptions” refer to part in the beginning of a parity check matrix and part in the end of the parity check matrix, where the row weights and columns weights are not the same as row weights and column weights of the other part. Furthermore, when BP decoding is performed, belief in “check equation #2” and belief in “check equation #3” are propagated accurately to “check equation #1,” belief in “check equation #1” and belief in “check equation #3” are propagated accurately to “check equation #2,” and belief in “check equation #1” and belief in “check equation #2” are propagated accurately to “check equation #3.” Consequently, an LDPC-CC with better received quality can be achieved. This is because, when considered in column units, positions at which “1” is present are arranged so as to propagate belief accurately, as described above.
The above belief propagation will be described below using accompanying drawings.
“Check equation #1” illustrates a case in which (a1, a2, a3)=(2, 1, 0) and (b1, b2, b3)=(2, 1, 0) in a parity check polynomial of equation 3-1, and remainders after dividing the coefficients by 3 are as follows: (a1%3, a2%3, a3%3)=(2, 1, 0) and (b1%3, b2%3, b3%3)=(2, 1, 0), where “Z%3” represents a remainder after dividing Z by 3.
“Check equation #2” illustrates a case in which (A1, A2, A3)=(5, 1, 0) and (B1, B2, B3)=(5, 1, 0) in a parity check polynomial of equation 3-2, and remainders after dividing the coefficients by 3 are as follows: (A1%3, A2%3, A3%3)=(2, 1, 0) and (B1%3, B2%3, B3%3)=(2, 1, 0)
“Check equation #3” illustrates a case in which (α1, α2, α3)=(4, 2, 0) and (β1, β2, β3)=(4, 2, 0) in a parity check polynomial of equation 3-3, and remainders after dividing the coefficients by 3 are as follows: (α1%3, α2%3, α3%3)=(1, 2, 0) and (β1%3, β2%3, β3%3)=(1, 2, 0).
Therefore, the example of LDPC-CC of a time varying period of 3 shown in
(a1%3, a2%3, a3%3),
(b1%3, b2%3, b3%3),
(A1%3, A2%3, A3%3),
(B1%3, B2%3, B3%3),
(α1%3, α2%3, α3%3) and
(β1%3, β2%3, β3%3) are any of the following: (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1) and (2, 1, 0).
Returning to
Thus, for “1” of area 6201 for which a remainder is 0 in the coefficients of “check equation #1,” in column computation of column 6506 in BP decoding, belief is propagated from “1” of area 6504 for which a remainder is 1 in the coefficients of “check equation #2” and from “1” of area 6505 for which a remainder is 2 in the coefficients of “check equation #3.”
Similarly, for “1” of area 6202 for which a remainder is 1 in the coefficients of “check equation #1,” in column computation of column 6509 in BP decoding, belief is propagated from “1” of area 6507 for which a remainder is 2 in the coefficients of “check equation #2” and from “1” of area 6508 for which a remainder is 0 in the coefficients of “check equation #3.”
Similarly, for “1” of area 6203 for which a remainder is 2 in the coefficients of “check equation #1,” in column computation of column 6512 in BP decoding, belief is propagated from “1” of area 6510 for which a remainder is 0 in the coefficients of “check equation #2” and from “1” of area 6511 for which a remainder is 1 in the coefficients of “check equation #3.”
A supplementary explanation of belief propagation will now be given using
In
As can be seen from
Thus, for “check equation #1,” belief is propagated from coefficients for which remainders after division by 3 are 0, 1, and 2 among coefficients of “check equation #2.” That is to say, for “check equation #1,” belief is propagated from coefficients for which remainders after division by 3 are all different among coefficients of “check equation #2.” Therefore, beliefs with low correlation are all propagated to “check equation #1.”
Similarly, for “check equation #2,” belief is propagated from coefficients for which remainders after division by 3 are 0, 1, and 2 among coefficients of “check equation #1.” That is to say, for “check equation #2,” belief is propagated from coefficients for which remainders after division by 3 are all different among coefficients of “check equation #1.” Also, for “check equation #2,” belief is propagated from coefficients for which remainders after division by 3 are 0, 1, and 2 among coefficients of “check equation #3.” That is to say, for “check equation #2,” belief is propagated from coefficients for which remainders after division by 3 are all different among coefficients of “check equation #3.”
Similarly, for “check equation #3,” belief is propagated from coefficients for which remainders after division by 3 are 0, 1, and 2 among coefficients of “check equation #1.” That is to say, for “check equation #3,” belief is propagated from coefficients for which remainders after division by 3 are all different among coefficients of “check equation #1.” Also, for “check equation #3,” belief is propagated from coefficients for which remainders after division by 3 are 0, 1, and 2 among coefficients of “check equation #2.” That is to say, for “check equation #3,” belief is propagated from coefficients for which remainders after division by 3 are all different among coefficients of “check equation #2.”
By providing for the orders of parity check polynomials of equations 3-1 to 3-3 to satisfy the above condition about “remainder” in this way, belief is necessarily propagated in all column computations, so that it is possible to perform belief propagation efficiently in all check equations and further increase error correction capability.
A case in which the coding rate is 1/2 has been described above for an LDPC-CC of a time varying period of 3, but the coding rate is not limited to 1/2. A regular LDPC code is also formed and good received quality can be achieved when the coding rate is (n−1)/n (where n is an integer equal to or greater than 2) if the above condition about “remainder” holds true for three-coefficient sets in information X1(D), X2(D), . . . , Xn-1(D).
A case in which the coding rate is (n−1)/n (where n is an integer equal to or greater than 2) is described below.
Consider equations 4-1 to 4-3 as parity check polynomials of an LDPC-CC having a time varying period of 3. At this time, X1(D), X2(D), . . . , Xn-1(D) are polynomial representations of data (information) X1, X2, . . . , Xn-1 and P(D) is a polynomial representation of parity. Here, in equations 4-1 to 4-3, parity check polynomials are assumed such that there are three terms in X1(D), X2(D), . . . , Xn-1(D) and P(D), respectively.
[4]
(Da1,1+Da1,2+Da1,3)X1(D)+(Da2,1+Da2,2+Da2,3)X2(D)+ . . . +(Dan-1,1+Dan-1,2+Dan-1,3)Xn-1(D)+(Db1+Db2+Db3)P(D)=0 (Equation 4-1)
(DA1,1+DA1,2+DA1,3)X1(D)+(DA2,1+DA2,2+DA2,3)X2(D)+ . . . +(DAn-1,1+DAn-1,2+DAn-1,3)Xn-1(D)+(DB1+DB2+DB3)P(D)=0 (Equation 4-2)
(Dα1,1+Dα1,2+Dα1,3)X1(D)+(Dα2,1+Dα2,2+Dα2,3)X2(D)+ . . . +(Dαn-1,1+Dαn-1,2+Dαn-1,3)Xn-1(D)+(Dβ1+Dβ2+Dβ3)P(D)=0 (Equation 4-3)+
In equation 4-1, it is assumed that ai,1, ai,2, and ai,3 (where i=1, 2, . . . , n−1) are integers (where ai,1≠ai,2≠ai,3). Also, it is assumed that b1, b2 and b3 are integers (where b1≠b2≠b3). A parity check polynomial of equation 4-1 is called “check equation #1,” and a sub-matrix based on the parity check polynomial of equation 4-1 is designated first sub-matrix H1.
In equation 4-2, it is assumed that Ai,1, Ai,2 and Ai,3 (where i=1, 2, . . . , n−1) are integers (where Ai,1≠Ai,2≠Ai,3). Also, it is assumed that B1, B2 and B3 are integers (where B1≠B2≠B3). A parity check polynomial of equation 4-2 is called “check equation #2,” and a sub-matrix based on the parity check polynomial of equation 4-2 is designated second sub-matrix H2.
In equation 4-3, it is assumed that αi,1, αi,2, and αi,3 (where i=1, 2, . . . , n−1) are integers (where αi,1≠αi,2≠αi,3). Also, it is assumed that β1, β2 and β3 are integers (where β1≠β2≠≠β3). A parity check polynomial of equation 4-3 is called “check equation #3,” and a sub-matrix based on the parity check polynomial of equation 4-3 is designated third sub-matrix H3.
Next, an LDPC-CC of a time varying period of 3 generated from first sub-matrix H1, second sub-matrix H2 and third sub-matrix H3 is considered.
At this time, if k is designated as a remainder after dividing the values of combinations of orders of X1(D), X2(D), . . . , Xn-1(D) and P(D),
(a1,1, a1,2, a1,3),
(a2,1, a2,2, a2,3), . . . ,
(an-1,1, an-1,2, an-1,3),
(b1, b2, b3),
(A1,1, A1,2, A1,3),
(A2,1, A2,2, A2,3), . . . ,
(An-1,1, An-1,2, An-1,3),
(B1, B2, B3),
(α1,1, α1,2, α1,3),
(α2,1, α2,2, α2,3), . . . ,
(αn-1,1, αn-1,2, αn-1,3),
(β1, β2, β3),
in equations 4-1 to 4-3 by 3, provision is made for one each of remainders 0, 1, and 2 to be included in three-coefficient sets represented as shown above (for example, (a1,1, a1,2, a1,3)), and to hold true for all the above three-coefficient sets.
That is to say, provision is made for
(a1,1%3, a1,2%3, a1,3%3),
(a2,1%3, a2,2%3, a2,3%3), . . . ,
(an-1,1%3, an-1,2%3, an-1,3%3),
(b1%3, b2%3, b3%3),
(A1,1%3, A1,2%3, A1,3%3),
(A2,1%3, A2,2%3, A2,3%3), . . . ,
(An-1,1%3, An-1,2%3, An-1,3%3),
(B1%3, B2%3, B3%3),
(α1,1%3, α1,2%3, α1,3%3),
(α2,1%3, α2,2%3, α2,3%3), . . . ,
(an-1,1%3, an-1,2%3, an-1,3%3) and
(β1%3, β2%3, β3%3)
to be any of the following: (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1) and (2, 1, 0).
Generating an LDPC-CC in this way enables a regular LDPC-CC code to be generated. Furthermore, when BP decoding is performed, belief in “check equation #2” and belief in “check equation #3” are propagated accurately to “check equation #1,” belief in “check equation #1” and belief in “check equation #3” are propagated accurately to “check equation #2,” and belief in “check equation #1” and belief in “check equation #2” are propagated accurately to “check equation #3.” Consequently, an LDPC-CC with better received quality can be achieved in the same way as in the case of a coding rate of 1/2.
Table 3 shows examples of LDPC-CCs (LDPC-CCs #1, #2, #3, #4, #5 and #6) of a time varying period of 3 and a coding rate of 1/2 for which the above “remainder” related condition holds true. In table 3, LDPC-CCs of a time varying period of 3 are defined by three parity check polynomials: “check (polynomial) equation #1,” “check (polynomial) equation #2” and “check (polynomial) equation #3.”
Furthermore, Table 4 shows examples of LDPC-CCs of a time varying period 3 and coding rates of 1/2, 2/3, 3/4 and 5/6, and Table 5 shows examples of LDPC-CCs of a time varying period 3 and coding rates of 1/2, 2/3, 3/4 and 4/5.
It has been confirmed that, as in the case of a time varying period of 3, a code with good characteristics can be found if the condition about “remainder” below is applied to an LDPC-CC having a time varying period of a multiple of 3 (for example, 6, 9, 12, . . . ). An LDPC-CC of a multiple of a time varying period of 3 with good characteristics is described below. The case of an LDPC-CC of a coding rate of 1/2 and a time varying period of 6 is described below as an example.
Consider equations 5-1 to 5-6 as parity check polynomials of an LDPC-CC having a time varying period of 6.
[5]
(Da1,1+Da1,2+Da1,3)X(D)+(Db1,1+Db1,2+Db1,3)P(D)=0 (Equation 5-1)
(Da2,1+Da2,2+Da2,3)X(D)+(Db2,1+Db2,2+Db2,3)P(D)=0 (Equation 5-2)
(Da3,1+Da3,2+Da3,3)X(D)+(Db3,1+Db3,2+Db3,3)P(D)=0 (Equation 5-3)
(Da4,1+Da4,2+Da4,3)X(D)+(Db4,1+Db4,2+Db4,3)P(D)=0 (Equation 5-4)
(Da5,1+Da5,2+Da5,3)X(D)+(Db5,1+Db5,2+Db5,3)P(D)=0 (Equation 5-5)
(Da6,1+Da6,2+Da6,3)X(D)+(Db6,1+Db6,2+Db6,3)P(D)=0 (Equation 5-6)
At this time, X(D) is a polynomial representation of data (information) and P(D) is a parity polynomial representation.
With an LDPC-CC of a time varying period of 6, if i%6=k (where k=0, 1, 2, 3, 4, 5) is assumed for parity Pi and information Xi at point in time i, a parity check polynomial of equation 5-(k+1) holds true. For example, if i=1, i%6=1 (k=1), equation 6 holds true.
[6]
(Da2,1+Da2,2+Da2,3)X1(D)+(Db2,1+Db2,2+Db2,3)P1=0 (Equation 6)
Here, in equations 5-1 to 5-6, parity check polynomials are assumed such that there are three terms in X(D) and P(D), respectively.
In equation 5-1, it is assumed that a1, 1, a1,2, a1,3 are integers (where a1, 1≠a1, 2≠a1, 3). Also, it is assumed that b1,1, b1,2, and b1,3 are integers (where b1, 1≠b1, 2≠b1,3). A parity check polynomial of equation 5-1 is called “check equation #1,” and a sub-matrix based on the parity check polynomial of equation 5-1 is designated first sub-matrix H1.
In equation 5-2, it is assumed that a2,1, a2,2, and a2,3 are integers (where a2, 1≠a2, 2≠a2,3). Also, it is assumed that b2,1, b2,2, and b2,3 are integers (where b2, 1≠b2, 2≠b2,3). A parity check polynomial of equation 5-2 is called “check equation #2,” and a sub-matrix based on the parity check polynomial of equation 5-2 is designated second sub-matrix H2.
In equation 5-3, it is assumed that a3,1, a3,2, and a3,3 are integers (where a3,1≠a3,2≠a3,3). Also, it is assumed that b3,1, b3,2, and b3,3 are integers (where b3,1≠b3,2≠b3,3). A parity check polynomial of equation 5-3 is called “check equation #3,” and a sub-matrix based on the parity check polynomial of equation 5-3 is designated third sub-matrix H3.
In equation 5-4, it is assumed that a4,1, a4,2, and a4,3 are integers (where a4,1≠a4,2≠a4,3). Also, it is assumed that b4,1, b4,2, and b4,3 are integers (where b4,1≠b4,2≠b4,3). A parity check polynomial of equation 5-4 is called “check equation #4,” and a sub-matrix based on the parity check polynomial of equation 5-4 is designated fourth sub-matrix H4.
In equation 5-5, it is assumed that a5,1, a5,2, and a5,3 are integers (where a5,1≠a5,2≠a5,3). Also, it is assumed that b5,1, b5,2, and b5,3 are integers (where b5,1≠b5,2≠b5,3). A parity check polynomial of equation 5-5 is called “check equation #5,” and a sub-matrix based on the parity check polynomial of equation 5-5 is designated fifth sub-matrix H5.
In equation 5-6, it is assumed that a6,1, a6,2, and a6,3 are integers (where a6,1≠a6,2≠a6,3). Also, it is assumed that b6,1, b6,2, and b6,3 are integers (where b6,1≠b6,2≠b6,3). A parity check polynomial of equation 5-6 is called “check equation #6,” and a sub-matrix based on the parity check polynomial of equation 5-6 is designated sixth sub-matrix H6.
Next, an LDPC-CC of a time varying period of 6 is considered that is generated from first sub-matrix H1, second sub-matrix H2, third sub-matrix H3, fourth sub-matrix H4, fifth sub-matrix H5 and sixth sub-matrix H6.
At this time, if k is designated as a remainder after dividing the values of combinations of orders of X(D) and P(D),
(a1,1, a1,2, a1,3),
(b1,1, b1,2, b1,3),
(a2,1, a2,2, a2,3),
(b2,1, b2,2, b2,3),
(a3,1, a3,2, a3,3),
(b3,1, b3,2, b3,3),
(a4,1, a4,2, a4,3),
(b4,1, b4,2, b4,3),
(a5,1, a5,2, a5,3),
(b5,1, b5,2, b5,3),
(a6,1, a6,2, a6,3),
(b6,1, b6,2, b6,3), in equations 5-1 to 5-6 by 3, provision is made for one each of remainders 0, 1, and 2 to be included in three-coefficient sets represented as shown above (for example, (a1,1, a1,2, a1,3)), and to hold true for all the above three-coefficient sets. That is to say, provision is made for
(a1,1%3, a1,2%3, a1,3%3),
(b1,1%3, b1,2%3, b1,3%3),
(a2,1%3, a2,2%3, a2,3%3),
(b2,1%3, b2,2%3, b2,3%3),
(a3,1%3, a3,2%3, a3,3%3),
(b3,1%3, b3,2%3, b3,3%3),
(a4,1%3, a4,2%3, a4,3%3),
(b4,1%3, b4,2%3, b4,3%3),
(a5,1%3, a5,2%3, a5,3%3),
(b5,1%3, b5,2%3, b5,3%3),
(a6,1%3, a6,2%3, a6,3%3) and
(b6,1%3, b6,2%3, b6,3%3) to be any of the following: (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1) and (2, 1, 0).
By generating an LDPC-CC in this way, if an edge is present when a Tanner graph is drawn for “check equation #1,” belief in “check equation #2 or check equation #5” and belief in “check equation #3 or check equation #6” are propagated accurately.
Also, if an edge is present when a Tanner graph is drawn for “check equation #2,” belief in “check equation #1 or check equation #4” and belief in “check equation #3 or check equation #6” are propagated accurately.
If an edge is present when a Tanner graph is drawn for “check equation #3,” belief in “check equation #1 or check equation #4” and belief in “check equation #2 or check equation #5” are propagated accurately. If an edge is present when a Tanner graph is drawn for “check equation #4,” belief in “check equation #2 or check equation #5” and belief in “check equation #3 or check equation #6” are propagated accurately.
If an edge is present when a Tanner graph is drawn for “check equation #5,” belief in “check equation #1 or check equation #4” and belief in “check equation #3 or check equation #6” are propagated accurately. If an edge is present when a Tanner graph is drawn for “check equation #6,” belief in “check equation #1 or check equation #4” and belief in “check equation #2 or check equation #5” are propagated accurately.
Consequently, an LDPC-CC of a time varying period of 6 can maintain better error correction capability in the same way as when the time varying period is 3.
In this regard, belief propagation will be described using
A circle indicates a coefficient for which a remainder after division by 3 in ax, y (where x=1, 2, 3, 4, 5, 6, and y=1, 2, 3) is 1. A diamond-shaped box indicates a coefficient for which a remainder after division by 3 in ax, y (where x=1, 2, 3, 4, 5, 6, and y=1, 2, 3) is 2.
As can be seen from
Similarly, if an edge is present when a Tanner graph is drawn, for a1,3 of “check equation #1,” belief is propagated from “check equation #2 or #5” and “check equation #3 or #6” for which remainders after division by 3 differ. While
Thus, belief is propagated to each node in a Tanner graph of “check equation #1” from coefficient nodes of other than “check equation #1.” Therefore, beliefs with low correlation are all propagated to “check equation #1,” enabling an improvement in error correction capability to be expected.
In
By providing for the orders of parity check polynomials of equations 5-1 to 5-6 to satisfy the above condition about “remainder” in this way, belief can be propagated efficiently in all check equations, and the possibility of being able to further improve error correction capability is increased.
A case in which the coding rate is 1/2 has been described above for an LDPC-CC of a time varying period of 6, but the coding rate is not limited to 1/2. The possibility of achieving good received quality can be increased when the coding rate is (n−1)/n (where n is an integer equal to or greater than 2) if the above condition about “remainder” holds true for three-coefficient sets in information X1(D), X2(D), . . . , Xn-1(D).
A case in which the coding rate is (n−1)/n (where n is an integer equal to or greater than 2) is described below.
Consider equations 7-1 to 7-6 as parity check polynomials of an LDPC-CC having a time varying period of 6.
[7]
(Da#1,1,1+Da#1,1,2+Da#1,1,3)X1(D)+(Da#1,2,1+Da#1,2,2+Da#1,2,3)X2(D)+ . . . +(Da#1,n-1,1+Da#1,n-1,2+Da#1,n-1,3)Xn-1(D)+(Db#1,1+Db#1,2+Db#1,3)P(D)=0 (Equation 7-1)
(Da#2,1,1+Da#2,1,2+Da#2,1,3)X1(D)+(Da#2,2,1+Da#2,2,2+Da#2,2,3)X2(D)+ . . . +(Da#2,n-1,1+Da#2,n-1,2+Da#2,n-1,3)Xn-1(D)+(Db#2,1+Db#2,2+Db#2,3)P(D)=0 (Equation 7-2)
(Da#3,1,1+Da#3,1,2+Da#3,1,3)X1(D)+(Da#3,2,1+Da#3,2,2+Da#3,2,3)X2(D)+ . . . +(Da#3,n-1,1+Da#3,n-1,2+Da#3,n-1,3)Xn-1(D)+(Db#3,1+Db#3,2+Db#3,3)P(D)=0 (Equation 7-3)
(Da#4,1,1+Da#4,1,2+Da#4,1,3)X1(D)+(Da#4,2,1+Da#4,2,2+Da#4,2,3)X2(D)+ . . . +(Da#4,n-1,1+Da#4,n-1,2+Da#4,n-1,3)Xn-1(D)+(Db#4,1+Db#4,2+Db#4,3)P(D)=0 (Equation 7-4)
(Da#5,1,1+Da#5,1,2+Da#5,1,3)X1(D)+(Da#5,2,1+Da#5,2,2+Da#5,2,3)X2(D)+ . . . +(Da#5,n-1,1+Da#5,n-1,2+Da#5,n-1,3)Xn-1(D)+(Db#5,1+Db#5,2+Db#5,3)P(D)=0 (Equation 7-5)
(Da#6,1,1+Da#6,1,2+Da#6,1,3)X1(D)+(Da#6,2,1+Da#6,2,2+Da#6,2,3)X2(D)+ . . . +(Da#6,n-1,1+Da#6,n-1,2+Da#6,n-1,3)Xn-1(D)+(Db#6,1+Db#6,2+Db#6,3)P(D)=0 (Equation 7-6)
At this time, X1(D), X2(D), . . . , Xn-1(D) are polynomial representations of data (information) X1, X2, . . . , Xn-1 and P(D) is a polynomial representation of parity. Here, in equations 7-1 to 7-6, parity check polynomials are assumed such that there are three terms in X1(D), X2(D), . . . , Xn-1(D) and P(D), respectively. As in the case of the above coding rate of 1/2, and in the case of a time varying period of 3, the possibility of being able to achieve higher error correction capability is increased if the condition below (<Condition #1>) is satisfied in an LDPC-CC of a time varying period of 6 and a coding rate of (n−1)/n (where n is an integer equal to or greater than 2) represented by parity check polynomials of equations 7-1 to 7-6.
In an LDPC-CC of a time varying period of 6 and a coding rate of (n−1)/n (where n is an integer equal to or greater than 2), the parity bit and information bits at point in time i are represented by Pi and Xi,1, Xi,2, . . . , Xi,n-1, respectively. If i%6=k (where k=0, 1, 2, 3, 4, 5) is assumed at this time, a parity check polynomial of equation 7-(k+1) holds true. For example, if i=8, i%6=2 (k=2), equation 8 holds true.
[8]
(Da#3,1,1+Da#3,1,2+Da#3,1,3)X8,1(D)+(Da#3,2,1+Da#3,2,2+Da#3,2,3)X8,2(D)+ . . . +(Da#3,n-1,1+Da#3,n-1,2+Da#3,n-1,3)X8,n-1(D)+(Db#3,1+Db#3,2+Db#3,3)P8=0 (Equation 8)
<Condition #1>
In equations 7-1 to 7-6, combinations of orders of X1(D), X2(D), . . . , Xn−1(D) and P(D) satisfy the following condition:
(a#1,1,1%3, a#1,1,2%3, a#1,1,3%3),
(a#1,2,1%3, a#1,2,2%3, a#1,2,3%3), . . . ,
(a#1,k,1%3, a#1,k,2%3, a#1,k,3%3), . . . ,
(a#1,n-1,1%3, a#1,n-1,2%3, a#1,n-1,3%3) and
(b#1,1%3, b#1,2%3, b#1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where k=1, 2, 3, . . . , n−1);
(a#2,1,1%3, a#2,1,2%3, a#2,1,3%3),
(a#2,2,1%3, a#2,2,2%3, a#2,2,3%3), . . . ,
(a#2,k,1%3, a#2,k,2%3, a#2,k,3%3), . . . ,
(a#2,n-1,1%3, a#2,n-1,2%3, a#2,n-1,3%3) and
(b#2,1%3, b#2,2%3, b#2,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where k=1, 2, 3, . . . , n−1);
(a#3,1,1%3, a#3,1,2%3, a#3,1,3%3),
(a#3,2,1%3, a#3,2,2%3, a#3,2,3%3), . . . ,
(a#3,k,1%3, a#3,k,2%3, a#3,k,3%3), . . . ,
(a#3,n-1,1%3, a#3,n-1,2%3, a#3,n-1,3%3) and
(b#3,1%3, b#3,2%3, b#3,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where k=1, 2, 3, . . . , n−1);
(a#4,1,1%3, a#4,1,2%3, a#4,1,3%3),
(a#4,2,1%3, a#4,2,2%3, a#4,2,3%3), . . . ,
(a#4,k,1%3, a#4,k,2%3, a#4,k,3%3), . . . ,
(a#4,n-1,1%3, a#4,n-1,2%3, a#4,n-1,3%3) and
(b#4,1%3, b#4,2%3, b#4,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where k=1, 2, 3, . . . , n−1);
(a#5,1,1%3, a#5,1,2%3, a#5,1,3%3),
(a#5,2,1%3, a#5,2,2%3, a#5,2,3%3), . . . ,
(a#5,k,1%3, a#5,k,2%3, a#5,k,3%3), . . . ,
(a#5,n-1,1%3, a#5,n-1,2%3, a#5,n-1,3%3) and
(b#5,1%3, b#5,2%3, b#5,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where k=1, 2, 3, . . . , n−1); and
(a#6,1,1%3, a#6,1,2%3, a#6,1,3%3),
(a#6,2,1%3, a#6,2,2%3, a#6,2,3%3), . . . ,
(a#6,k,1%3, a#6,k,2%3, a#6,k,3%3), . . . ,
(a#6,n-1,1%3, a#6,n-1,2%3, a#6,n-1,3%3) and
(b#6,1%3, b#6,2%3, b#6,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where k=1, 2, 3, . . . , n−1).
In the above description, a code having high error correction capability has been described for an LDPC-CC of a time varying period of 6, but a code having high error correction capability can also be generated when an LDPC-CC of a time varying period of 3g (where g=1, 2, 3, 4, . . . ) (that is, an LDPC-CC having a time varying period of a multiple of 3) is created in the same way as with the design method for an LDPC-CC of a time varying period of 3 or 6. A configuration method for this code is described in detail below.
Consider equations 9-1 to 9-3g as parity check polynomials of an LDPC-CC having a time varying period of 3g (where g=1, 2, 3, 4, . . . ) and the coding rate is (n−1)/n (where n is an integer equal to or greater than 2).
At this time, X1(D), X2(D), . . . , Xn-1(D) are polynomial representations of data (information) X1, X2, . . . , Xn-1 and P(D) is a polynomial representation of parity. Here, in equations 9-1 to 9-3g, parity check polynomials are assumed such that there are three terms in X1(D), X2(D), . . . , Xn-1(D) and P(D), respectively.
As in the case of an LDPC-CC of a time varying period of 3 and an LDPC-CC of a time varying period of 6, the possibility of being able to achieve higher error correction capability is increased if the condition below (<Condition #2>) is satisfied in an LDPC-CC of a time varying period of 3g and a coding rate of (n−1)/n (where n is an integer equal to or greater than 2) represented by parity check polynomials of equations 9-1 to 9-3g.
In an LDPC-CC of a time varying period of 3g and a coding rate of (n−1)/n (where n is an integer equal to or greater than 2), the parity bit and information bits at point in time i are represented by Pi and Xi,1, Xi,2, . . . , Xi,n-1, respectively.
If i%3g=k (where k=0, 1, 2, . . . , 3g−1) is assumed at this time, a parity check polynomial of equation 9-(k+1) holds true. For example, if i=2, i%3g=2 (k=2), equation 10 holds true.
[10]
(Da#3,1,1+Da#3,1,2+Da#3,1,3)X2,1(D)+(Da#3,2,1+Da#3,2,2+Da#3,2,3)X2,2(D)+ . . . +(Da#3,n-1,1+Da#3,n-1,2+Da#3,n-1,3)X2,n-1(D)+(Db#3,1+Db#3,2+Db#3,3)P2=0 (Equation 10)
In equations 9-1 to 9-3g, it is assumed that a#k,p,1, a#k,p,2 and a#k,p,3 are integers (where a#k,p,1≠a#k,p,2≠a#k,p,3) (where k=1, 2, 3, . . . , 3g, and p=1, 2, 3, . . . , n−1). Also, it is assumed that b#k,1, b#k,2 and b#k,3 are integers (where b#k,1≠b#k,2≠b#k,3). A parity check polynomial of equation 9-k (where k=1, 2, 3, . . . , 3g) is called “check equation #k,” and a sub-matrix based on the parity check polynomial of equation 9-k is designated k-th sub-matrix Hk. Next, an LDPC-CC of a time varying period of 3g is considered that is generated from first sub-matrix H1, second sub-matrix H2, third sub-matrix H3, . . . , and 3g-th sub-matrix H3g.
<Condition #2>
In equations 9-1 to 9-3g, combinations of orders of X1(D), X2(D), . . . , Xn-1(D) and P(D) satisfy the following condition:
(a#1,1,1%3, a#1,1,2%3, a#1,1,3%3),
(a#1,2,1%3, a#1,2,2%3, a#1,2,3%3), . . . ,
(a#1,p,1%3, a#1,p,2%3, a#1,p,3%3), . . . ,
(a#1,n-1,1%3, a#1,n-1,2%3, a#1,n-1,3%3) and
(b#1,1%3, b#1,2%3, b#1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where p=1, 2, 3, . . . , n−1);
(a#2,1,1%3, a#2,1,2%3, a#2,1,3%3),
(a#2,2,1%3, a#2,2,2%3, a#2,2,3%3), . . . ,
(a#2,p,1%3, a#2,p,2%3, a#2,p,3%3), . . . ,
(a#2,n-1,1%3, a#2,n-1,2%3, a#2,n-1,3%3) and
(b#2,1%3, b#2,2%3, b#2,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where p=1, 2, 3, . . . , n−1);
(a#3,1,1%3, a#3,1,2%3, a#3,1,3%3),
(a#3,2,1%3, a#3,2,2%3, a#3,2,3%3), . . . ,
(a#3,p,1%3, a#3,p,2%3, a#3,p,3%3), . . . ,
(a#3,n-1,1%3, a#3,n-1,2%3, a#3,n-1,3%3) and
(b#3,1%3, b#3,2%3, b#3,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where p=1, 2, 3, . . . , n−1);
(a#k,1,1%3, a#k,1,2%3, a#k,1,3%3),
(a#k,2,1%3, a#k,2,2%3, a#k,2,3%3), . . . ,
(a#k,p,1%3, a#k,p,2%3, a#k,p,3%3), . . . ,
(a#k,n-1,1%3, a#k,n-1,2%3, a#k,n-1,3%3) and
(b#k,1%3, b#k,2%3, b#k,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where p=1, 2, 3, . . . , n−1) (where k=1, 2, 3, . . . , 3g);
(a#3g-2,1,1%3, a#3g-2,1,2%3, a#3g-2,1,3%3),
(a#3g-2,2,1%3, a#3g-2,2,2%3, a#3g-2,2,3%3), . . . ,
(a#3g-2,p,1%3, a#3g-2,p,2%3, a#3g-2,p,3%3), . . . ,
(a#3g-2,n-1,1%3, a#3g-2,n-1,2%3, a#3g-2,n-1,3%3), and
(b#3g-2,1%3, b#3g-2,2%3, b#3g-2,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where p=1, 2, 3, . . . , n−1);
(a#3g-1,1,1%3, a#3g-1,1,2%3, a#3g-1,1,3%3),
(a#3g-1,2,1%3, a#3g-1,2,2%3, a#3g-1,2,3%3), . . . ,
(a#3g-1,p,3%3, a#3g-1,p,3%3, a#3g-1,p,3%3), . . . ,
(a#3g-1,n-1,1%3, a#3g-1,n-1,2%3, a#3g-1,n-1,3%3) and
(b#3g-1,1%3, b#3g-1,2%3, b#3g-1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where p=1, 2, 3, . . . , n−1); and
(a#3g,1,1%3, a#3g,1,2%3, a#3g,1,3%3),
(a#3g,2,1%3, a#3g,2,2%3, a#3g,2,3%3), . . . ,
(a#3g,p,1%3, a#3g,p,2%3, a#3g,p,3%3), . . . ,
(a#3g,n-1,1%3, a#3g,n-1,2%3, a#3g,n-1,3%3) and
(b#3g,1%3, b#3g,2%3, b#3g,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where p=1, 2, 3, . . . , n−1).
Taking ease of performing encoding into consideration, it is desirable for one “0” to be present among the three items (b#k,1%3, b#k,2%3, b#k,3%3) (where k=1, 2, . . . 3g) in equations 9-1 to 9-3g. This is because of a feature that, if D0=1 holds true and b#k,1, b#k,2 and b#k,3 are integers equal to or greater than 0 at this time, parity P can be found sequentially.
Also, in order to provide relevancy between parity bits and data bits of the same point in time, and to facilitate a search for a code having high correction capability, it is desirable for:
one “0” to be present among the three items (a#k,1,1%3, a#k,1,2%3, a#k,1,3%3);
one “0” to be present among the three items (a#k,2,1%3, a#k,2,2%3, a#k,2,3%3);
one “0” to be present among the three items (a#k,p,1%3, a#k,p,2%3, a#k,p,3%3);
one “0” to be present among the three items (a#k,n-1,1%3, a#k,n-1,2%3, a#k,n-1,3%3), (where k=1, 2, . . . , 3g).
Next, an LDPC-CC of a time varying period of 3g (where g=2, 3, 4, 5, . . . ) that takes ease of encoding into account is considered. At this time, if the coding rate is (n−1)/n (where n is an integer equal to or greater than 2), LDPC-CC parity check polynomials can be represented as shown below.
At this time, X1(D), X2(D), . . . , Xn-1(D) are polynomial representations of data (information) X1, X2, . . . , Xn-1 and P(D) is a polynomial representation of parity. Here, in equations 11-1 to 11-3g, parity check polynomials are assumed such that there are three terms in X1(D), X2(D), . . . , Xn-1(D) and P(D), respectively. In an LDPC-CC of a time varying period of 3g and a coding rate of (n−1)/n (where n is an integer equal to or greater than 2), the parity bit and information bits at point in time i are represented by Pi and Xi,1, Xi,2, . . . , Xi,n-1, respectively. If i%3g=k (where k=0, 1, 2, . . . , 3g−1) is assumed at this time, a parity check polynomial of equation 11-(k+1) holds true. For example, if i=2, i%3=2 (k=2), equation 12 holds true.
[12]
(Da#3,1,1+Da#3,1,2+Da#3,1,3)X2,1(D)+(Da#3,2,1+Da#3,2,2+Da#3,2,3)X2,2(D)+ . . . +(Da#3,n-1,1+Da#3,n-1,2+Da#3,n-1,3)X2,n-1(D)+(Db#3,1+Db#3,2+Db#3,3)P2=0 (Equation 12)
If <Condition #3> and <Condition #4> are satisfied at this time, the possibility of being able to create a code having higher error correction capability is increased.
<Condition #3>
In equations 11-1 to 11-3g, combinations of orders of X1(D), X2(D), . . . , Xn-1(D) and P(D) satisfy the following condition:
(a#1,1,1%3, a#1,1,2%3, a#1,1,3%3),
(a#1,2,1%3, a#1,2,2%3, a#1,2,3%3), . . . ,
(a#1,p,1%3, a#1,p,2%3, a#1,p,3%3), . . . , and
(a#1,n-1,1%3, a#1,n-1,2%3, a#1,n-1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where p=1, 2, 3, . . . , n−1);
(a#2,1,1%3, a#2,1,2%3, a#2,1,3%3),
(a#2,2,1%3, a#2,2,2%3, a#2,2,3%3), . . . ,
(a#2,p,1%3, a#2,p,2%3, a#2,p,3%3), . . . , and
(a#2,n-1,1%3, a#2,n-1,2%3, a#2,n-1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where p=1, 2, 3, . . . , n−1);
(a#3,1,1%3, a#3,1,2%3, a#3,1,3%3),
(a#3,2,1%3, a#3,2,2%3, a#3,2,3%3), . . . ,
(a#3,p,1%3, a#3,p,2%3, a#3,p,3%3), . . . , and
(a#3,n-1,1%3, a#3,n-1,2%3, a#3,n-1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where p=1, 2, 3, . . . , n−1);
(a#k,1,1%3, a#k,1,2%3, a#k,1,3%3),
(a#k,2,1%3, a#k,2,2%3, a#k,2,3%3), . . . ,
(a#k,p,1%3, a#k,p,2%3, a#k,p,3%3), . . . , and
(a#k,n-1,1%3, a#k,n-1,2%3, a#k,n-1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where p=1, 2, 3, . . . , n−1, and k=1, 2, 3, . . . , 3g);
(a#3g-2,1,1%3, a#3g-2,1,2%3, a#3g-2,1,3%3),
(a#3g-2,2,1%3, a#3g-2,2,2%3, a#3g-2,2,3%3), . . . ,
(a#3g-2,p,1%3, a#3g-2,p,2%3, a#3g-2,p,3%3), . . . , and
(a#3g-2,n-1,1%3, a#3g-2,n-1,2%3, a#3g-2,n-1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where p=1, 2, 3, . . . , n−1);
(a#3g-1,1,1%3, a#3g-1,1,2%3, a#3g-1,1,3%3),
(a#3g-1,2,1%3, a#3g-1,2,2%3, a#3g-1,2,3%3), . . . ,
(a#3g-1,p,1%3, a#3g-1,p,2%3, a#3g-1,p,3%3), . . . , and
(a#3g-1,n-1,1%3, a#3g-1,n-1,2%3, a#3g-1,n-1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where p=1, 2, 3, . . . , n−1); and
(a#3g,1,1%3, a#3g,1,2%3, a#3g,1,3%3),
(a#3g,2,1%3, a#3g,2,2%3, a#3g,2,3%3), . . . ,
(a#3g,p,1%3, a#3g,p,2%3, a#3g,p,3%3), . . . , and
(a#3g,n-1,1%3, a#3g,n-1,2%3, a#3g,n-1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where p=1, 2, 3, . . . , n−1).
In addition, in equations 11-1 to 11-3g, combinations of orders of P(D) satisfy the following condition:
(b#1,1%3, b#1,2%3),
(b#2,1%3, b#2,2%3),
(b#3,1%3, b#3,2%3), . . . ,
(b#k,1%3, b#k,2%3), . . . ,
(b#3g-2,1%3, b#3g-2,2%3),
(b#3g-1,1%3, b#3g-1,2%3), and
(b#3g,1%3, b#3g,2%3) are either (1, 2) or (2, 1) (where k=1, 2, 3, . . . , 3g).
<Condition #3> has a similar relationship with respect to equations 11-1 to 11-3g as <Condition #2> has with respect to equations 9-1 to 9-3g. If the condition below (<Condition #4>) is added for equations 11-1 to 11-3g in addition to <Condition #3>, the possibility of being able to create an LDPC-CC having higher error correction capability is increased.
<Condition #4>
Orders of P(D) of equations 11-1 to 11-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the values of 6g orders of
(b#1,1%3g, b#1,2%3g),
(b#2,1%3g, b#2,2%3g),
(b#3,1%3g, b#3,2%3g), . . . ,
(b#k,1%3g, b#k,2%3g), . . . ,
(b#3g-2,1%3g, b#3g-2,2%3g),
(b#3g-1,1%3g, b#3g-1,2%3g),
(b#3g,1%3g, b#3g,2%3g) (in this case, two orders form a pair, and therefore the number of orders forming 3g pairs is 6g).
The possibility of achieving good error correction capability is high if there is also randomness while regularity is maintained for positions at which “1”s are present in a parity check matrix. With an LDPC-CC having a time varying period of 3g (where g=2, 3, 4, 5, . . . ) and the coding rate is (n−1)/n (where n is an integer equal to or greater than 2) that has parity check polynomials of equations 11-1 to 11-3g, if a code is created in which <Condition #4> is applied in addition to <Condition #3>, it is possible to provide randomness while maintaining regularity for positions at which “1”s are present in a parity check matrix, and therefore the possibility of achieving good error correction capability is increased.
Next, an LDPC-CC of a time varying period of 3g (where g=2, 3, 4, 5, . . . ) is considered that enables encoding to be performed easily and provides relevancy to parity bits and data bits of the same point in time. At this time, if the coding rate is (n−1)/n (where n is an integer equal to or greater than 2), LDPC-CC parity check polynomials can be represented as shown below.
At this time, X1(D), X2(D), . . . , Xn-1(D) are polynomial representations of data (information) X1, X2, . . . , Xn-1 and P(D) is a polynomial representation of parity. In equations 13-1 to 13-3g, parity check polynomials are assumed such that there are three terms in X1(D), X2(D), . . . , Xn-1(D) and P(D), respectively, and term D0 is present in X1(D), X2(D), . . . , Xn-1(D) and P(D) (where k=1, 2, 3, . . . , 3g).
In an LDPC-CC of a time varying period of 3g and a coding rate of (n−1)/n (where n is an integer equal to or greater than 2), the parity bit and information bits at point in time i are represented by Pi and Xi,1, Xi,2, . . . , Xi,n-1, respectively. If i%3g=k (where k=0, 1, 2, . . . 3g−1) is assumed at this time, a parity check polynomial of equation 13-(k+1) holds true. For example, if i=2, i%3g=2 (k=2), equation 14 holds true.
[14]
(Da#3,1,1+Da#3,1,2+Da#3,1,3)X2,1(D)+(Da#3,2,1+Da#3,2,2+Da#3,2,3)X2,2(D)+ . . . +(Da#3,n-1,1+Da#3,n-1,2+Da#3,n-1,3)X2,n-1(D)+(Db#3,1+Db#3,2+Db#3,3)P2=0 (Equation 14)
If following <Condition #5> and <Condition #6> are satisfied at this time, the possibility of being able to create a code having higher error correction capability is increased
<Condition #5>
In equations 13-1 to 13-3g, combinations of orders of X1(D), X2(D), Xn-1(D) and P(D) satisfy the following condition:
(a#1,1,1%3, a#1,1,2%3),
(a#1,2,1%3, a#1,2,2%3), . . . ,
(a#1,p,1%3, a#1,p,2%3), . . . , and
(a#1,n-1,1%3, a#1,n-1,2%3) are any of (1, 2), (2, 1) (p=1, 2, 3, . . . , n−1);
(a#2,1,1%3, a#2,1,2%3),
(a#2,2,1%3, a#2,2,2%3), . . . ,
(a#2,p,1%3, a#2,p,2%3), . . . , and
(a#2,n-1,1%3, a#2,n-1,2%3) are either (1, 2) or (2, 1) (where p=1, 2, 3, . . . , n−1);
(a#3,1,1%3, a#3,1,2%3),
(a#3,2,1%3, a#3,2,2%3), . . . ,
(a#3,p,1%3, a#3,p,2%3), . . . , and
(a#3,n-1,1%3, a#3,n-1,2%3) are either (1, 2) or (2, 1) (where p=1, 2, 3, . . . , n−1);
(a#k,1,1%3, a#k,1,2%3),
(a#k,2,1%3, a#k,2,2%3), . . . ,
(a#k,p,1%3, a#k,p,2%3), . . . , and
(a#k,n-1,1%3, a#k,n-1,2%3) are either (1, 2) or (2, 1) (where p=1, 2, 3, . . . , n−1) (where k=1, 2, 3, . . . , 3g)
(a#3g-2,1,1%3, a#3g-2,1,2%3),
(a#3g-2,2,1%3, a#3g-2,2,2%3), . . . ,
(a#3g-2,p,1%3, a#3g-2,p,2%3), . . . , and
(a#3g-2,n-1,1%3, a#3g-2,n-1,2%3) are either (1, 2) or (2, 1) (where p=1, 2, 3, . . . , n−1);
(a#3g-1,1,1%3, a#3g-1,1,2%3),
(a#3g-1,2,1%3, a#3g-1,2,2%3), . . . ,
(a#3g-1,p,1%3, a#3g-1,p,2%3), . . . , and
(a#3g-1,n-1,1%3, a#3g-1,n-1,2%3) are either (1, 2) or (2, 1) (where p=1, 2, 3, . . . , n−1); and
(a#3g,1,1%3, a#3g,1,2%3),
(a#3g,2,1%3, a#3g,2,2%3), . . . ,
(a#3g,p,1%3, a#3g,p,2%3), . . . , and
(a#3g,n-1,1%3, a#3g,n-1,2%3) are either (1, 2) or (2, 1) (where p=1, 2, 3, . . . , n−1).
In addition, in equations 13-1 to 13-3g, combinations of orders of P(D) satisfy the following condition:
(b#1,1%3, b#1,2%3),
(b#2,1%3, b#2,2%3),
(b#3,1%3, b#3,2%3), . . . ,
(b#k,1%3, b#k,2%3), . . . ,
(b#3g-2,1%3, b#3g-2,2%3),
(b#3g-1,1%3, b#3g-1,2%3), and
(b#3g,1%3, b#3g,2%3) are either (1, 2) or (2, 1) (where k=1, 2, 3, . . . , 3g).
<Condition #5> has a similar relationship with respect to equations 13-1 to 13-3g as <Condition #2> has with respect to equations 9-1 to 9-3g. If the condition below (<Condition #6>) is added for equations 13-1 to 13-3g in addition to <Condition #5>, the possibility of being able to create a code having high error correction capability is increased.
<Condition #6>
Orders of X1(D) of equations 13-1 to 13-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(a#4,1,1%3g, a#1,1,2%3g),
(a#2,1,1%3g, a#2,1,2%3g), . . . ,
(a#p,1,1%3g, a#p,1,2%3g), . . . , and
(a#3g,1,1%3g, a#3g,1,2%3g) (where p=1, 2, 3, . . . , 3g);
Orders of X2(D) of equations 13-1 to 13-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(a#1,2,1%3g, a#1,2,2%3g),
(a#2,2,1%3g, a#2,2,2%3g), . . . ,
(a#p,2,1%3g, a#p,2,2%3g), . . . , and
(a#3g,2,1%3g, a#3g,2,2%3g) (where p=1, 2, 3, . . . , 3g);
Orders of X3(D) of equations 13-1 to 13-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(a#1,3,1%3g, a#1,3,2%3g),
(a#2,3,1%3g, a#2,3,2%3g), . . . ,
(a#p,3,1%3g, a#p,3,2%3g), . . . , and
(a#3g,3,1%3g, a#3g,3,2%3g) (where p=1, 2, 3, . . . , 3g);
Orders of Xk(D) of equations 13-1 to 13-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(a1,k,1%3g, a#1,k,2%3g),
(a#2,k,1%3g, a#2,k,2%3g),
(a#p,k,1%3g, a#p,k,2%3g), . . . , and
(a#3g,k,1%3g, a#3g,k,2%3g) (where p=1, 2, 3, . . . , 3g, and k=1, 2, 3, . . . , n−1);
Orders of Xn−1(D) of equations 13-1 to 13-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(a#1,n-1,1%3g, a#1,n-1,2%3g),
(a#2,n-1,1%3g, a#2,n-1,2%3g), . . . ,
(a#p,n-1,1%3g, a#p,n-1,2%3g), . . . , and
(a#3g,n-1,1%3g, a#3g,n-1,2%3g) (where p=1, 2, 3, . . . , 3g); and
Orders of P(D) of equations 13-1 to 13-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(b#1,1%3g, b#1,2%3g),
(b#2,1%3g, b#2,2%3g),
(b#3,1%3g, b#3,2%3g), . . . ,
(b#k,1%3g, b#k,2%3g), . . . ,
(b#3g-2,1%3g, b#3g-2,2%3g),
(b#3g-1,1%3g, b#3g-1,2%3g) and
(b#3g,1%3g, b#3g,2%3g) (where k=1, 2, 3, . . . , n−1).
The possibility of achieving good error correction capability is high if there is also randomness while regularity is maintained for positions at which “1”s are present in a parity check matrix. With an LDPC-CC having a time varying period of 3g (where g=2, 3, 4, 5, . . . ) and the coding rate is (n−1)/n (where n is an integer equal to or greater than 2) that has parity check polynomials of equations 13-1 to 13-3g, if a code is created in which <Condition #6> is applied in addition to <Condition #5>, it is possible to provide randomness while maintaining regularity for positions at which “1”s are present in a parity check matrix, and therefore the possibility of achieving good error correction capability is increased.
The possibility of being able to create an LDPC-CC having higher error correction capability is also increased if a code is created using <Condition #6′> instead of <Condition #6>, that is, using <Condition #6′> in addition to <Condition #5>.
<Condition #6′>
Orders of X1(D) of equations 13-1 to 13-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(a#1,1,1%3g, a#1,1,2%3g),
(a#2,1,1%3g, a#2,1,2%3g), . . . ,
(a#p,1,1%3g, a#p,1,2%3g), . . . , and
(a#3g,1,1%3g, a#3g,1,2%3g) (where p=1, 2, 3, . . . , 3g);
Orders of X2(D) of equations 13-1 to 13-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(a#1,2,1%3g, a#1,2,2%3g),
(a#2,2,1%3g, a#2,2,2%3g),
(a#p,2,1%3g, a#p,2,2%3g), . . . , and
(a#3g,2,1%3g, a#3g,2,2%3g) (where p=1, 2, 3, . . . , 3g);
Orders of X3(D) of equations 13-1 to 13-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(a#1,3,1%3g, a#1,3,2%3g),
(a#2,3,1%3g, a#2,3,2%3g), . . . ,
(a#p,3,1%3g, a#p,3,2%3g), . . . , and
(a#3g,3,1%3g, a#3g,3,2%3g) (where p=1, 2, 3, . . . , 3g);
Orders of Xk(D) of equations 13-1 to 13-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(a1,k,1%3g, a#1,k,2%3g),
(a#2,k,1%3g, a#2,k,2%3g), . . . ,
(a#p,k,1%3g, a#p,k,2%3g), . . . ,
(a#3g,k,1%3g, a#3g,k,2%3g) (where p=1, 2, 3, . . . , 3g, and k=1, 2, 3, . . . , n−1);
Orders of Xn−1(D) of equations 13-1 to 13-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(a#1,n-1,1%3g, a#1,n-1,2%3g),
(a#2,n-1,1%3g, a#2,n-1,2%3g), . . . ,
(a#p,n-1,1%3g, a#p,n-1,2%3g), . . . ,
(a#3g,n-1,1%3g, a#3g,n-1,2%3g) (where p=1, 2, 3, . . . , 3g); or
Orders of P(D) of equations 13-1 to 13-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(b#1,1%3g, b#1,2%3g),
(b#2,1%3g, b#2,2%3g),
(b#3,1%3g, b#3,2%3g), . . . ,
(b#k,1%3g, b#k,2%3g), . . . ,
(b#3g-2,1%3g, b#3g-2,2%3g),
(b#3g-1,1%3g, b#3g-1,2%3g),
(b#3g,1%3g, b#3g,2%3g) (where k=1, 2, 3, . . . , 3g).
The above description relates to an LDPC-CC of a time varying period of 3g and a coding rate of (n−1)/n (where n is an integer equal to or greater than 2). Below, conditions are described for orders of an LDPC-CC of a time varying period of 3g and a coding rate of 1/2 (n=2).
Consider equations 15-1 to 15-3g as parity check polynomials of an LDPC-CC having a time varying period of 3g (where g=1, 2, 3, 4, . . . ) and the coding rate is 1/2 (n=2).
At this time, X(D) is a polynomial representation of data (information) X and P(D) is a polynomial representation of parity. Here, in equations 15-1 to 15-3g, parity check polynomials are assumed such that there are three terms in X(D) and P(D), respectively.
Thinking in the same way as in the case of an LDPC-CC of a time varying period of 3 and an LDPC-CC of a time varying period of 6, the possibility of being able to achieve higher error correction capability is increased if the condition below (<Condition #2-1>) is satisfied in an LDPC-CC of a time varying period of 3g and a coding rate of 1/2 (n=2) represented by parity check polynomials of equations 15-1 to 15-3g.
In an LDPC-CC of a time varying period of 3g and a coding rate of 1/2 (n=2), the parity bit and the information bits at point in time i are represented by Pi and Xi,1, respectively.
If i%3g=k (where k=0, 1, 2, . . . , 3g−1) is assumed at this time, a parity check polynomial of equation 15-(k+1) holds true. For example, if i=2, i%3g=2 (k=2), equation 16 holds true.
[16]
(Da#3,1,1+Da#3,1,2+Da#3,1,3)X2,1(D)+(Db#3,1+Db#3,2+Db#3,3)P2=0 (Equation 16)
In equations 15-1 to 15-3g, it is assumed that a#k,1,1, a#k,1,2, and a#k,1,3 are integers (where a#k,1,1≠a#k,1,2≠a#k,1,3) (where k=1, 2, 3, . . . , 3g). Also, it is assumed that b#k,1, b#k,2, and b#k,3 are integers (where b#k,1≠b#k,2≠b#k,3). A parity check polynomial of equation 15-k (k=1, 2, 3, . . . , 3g) is called “check equation #k,” and a sub-matrix based on the parity check polynomial of equation 15-k is designated k-th sub-matrix Hk. Next, consider an LDPC-CC of a time varying period of 3g generated from first sub-matrix H1, second sub-matrix H2, third sub-matrix H3, . . . , 3g-th sub-matrix H3g.
<Condition #2-1>
In equations 15-1 to 15-3g, combinations of orders of X(D) and P(D) satisfy the following condition:
(a#1,1,1%3, a#1,1,2%3, a#1,1,3%3) and
(b#1,1%3, b#1,2%3, b#1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0);
(a#2,1,1%3, a#2,1,2%3, a#2,1,3%3) and
(b#2,1%3, b#2,2%3, b#2,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0);
(a#3,1,1%3, a#3,1,2%3, a#3,1,3%3) and
(b#3,1%3, b#3,2%3, b#3,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0);
(a#k,1,1%3, a#k,1,2%3, a#k,1,3%3) and
(b#k,1%3, b#k,2%3, b#k,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where k=1, 2, 3, . . . , 3g);
(a#3g-2,1,1%3, a#3g-2,1,2%3, a#3g-2,1,3%3) and
(b#3g-2,1%3, b#3g-2,2%3, b#3g-2,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0);
(a#3g-1,1,1%3, a#3g-1,1,2%3, a#3g-1,1,3%3) and
(b#3g-1,1%3, b#3g-1,2%3, b#3g-1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0); and
(a#3g,1,1%3, a#3g,1,2%3, a#3g,1,3%3) and
(b#3g,1%3, b#3g,2%3, b#3g,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0).
Taking ease of performing encoding into consideration, it is desirable for one “0” to be present among the three items (b#k,1%3, b#k,2%3, b#k,3%3) (where k=1, 2, . . . , 3g) in equations 15-1 to 15-3g. This is because of a feature that, if D°=1 holds true and b#k,1, b#k,2 and b#k,3 are integers equal to or greater than 0 at this time, parity P can be found sequentially.
Also, in order to provide relevancy between parity bits and data bits of the same point in time, and to facilitate a search for a code having high correction capability, it is desirable for one “0” to be present among the three items (a#k,1,1%3, a#k,1,2%3, a#k,1,3%3) (where k=1, 2, . . . , 3g).
Next, an LDPC-CC of a time varying period of 3g (where g=2, 3, 4, 5, . . . ) that takes ease of encoding into account is considered. At this time, if the coding rate is 1/2 (n=2), LDPC-CC parity check polynomials can be represented as shown below.
At this time, X(D) is a polynomial representation of data (information) X and P(D) is a polynomial representation of parity. Here, in equations 17-1 to 17-3g, parity check polynomials are assumed such that there are three terms in X(D) and P(D), respectively. In an LDPC-CC of a time varying period of 3g and a coding rate of 1/2 (n=2), the parity bit and information bits at point in time i are represented by Pi and Xi,1, respectively. If i%3g=k (where k=0, 1, 2, . . . , 3g−1) is assumed at this time, a parity check polynomial of equation 17-(k+1) holds true. For example, if i=2, i%3g=2 (k=2), equation 18 holds true.
[18]
(Da#3,1,1+Da#3,1,2+Da#3,1,3)X2,1(D)+(Db#3,1+Db#3,2+Db#3,3)P2=0 (Equation 18)
If <Condition #3-1> and <Condition #4-1> are satisfied at this time, the possibility of being able to create a code having higher error correction capability is increased.
<Condition #3-1>
In equations 17-1 to 17-3g, combinations of orders of X(D) satisfy the following condition:
(a#1,1,1%3, a#1,1,2%3, a#1,1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0);
(a#2,1,1%3, a#2,1,2%3, a#2,1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0);
(a#3,1,1%3, a#3,1,2%3, a#3,1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0);
(a#k,1,1%3, a#k,1,2%3, a#k,1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0) (where k=1, 2, 3, . . . , 3g);
(a#3g-2,1,1%3, a#3g-2,1,2%3, a#3g-2,1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0);
(a#3g-1,1,1%3, a#3g-1,1,2%3, a#3g-1,1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0); and
(a#3g,1,1%3, a#3g,1,2%3, a#3g,1,3%3) are any of (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), or (2, 1, 0).
In addition, in equations 17-1 to 17-3g, combinations of orders of P(D) satisfy the following condition:
(b#1,1%3, b#1,2%3),
(b#2,1%3, b#2,2%3),
(b#3,1%3, b#3,2%3), . . . ,
(b#k,1%3, b#k,2%3), . . . ,
(b#3g-2,1%3, b#3g-2,2%3),
(b#3g-1,1%3, b#3g-1,2%3), and (b#3g,1%3, b#3g,2%3) are either (1, 2) or (2, 1) (k=1, 2, 3, . . . , 3g).
<Condition #3-1> has a similar relationship with respect to equations 17-1 to 17-3g as <Condition #2-1> has with respect to equations 15-1 to 15-3g. If the condition below (<Condition #4-1>) is added for equations 17-1 to 17-3g in addition to <Condition #3-1>, the possibility of being able to create an LDPC-CC having higher error correction capability is increased.
<Condition #4-1>
Orders of P(D) of equations 17-1 to 17-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(b#1,1%3g, b#1,2%3g),
(b#2,1%3g, b#2,2%3g),
(b#3,1%3g, b#3,2%3g), . . . ,
(b#k,1%3g, b#k,2%3g), . . . ,
(b#3g-2,1%3g, b#3g-2,2%3g),
(b#3g-1,1%3g, b#3g-1,2%3g), and (b#3g,1%3g, b#3g,2%3g).
The possibility of achieving good error correction capability is high if there is also randomness while regularity is maintained for positions at which “1”s are present in a parity check matrix. With an LDPC-CC having a time varying period of 3g (where g=2, 3, 4, 5, . . . ) and the coding rate is 1/2 (n=2) that has parity check polynomials of equations 17-1 to 17-3g, if a code is created in which <Condition #4-1> is applied in addition to <Condition #3-1>, it is possible to provide randomness while maintaining regularity for positions at which “1”s are present in a parity check matrix, and therefore the possibility of achieving better error correction capability is increased.
Next, an LDPC-CC of a time varying period of 3g (where g=2, 3, 4, 5, . . . ) is considered that enables encoding to be performed easily and provides relevancy to parity bits and data bits of the same point in time. At this time, if the coding rate is 1/2 (n=2), LDPC-CC parity check polynomials can be represented as shown below.
At this time, X(D) is a polynomial representation of data (information) X and P(D) is a polynomial representation of parity.
In equations 19-1 to 19-3g, parity check polynomials are assumed such that there are three terms in X(D) and P(D), respectively, and a D° term is present in X(D) and P(D) (where k=1, 2, 3, . . . , 3g).
In an LDPC-CC of a time varying period of 3g and a coding rate of 1/2 (n=2), the parity bit and information bits at point in time i are represented by Pi and Xi,1, respectively. If i%3g=k (where k=0, 1, 2, . . . , 3g−1) is assumed at this time, a parity check polynomial of equation 19-(k+1) holds true. For example, if i=2, i%3g=2 (k=2), equation 20 holds true.
[20]
(Da#3,1,1+Da#3,1,2+1)X2,1(D)+(Db#3,1+Db#3,2+1)P2=0 (Equation 20)
If following <Condition #5-1> and <Condition #6-1> are satisfied at this time, the possibility of being able to create a code having higher error correction capability is increased.
<Condition #5-1>
In equations 19-1 to 19-3g, combinations of orders of X(D) satisfy the following condition:
(a#1,1,1%3, a#1,1,2%3) is (1, 2) or (2, 1);
(a#2,1,1%3, a#2,1,2%3) is (1, 2) or (2, 1);
(a#3,1,1%3, a#3,1,2%3) is (1, 2) or (2, 1);
(a#k,1,1%3, a#k,1,2%3) is (1, 2) or (2, 1) (where k=1, 2, 3, . . . , 3g);
(a#3g-2,1,1%3, a#3g-2,1,2%3) is (1, 2) or (2, 1),
(a#3g-1,1,1%3, a#3g-1,1,2%3) is (1, 2) or (2, 1); and
(a#3g,1,1%3, a#3g,1,2%3) is (1, 2) or (2, 1).
In addition, in equations 19-1 to 19-3g, combinations of orders of P(D) satisfy the following condition:
(b#1,1%3, b#1,2%3),
(b#2,1%3, b#2,2%3),
(b#3,1%3, b#3,2%3), . . . ,
(b#k,1%3, b#k,2%3), . . . ,
(b#3g-2,1%3, b#3g-2,2%3),
(b#3g-1,1%3, b#3g-1,2%3),
and (b#3g,1%3, b#3g,2%3) are either (1, 2) or (2, 1) (where k=1, 2, 3, . . . , 3g).
<Condition #5-1> has a similar relationship with respect to equations 19-1 to 19-3g as <Condition #2-1> has with respect to equations 15-1 to 15-3g. If the condition below (<Condition #6-1>) is added for equations 19-1 to 19-3g in addition to <Condition #5-1>, the possibility of being able to create an LDPC-CC having higher error correction capability is increased.
<Condition #6-1>
Orders of X(D) of equations 19-1 to 19-3g satisfy the following condition:
all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(a#1,1,1%3g, a#1,1,2%3g),
(a#2,1,1%3g, a#2,1,2%3g), . . . ,
(a#p,1,1%3g, a#p,1,2%3g), . . . ,
(a#3g,1,1%3g, a#3g,1,2%3g) (where p=1, 2, 3, . . . , 3g); and Orders of P(D) of equations 19-1 to 19-3g satisfy the following condition:
all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(b#1,1%3g, b#1,2%3g),
(b#2,1%3g, b#2,2%3g),
(b#3,1%3g, b#3,2%3g), . . . ,
(b#k,1%3g, b#k,2%3g), . . . ,
(b#3g-2,1%3g, b#3g-2,2%3g),
(b#3g-1,1%3g, b#3g-1,2%3g), and (b#3g,1%3g, b#3g,2%3g) (where k=1, 2, 3, . . . 3g).
The possibility of achieving good error correction capability is high if there is also randomness while regularity is maintained for positions at which “1”s are present in a parity check matrix. With an LDPC-CC having a time varying period of 3g (where g=2, 3, 4, 5, . . . ) and the coding rate is 1/2 that has parity check polynomials of equations 19-1 to 19-3g, if a code is created in which <Condition #6-1> is applied in addition to <Condition #5-1>, it is possible to provide randomness while maintaining regularity for positions at which “1”s are present in a parity check matrix, so that the possibility of achieving better error correction capability is increased.
The possibility of being able to create a code having higher error correction capability is also increased if a code is created using <Condition #6′-1> instead of <Condition #6-1>, that is, using <Condition #6′-1> in addition to <Condition #5-1>.
<Condition #6′-1>
Orders of X(D) of equations 19-1 to 19-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(a#1,1,1%3g, a#1,1,2%3g),
(a#2,1,1%3g, a#2,1,2%3g), . . . ,
(a#p,1,1%3g, a#p,1,2%3g), . . . , and (a#3g,1,1%3g, a#3g,1,2%3g) (where p=1, 2, 3, . . . , 3g); or Orders of P(D) of equations 19-1 to 19-3g satisfy the following condition: all values other than multiples of 3 (that is, 0, 3, 6, . . . , 3g−3) from among integers from 0 to 3g−1 (0, 1, 2, 3, 4, . . . , 3g−2, 3g−1) are present in the following 6g values of
(b#1,1%3g, b#1,2%3g),
(b#2,1%3g, b#2,2%3g),
(b#3,1%3g, b#3,2%3g), . . . ,
(b#k,1%3g, b#k,2%3g), . . . ,
(b#3g-2,1%3g, b#3g-2,2%3g),
(b#3g-1,1%3g, b#3g-1,2%3g) and (b#3g,1%3g, b#3g,2%3g) (where k=1, 2, 3, . . . , 3g).
Examples of LDPC-CCs of a coding rate of 1/2 and a time varying period of 6 having good error correction capability are shown in Table 6.
An LDPC-CC of a time varying period of g with good characteristics has been described above. Also, for an LDPC-CC, it is possible to provide encoded data (codeword) by multiplying information vector n by generator matrix G. That is, encoded data (codeword) c can be represented by c=n×G. Here, generator matrix G is found based on parity check matrix H designed in advance. To be more specific, generator matrix G refers to a matrix satisfying G×HT=0.
For example, a convolutional code of a coding rate of 1/2 and generator polynomial G=[1 G1(D)/G0(D)] will be considered as an example. At this time, G1 represents a feed-forward polynomial and G0 represents a feedback polynomial. If a polynomial representation of an information sequence (data) is X(D), and a polynomial representation of a parity sequence is P(D), a parity check polynomial is represented as shown in equation 21 below.
[21]
G
1(D)X(D)+G0(D)P(D)=0 (Equation 21)
where D is a delay operator.
[22]
(D2+1)X(D)+(D2+D+1)=0 (Equation 22)
Here, data at point in time i is represented by Xi, and parity bit by Pi, and transmission sequence Wi is represented as Wi=(Xi, Pi). Then transmission vector w is represented as w=(X1, P1, X2, P2, . . . , Xi, Pi . . . )T. Thus, from equation 22, parity check matrix H can be represented as shown in
[23]
Hw=0 (Equation 23)
Therefore, with parity check matrix H, the decoding side can perform decoding using belief propagation (BP) decoding, min-sum decoding similar to BP decoding, offset BP decoding, normalized BP decoding, shuffled BP decoding, or suchlike belief propagation, as shown in Non-Patent Literature 4, Non-Patent Literature 5 and Non-Patent Literature 6.
[Time-Invariant/Time-Varying LDPC-CC (Coding Rate of (n−1)/n) (n: Natural Number) Based on Convolutional Code]
An overview of time-invariant/time-varying LDPC-CCs based on a convolutional code is given below.
A parity check polynomial represented as shown in equation 24 will be considered, with polynomial representations of coding rate of R=(n−1)/n as information X1, X2, . . . , Xn-1 as X1(D), X2(D), . . . , Xn-1(D), and a polynomial representation of parity P as P(D).
[24]
(Da
In equation 24, at this time, ap,p (where p=1, 2, . . . , n−1 and q=1, 2, . . . , rp) is, for example, a natural number, and satisfies the condition ap,1≠ap,2≠ . . . ap,rp. Also, bq (where q=1, 2, . . . , s) is a natural number, and satisfies the condition b1≠b2≠ . . . ≠bs. A code defined by a parity check matrix based on a parity check polynomial of equation 24 at this time is called a time-invariant LDPC-CC here.
Here, m different parity check polynomials based on equation 24 are provided (where m is an integer equal to or greater than 2). These parity check polynomials are represented as shown below.
[25]
A
X1,i(D)X1(D)+AX2,i(D)X2(D)+ . . . +AXn-1,i(D)Xn-1(D)+Bi(D)P(D)=0 (Equation 25)
Here, i=0, 1, . . . , m−1.
Then information X1, X2, . . . , Xn-1 at point in time j is represented as X1,j, X2,j, . . . , Xn-1,j, parity P at point in time j is represented as Pj, and uj=(X1,j, X2,j, . . . , Xn-1,j, Pj)T.
At this time, information X1,j, X2,j, . . . , Xn-1,j, and parity Pj at point in time j satisfy a parity check polynomial of equation 26.
[26]
A
X1,k(D)X1(D)+AX2,k(D)X2(D)+ . . . +AXn-1,k(D)Xn-1(D)+Bk(D)P(D)=0 (k=j mod m) (Equation 26)
Here, “j mod m” is a remainder after dividing j by m.
A code defined by a parity check matrix based on a parity check polynomial of equation 26 is called a time-varying LDPC-CC here. At this time, a time-invariant LDPC-CC defined by a parity check polynomial of equation 24 and a time-varying LDPC-CC defined by a parity check polynomial of equation 26 have a characteristic of enabling parity bits easily to be found sequentially by means of a register and exclusive OR.
For example, the configuration of LDPC-CC check matrix H of a time varying period of 2 and a coding rate of 2/3 based on equation 24 to equation 26 is shown in
Thus, LDPC-CC check matrix H of a time varying period of 2 of this proposal can be defined by a first sub-matrix representing a parity check polynomial of “check equation #1,” and by a second sub-matrix representing a parity check polynomial of “check equation #2.” Specifically, in parity check matrix H, a first sub-matrix and second sub-matrix are arranged alternately in the row direction. When the coding rate is 2/3, a configuration is employed in which a sub-matrix is shifted three columns to the right between an i'th row and (i+1)-th row, as shown in
In the case of a time-varying LDPC-CC of a time varying period of 2, an i'th row sub-matrix and an (i+1)-th row sub-matrix are different sub-matrices. That is to say, either sub-matrix (Ha, 11) or sub-matrix (Hc, 11) is a first sub-matrix, and the other is a second sub-matrix. If transmission vector u is represented as u=(X1,0, X2,0, P0, X1,1, X2,1, P1, . . . , X1,k, X2,k, Pk, . . . )T, the relationship Hu=0 holds true (see equation 23).
Next, an LDPC-CC having a time varying period of m is considered in the case of a coding rate of 2/3. In the same way as when the time varying period is 2, m parity check polynomials represented by equation 24 are provided. Then “check equation #1” represented by equation 24 is provided. “Check equation #2” to “check equation #m” represented by equation 24 are provided in a similar way. Data X and parity P of point in time mi+1 are represented by Xmi+1 and Pmi+1 respectively, data X and parity P of point in time mi+2 are represented by Xmi+2 and Pmi+2 respectively, . . . , and data X and parity P of point in time mi+m are represented by Xmi+m and Pmi+m respectively (where i is an integer).
Consider an LDPC-CC for which parity Pmi+1 of point in time mi+1 is found using “check equation #1,” parity Pmi+2 of point in time mi+2 is found using “check equation #2,” . . . , and parity Pmi+m of point in time mi+m is found using “check equation #m.” An LDPC-CC code of this kind provides the following advantages:
Thus, LDPC-CC check matrix H of a time varying period of m of this proposal can be defined by a first sub-matrix representing a parity check polynomial of “check equation #1,” a second sub-matrix representing a parity check polynomial of “check equation #2,” . . . , and an m-th sub-matrix representing a parity check polynomial of “check equation #m.” Specifically, in parity check matrix H, a first sub-matrix to m-th sub-matrix are arranged periodically in the row direction (see
If transmission vector u is represented as u=(X1,0, X2,0, P0, X1,1, X2,1, P1, . . . , X1,k, X2,k, Pk, . . . )T, the relationship Hu=0 holds true (see equation 23).
In the above description, a case of a coding rate of 2/3 has been described as an example of a time-invariant/time-varying LDPC-CC based on a convolutional code of a coding rate of (n−1)/n, but a time-invariant/time-varying LDPC-CC check matrix based on a convolutional code of a coding rate of (n−1)/n can be created by thinking in a similar way.
That is to say, in the case of a coding rate of 2/3, in
If transmission vector u is represented as u=(X1,0, X2,0, . . . , Xn-1,0, P0, X1,1, X2,1, . . . , Xn-1,1, P1, . . . , X1,k, X2,k, . . . , Xn-1,k, Pk, . . . )T, the relationship Hu=0 holds true (see equation 23)
Data computing section 110 is provided with shift registers 111-1 to 111-M and weight multipliers 112-0 to 112-M.
Parity computing section 120 is provided with shift registers 121-1 to 121-M and weight multipliers 122-0 to 122-M.
Shift registers 111-1 to 111-M and 121-1 to 121-M are registers storing v1,t-i and v2,t-i (where i=0, . . . , M), respectively, and, at a timing at which the next input comes in, send a stored value to the adjacent shift register to the right, and store a new value sent from the adjacent shift register to the left. The initial state of the shift registers is all-zeros.
Weight multipliers 112-0 to 112-M and 122-0 to 122-M switch values of h1(m) and h2(m) to 0 or 1 in accordance with a control signal outputted from weight control section 130.
Based on a parity check matrix stored internally, weight control section 130 outputs values of h1(m) and h2(m) at that timing, and supplies them to weight multipliers 112-0 to 112-M and 122-0 to 122-M.
Modulo 2 adder 140 adds all modulo 2 calculation results to the outputs of weight multipliers 112-0 to 112-M and 122-0 to 122-M, and calculates v2,t.
By employing this kind of configuration, LDPC-CC encoder 100 can perform LDPC-CC encoding in accordance with a parity check matrix.
If the arrangement of rows of a parity check matrix stored by weight control section 130 differs on a row-by-row basis, LDPC-CC encoder 100 is a time varying convolutional encoder. Also, in the case of an LDPC-CC of a coding rate of (q−1)/q, a configuration needs to be employed in which (q−1) data computing sections 110 are provided and modulo 2 adder 140 performs modulo 2 addition (exclusive OR computation) of the outputs of weight multipliers.
The present embodiment will describe a code configuration method of an LDPC-CC based on a parity check polynomial of a time varying period greater than 3 having excellent error correction capability.
[Time Varying Period of 6]
First, an LDPC-CC of a time varying period of 6 will be described as an example.
Consider Equations 27-0 to 27-5 as parity check polynomials (that satisfy 0) of an LDPC-CC of a coding rate of (n−1)/n (n is an integer equal to or greater than 2) and a time varying period of 6.
[27]
(Da#0,1,1+Da#0,1,2+Da#0,1,3)X1(D)+(Da#0,2,1+Da#0,2,2+Da#0,2,3)X2(D)+ . . . +(Da#0,n-1,1+Da#0,n-1,2+Da#0,n-1,3)Xn-1(D)+(Db#0,1+Db#0,2+Db#0,3)P(D)=0 (Equation 27-0)
(Da#1,1,1+Da#1,1,2+Da#1,1,3)X1(D)+(Da#1,2,1+Da#1,2,2+Da#1,2,3)X2(D)+ . . . +(Da#1,n-1,1+Da#1,n-1,2+Da#1,n-1,3)Xn-1(D)+(Db#1,1+Db#1,2+Db#1,3)P(D)=0 (Equation 27-1)
(Da#2,1,1+Da#2,1,2+Da#2,1,3)X1(D)+(Da#2,2,1+Da#2,2,2+Da#2,2,3)X2(D)+ . . . +(Da#2,n-1,1+Da#2,n-1,2+Da#2,n-1,3)Xn-1(D)+(Db#2,1+Db#2,2+Db#2,3)P(D)=0 (Equation 27-2)
(Da#3,1,1+Da#3,1,2+Da#3,1,3)X1(D)+(Da#3,2,1+Da#3,2,2+Da#3,2,3)X2(D)+ . . . +(Da#3,n-1,1+Da#3,n-1,2+Da#3,n-1,3)Xn-1(D)+(Db#3,1+Db#3,2+Db#3,3)P(D)=0 (Equation 27-3)
(Da#4,1,1+Da#4,1,2+Da#4,1,3)X1(D)+(Da#4,2,1+Da#4,2,2+Da#4,2,3)X2(D)+ . . . +(Da#4,n-1,1+Da#4,n-1,2+Da#4,n-1,3)Xn-1(D)+(Db#4,1+Db#4,2+Db#4,3)P(D)=0 (Equation 27-4)
(Da#5,1,1+Da#5,1,2+Da#5,1,3)X1(D)+(Da#5,2,1+Da#5,2,2+Da#5,2,3)X2(D)+ . . . +(Da#5,n-1,1+Da#5,n-1,2+Da#5,n-1,3)Xn-1(D)+(Db#5,1+Db#5,2+Db#5,3)P(D)=0 (Equation 27-5)
At this time, X1(D), X2(D), . . . , Xn-1(D) are polynomial representations of data (information) X1, X2, . . . Xn-1 and P(D) is a polynomial representation of parity. In equations 27-0 to 27-5, when, for example, the coding rate is 1/2, only the terms of X1(D) and P(D) are present and the terms of X2(D), . . . , Xn-1(D) are not present. Similarly, when the coding rate is 2/3, only the terms of X1(D), X2(D) and P(D) are present and the terms of X3(D), . . . , Xn-1(D) are not present. The other coding rates may also be considered in a similar manner.
Here, equations 27-0 to 27-5 are assumed to have such parity check polynomials that three terms are present in each of X1(D), X2(D), . . . , Xn-1(D) and P(D).
Furthermore, in equations 27-0 to 27-5, it is assumed that the following holds true for X1(D), X2(D), . . . , Xn-1(D) and P(D).
In equation 27-q, it is assumed that a#q,p,1, a#q,p,2 and a#q,p,3 are natural numbers and a#q,p,1≠a#q,p,2, a#q,p,1≠a#q,p,3 and a#q,p,2≠aq,p,3 hold true. Furthermore, it is assumed that b#q,1, b#q,2 and b#q,3 are natural numbers and b#q,1≠b#q,2, b#q,1≠b#q,3 and b#q,1≠b#q,3 hold true (q=0, 1, 2, 3, 4, 5; p=1, 2, . . . , n−1).
The parity check polynomial of equation 27-q is called “check equation #q” and the sub-matrix based on the parity check polynomial of equation 27-q is called q-th sub-matrix Hq. Next, consider an LDPC-CC of a time varying period of 6 generated from 0-th sub-matrix H0, first sub-matrix H1, second sub-matrix H2, third sub-matrix H3, fourth sub-matrix H4 and fifth sub-matrix H5.
In an LDPC-CC of a time varying period of 6 and a coding rate of (n−1)/n (where n is an integer equal to or greater than 2), the parity bit and information bits at point in time i are represented by Pi and Xi,1, Xi,2, . . . , Xi,n-1, respectively.
If i%6=k (where k=0, 1, 2, 3, 4, 5) is assumed at this time, a parity check polynomial of equation 27-(k) holds true. For example, if i=8, i%6=2 (k=2), equation 28 holds true.
[28]
(Da#2,1,1+Da#2,1,2+Da#2,1,3)X8,1(D)+(Da#2,2,1+Da#2,2,2+Da#2,2,3)X8,2(D)+ . . . +(Da#2,n-1,1+Da#2,n-1,2+Da#2,n-1,3)X8,n-1(D)+(Db#2,1+Db#2,2+Db#2,3)P8=0 (Equation 28)
Furthermore, when the sub-matrix (vector) of equation 27-g is assumed to be Hg, the parity check matrix can be created using the method described in [LDPC-CC based on parity check polynomial].
It is assumed that a#q,1,3=0 and b#q,3=0 (q=0, 1, 2, 3, 4, 5) so as to simplify the relationship between the parity bits and information bits in equations 27-0 to 27-5 and sequentially find the parity bits. Therefore, the parity check polynomials (that satisfy 0) of equations 27-0 to 27-5 are represented as shown in equations 29-0 to 29-5.
[29]
(Da#0,1,1+Da#0,1,2+1)X1(D)+(Da#0,2,1+Da#0,2,2+1)X2(D)+ . . . +(Da#0,n-1,1+Da#0,n-1,2+1)Xn-1(D)+(Db#0,1+Db#0,2+1)P(D)=0 (Equation 29-0)
(Da#1,1,1+Da#1,1,2+1)X1(D)+(Da#1,2,1+Da#1,2,2+1)X2(D)+ . . . +(Da#1,n-1,1+Da#1,n-1,2+1)Xn-1(D)+(Db#1,1+Db#1,2+1)P(D)=0 (Equation 29-1)
(Da#2,1,1+Da#2,1,2+1)X1(D)+(Da#2,2,1+Da#2,2,2+1)X2(D)+ . . . +(Da#2,n-1,1+Da#2,n-1,2+1)Xn-1(D)+(Db#2,1+Db#2,2+1)P(D)=0 (Equation 29-2)
(Da#3,1,1+Da#3,1,2+1)X1(D)+(Da#3,2,1+Da#3,2,2+1)X2(D)+ . . . +(Da#3,n-1,1+Da#3,n-1,2+1)Xn-1(D)+(Db#3,1+Db#3,2+1)P(D)=0 (Equation 29-3)
(Da#4,1,1+Da#4,1,2+1)X1(D)+(Da#4,2,1+Da#4,2,2+1)X2(D)+ . . . +(Da#4,n-1,1+Da#4,n-1,2+1)Xn-1(D)+(Db#4,1+Db#4,2+1)P(D)=0 (Equation 29-4)
(Da#5,1,1+Da#5,1,2+1)X1(D)+(Da#5,2,1+Da#5,2,2+1)X2(D)+ . . . +(Da#5,n-1,1+Da#5,n-1,2+1)Xn-1(D)+(Db#5,1+Db#5,2+1)P(D)=0 (Equation 29-5)
Furthermore, it is assumed that 0-th sub-matrix H0, first sub-matrix H1, second sub-matrix H2, third sub-matrix H3, fourth sub-matrix H4 and fifth sub-matrix H5 are represented as shown in equations 30-0 to 30-5.
In equations 30-0 to 30-5, n continuous “1”s correspond to the terms of X1(D), X2(D), . . . , Xn-1(D) and P(D) in each of equations 29-0 to 29-5.
At this time, parity check matrix H can be represented as shown in
Here, conditions for the parity check polynomials in equations 29-0 to 29-5 are proposed under which high error correction capability can be achieved.
<Condition #1-1> and <condition #1-2> below are important for the terms relating to X1(D), X2(D), . . . , Xn-1(D). In the following conditions, “%” means a modulo, and for example, “α%6” represents a remainder after dividing α by 6.
<Condition #1-1>
“a#0,1,1%6=a#1,1,1%6=a#2,1,1%6=a#3,1,1%6=a#4,1,1%6=a#5,1,1%6=vp=1 (vp=1: fixed-value)”
“a#0,2,1%6=a#1,2,1%6=a#2,2,1%6=a#3,2,1%6=a#4,2,1%6=a#5,2,1%6=vp=2 (vp=2: fixed-value)”
“a#0,3,1%6=a#1,3,1%6=a#2,3,1%6=a#3,3,1%6=a#4,3,1%6=a#5,3,1%6=vp=3 (vp=3: fixed-value)”
“a#0,4,1%6=a#1,4,1%6=a#2,4,1%6=a#3,4,1%6=a#4,4,1%6=a#5,4,1%6=vp=4 (vp=4: fixed-value)”
“a#0,k,1%6=a#1,k,1%6=a#2,k,1%6=a#3,k,1%6=a#4,k,1%6=a#5,k,1%6=vp=k (vp=k: fixed-value) (therefore, k=1, 2, . . . , n−1)”
“a#0,n-2,1%6=a#1,n-2,1%6=a#2,n-2,1%6=a#3,n-2,1%6=a#4,n-2,1%6=a#5,n-2,1%6=vp=n-2 (vp=n-2: fixed-value)”
“a#0,n-1,1%6=a#1,n-1,1%6=a#2,n-1,1%6=a#3,n-1,1%6=a#4,n-1,1%6=a#5,n-1,1%6=vp=n-1 (vp=n-1: fixed-value)”
and
“b#0,1%6=b#1,1%6=b#2,1%6=b#3,1%6=b#4,1%6=b#5,1%6=w (w: fixed-value)”
<Condition #1-2>
“a#0,1,2%6=a#1,1,2%6=a#2,1,2%6=a#3,1,2%6=a#4,1,2%6=a#5,1,2%6=yp=1 (yp=1: fixed-value)”
“a#0,2,2%6=a#1,2,2%6=a#2,2,2%6=a#3,2,2%6=a#4,2,2%6=a#5,2,2%6=yp=2 (yp=2: fixed-value)”
“a#0,3,2%6=a#1,3,2%6=a#2,3,2%6=a#3,3,2%6=a#4,3,2%6=a#5,3,2%6=yp=3 (yp=3: fixed-value)”
“a#0,4,2%6=a#1,4,2%6=a#2,4,2%6=a#3,4,2%6=a#4,4,2%6=a#5,4,2%6=yp=4 (yp=4: fixed-value)”
“a#0,k,2%6=a#1,k,2%6=a#2,k,2%6=a#3,k,2%6=a#4,k,2%6=a#5,k,2%6=yp=k (yp=k: fixed-value) (therefore, k=1, 2, . . . , n−1)”
“a#0,n-2,2%6=a#1,n-2,2%6=a#2,n-2,2%6=a#3,n-2,2%6=a#4,n-2,2%6=a#5,n-2,2%6=yp=n-2 (yp=n-2: fixed-value)”
“a#0,n-1,2%6=a#1,n-1,2%6=a#2,n-1,2%6=a#3,n-1,2%6=a#4,n-1,2%6=a#5,n-1,2%6=yp=n-1 (yp=n-1: fixed-value)” and
“b#0,2%6=b#1,2%6=b#2,2%6=b#3,2%6=b#4,2%6=b#5,2%6=z (z: fixed-value)”
By designating <condition #1-1> and <condition #1-2> constraint conditions, the LDPC-CC that satisfies the constraint conditions becomes a regular LDPC code, and can thereby achieve high error correction capability.
Next, other important constraint conditions will be described.
<Condition #2-1>
In <condition #1-1>, vp=1, vp=2, vp=3, vp=4, . . . , vp=k, . . . , vp=n-2, vp=n-1, and w are set to “1,” “4” and “5.” That is, vp=k (k=1, 2, . . . , n−1) and w are set to “1” and “natural numbers other than divisors of a time varying period of 6.”
<Condition #2-2>
In <condition #1-2>, yp=1, yp=2, yp=3, yp=4, . . . , yp=k, . . . , yp=n-2, yp=n-1 and z are set to “1,” “4” and “5.” That is, yp=k (k=1, 2, . . . , n−1) and z are set to “1” and “natural numbers other than divisors of a time varying period of 6.”
By adding the constraint conditions of <condition #2-1> and <condition #2-2> or the constraint conditions of <condition #2-1> or <condition #2-2>, it is possible to clearly provide an effect of increasing the time varying period compared to a case where the time varying period is small such as a time varying period of 2 or 3. This will be described in detail using the attached drawings.
For simplicity of explanation, a case will be considered where X1(D) in parity check polynomials 29-0 to 29-5 of an LDPC-CC of a time varying period of 6 and a coding rate of (n−1)/n based on parity check polynomials has two terms. At this time, the parity check polynomials are represented as shown in equations 31-0 to 31-5.
[31]
(Da#0,1,1+1)X1(D)+(Da#0,2,1+Da#0,2,2+1)X2(D)+ . . . +(Da#0,n-1,1+Da#0,n-1,2+1)Xn-1(D)+(Db#0,1+Db#0,2+1)P(D)=0 (Equation 31-0)
(Da#1,1,1+1)X1(D)+(Da#1,2,1+Da#1,2,2+1)X2(D)+ . . . +(Da#1,n-1,1+Da#1,n-1,2+1)Xn-1(D)+(Db#1,1+Db#1,2+1)P(D)=0 (Equation 31-1)
(Da#2,1,1+1)X1(D)+(Da#2,2,1+Da#2,2,2+1)X2(D)+ . . . +(Da#2,n-1,1+Da#2,n-1,2+1)Xn-1(D)+(Db#2,1+Db#2,2+1)P(D)=0 (Equation 31-2)
(Da#3,1,1+1)X1(D)+(Da#3,2,1+Da#3,2,2+1)X2(D)+ . . . +(Da#3,n-1,1+Da#3,n-1,2+1)Xn-1(D)+(Db#3,1+Db#3,2+1)P(D)=0 (Equation 31-3)
(Da#4,1,1+1)X1(D)+(Da#4,2,1+Da#4,2,2+1)X2(D)+ . . . +(Da#4,n-1,1+Da#4,n-1,2+1)Xn-1(D)+(Db#4,1+Db#4,2+1)P(D)=0 (Equation 31-4)
(Da#5,1,1+1)X1(D)+(Da#5,2,1+Da#5,2,2+1)X2(D)+ . . . +(Da#5,n-1,1+Da#5,n-1,2+1)Xn-1(D)+(Db#5,1+Db#5,2+1)P(D)=0 (Equation 31-5)
Here, a case will be considered where vp=k (k=1, 2, . . . , n−1) and w are set to “3.” “3” is a divisor of a time varying period of 6.
The parity check polynomial of equation 31-q is called “check equation #q.” In
In
At this time, as shown in
In other words, the condition for #Y to have only limited values is to “set vp=1, vp=2, vp=3, vp=4, . . . , vp=k, . . . , vp=n-2, vp=n-1 (k=1, 2, . . . , n−1) and w to a divisor other than 1 among divisors of a time varying period of 6.”
By contrast,
As shown in
[Time Varying Period of 7]
When the above description is taken into consideration, the time varying period being a prime number is an important condition to achieve the effect of having increased the time varying period. This will be described in detail below.
First, consider equations 32-0 to 32-6 as parity check polynomials (that satisfy 0) of an LDPC-CC of a coding rate of (n−1)/n (n is an integer equal to or greater than 2) and a time varying period of 7.
[32]
(Da#0,1,1+Da#0,1,2+1)X1(D)+(Da#0,2,1+Da#0,2,2+1)X2(D)+ . . . +(Da#0,n-1,1+Da#0,n-1,2+1)Xn-1(D)+(Db#0,1+Db#0,2+1)P(D)=0 (Equation 32-0)
(Da#1,1,1+Da#1,1,2+1)X1(D)+(Da#1,2,1+Da#1,2,2+1)X2(D)+ . . . +(Da#1,n-1,1+Da#1,n-1,2+1)Xn-1(D)+(Db#1,1+Db#1,2+1)P(D)=0 (Equation 32-1)
(Da#2,1,1+Da#2,1,2+1)X1(D)+(Da#2,2,1+Da#2,2,2+1)X2(D)+ . . . +(Da#2,n-1,1+Da#2,n-1,2+1)Xn-1(D)+(Db#2,1+Db#2,2+1)P(D)=0 (Equation 32-2)
(Da#3,1,1+Da#3,1,2+1)X1(D)+(Da#3,2,1+Da#3,2,2+1)X2(D)+ . . . +(Da#3,n-1,1+Da#3,n-1,2+1)Xn-1(D)+(Db#3,1+Db#3,2+1)P(D)=0 (Equation 32-3)
(Da#4,1,1+Da#4,1,2+1)X1(D)+(Da#4,2,1+Da#4,2,2+1)X2(D)+ . . . +(Da#4,n-1,1+Da#4,n-1,2+1)Xn-1(D)+(Db#4,1+Db#4,2+1)P(D)=0 (Equation 32-4)
(Da#5,1,1+Da#5,1,2+1)X1(D)+(Da#5,2,1+Da#5,2,2+1)X2(D)+ . . . +(Da#5,n-1,1+Da#5,n-1,2+1)Xn-1(D)+(Db#5,1+Db#5,2+1)P(D)=0 (Equation 32-5)
(Da#6,1,1+Da#6,1,2+1)X1(D)+(Da#6,2,1+Da#6,2,2+1)X2(D)+ . . . +(Da#6,n-1,1+Da#6,n-1,2+1)Xn-1(D)+(Db#6,1+Db#6,2+1)P(D)=0 (Equation 32-6)
In equation 32-q, it is assumed that a#q,p,1 and a#q,p,2 are natural numbers equal to or greater than 1, and a#q,p,1≠a#q,p,2 holds true. Furthermore, it is assumed that b#q,1 and b#q,2 are natural numbers equal to or greater than 1, and b#q,1≠b#q,2 holds true (q=0, 1, 2, 3, 4, 5, 6; p=1, 2, . . . , n−1).
In an LDPC-CC of a time varying period of 7 and a coding rate of (n−1)/n (n is an integer equal to or greater than 2), the parity bit and information bits at point in time i are represented by Pi and Xi,1, Xi,2, . . . , Xi,n-1, respectively. At this time, if i%7=k (k=0, 1, 2, 3, 4, 5, 6), the parity check polynomial of equation 32-(k) holds true.
For example, if i=8, i%7=1 (k=1), equation 33 holds true.
[33]
(Da#1,1,1+Da#1,1,2+1)X8,1(D)+(Da#1,2,1+Da#1,2,2+1)X8,2(D)+ . . . +(Da#1,n-1,1+Da#1,n-1,2+1)X8,n-1(D)+(Db#1,1+Db#1,2+1)P8(D)=0 (Equation 33)
Furthermore, when the sub-matrix (vector) of equation 32-g is assumed to be Hg, the parity check matrix can be created using the method described in [LDPC-CC based on parity check polynomial]. Here, the 0-th sub-matrix, first sub-matrix, second sub-matrix, third sub-matrix, fourth sub-matrix, fifth sub-matrix and sixth sub-matrix are represented as shown in equations 34-0 to 34-6.
In equations 34-0 to 34-6, n continuous “1”s correspond to the terms of X1(D), X2(D), . . . , Xn-1(D) and P(D) in each of equations 32-0 to 32-6.
At this time, parity check matrix H can be represented as shown in
Here, the condition for the parity check polynomials in equation 32-0 to equation 32-6 to achieve high error correction capability is as follows as in the case of the time varying period of 6. In the following conditions, “%” means a modulo, and, for example, “α%7” represents a remainder after dividing a by 7.
<Condition #1-1′>
“a#0,1,1%7=a#1,1,1%7=a#2,1,1%7=a#3,1,1%7=a#4,1,1%7=a#5,1,1%7=a#6,1,1%7=vp=1 (vp=1: fixed-value)”
“a#0,2,1%7=a#1,2,1%7=a#2,2,1%7=a#3,2,1%7=a#4,2,1%7=a#5,2,1%7=a#6,2,1%7=vp=2 (vp=2: fixed-value)”
“a#0,3,1%7=a#1,3,1%7=a#2,3,1%7=a#3,3,1%7=a#4,3,1%7=a#5,3,1%7=a#6,3,1%7=vp=3 (vp=3: fixed-value)”
“a#0,4,1%7=a#1,4,1%7=a#2,4,1%7=a#3,4,1%7=a#4,4,1%7=a#5,4,1%7=a#6,4,1%7=vp=4 (vp=4: fixed-value)”
“a#0,k,1%7=a#1,k,1%7=a#2,k,1%7=a#3,k,1%7=a#4,k,1%7=a#5,k,1%7=a#6,k,1%7=vp=k (vp=k: fixed-value) (therefore, k=1, 2, . . . , n−1)”
“a#0,n-2,1%7=a#1,n-2,1%7=a#2,n-2,1%7=a#3,n-2,1%7=a#4,n-2,1%7=a#5,n-2,1%7=a#6,n-2,1%7=vp=n-2 (vp=n-2: fixed-value)”
“a#0,n-1,1%7=a#1,n-1,1%7=a#2,n-1,1%7=a#3,n-1,1%7=a#4,n-1,1%7=a#5,n-1,1%7=a#6,n-1,1%7=vp=n-1 (vp=n-1: fixed-value)” and
“b#0,1%7=b#1,1%7=b#2,1%7=b#3,1%7=b#4,1%7=b#5,1%7=b#6,1%7=w (w: fixed-value)”
<Condition #1-2′>
“a#0,1,2%7=a#1,1,2%7=a#2,1,2%7=a#3,1,2%7=a#4,1,2%7=a#5,1,2%7=a#6,1,2%7=yp=1 (yp=1: fixed-value)”
“a#0,2,2%7=a#1,2,2%7=a#2,2,2%7=a#3,2,2%7=a#4,2,2%7=a#5,2,2%7=a#6,2,2%7=yp=2 (yp=2: fixed-value)”
“a#0,3,2%7=a#1,3,2%7=a#2,3,2%7=a#3,3,2%7=a#4,3,2%7=a#5,3,2%7=a#6,3,2%7=yp=3 (yp=3: fixed-value)”
“a#0,4,2%7=a#1,4,2%7=a#2,4,2%7=a#3,4,2%7=a#4,4,2%7=a#5,4,2%7=a#6,4,2%7=yp=4 (yp=4: fixed-value)”
“a#0,k,2%7=a#1,k,2%7=a#2,k,2%7=a#3,k,2%7=a#4,k,2%7=a#5,k,2%7=a#6,k,2%7=yp=k (yp=k: fixed-value) (therefore, k=1, 2, . . . , n−1)”
“a#0,n-2,2%7-a#1,n-2,2%7-a#2,n-2,2%7-a#3,n-2,2%7-a#4,n-2,2%7=a#5,n-2,2%7-a#6,n-2,2%7=yp=n-2 (yp=n-2: fixed-value)”
“a#0,n-1,2%7-a#1,n-1,2%7=a#2,n-1,2%7-a#3,n-1,2%7-a#4,n-1,2%7-a#5,n-1,2%7=a#6,n-1,2%7=yp=n-1 (yp=n-1: fixed-value)” and
“b#0,2%7-b#1,2%7-b#2,2%7-b#3,2%7-b#4,2%7-b#5,2%7-b#6,2%7=z (z: fixed-value)”
By designating <condition #1-1′> and <condition #1-2′> constraint conditions, the LDPC-CC that satisfies the constraint conditions becomes a regular LDPC code, and can thereby achieve high error correction capability.
In the case of a time varying period of 6, achieving high error correction capability further requires <condition #2-1> and <condition #2-2>, or <condition #2-1> or <condition #2-2>. By contrast, when the time varying period is a prime number as in the case of a time varying period of 7, the condition corresponding to <condition #2-1> and <condition #2-2>, or <condition #2-1> or <condition #2-2> required in the case of the time varying period of 6 is unnecessary.
That is to say, in <condition #1-1′>, values of vp=1, vp=2, vp=3, vp=4, . . . , vp=k, . . . , vp=n-2, vp=n-1 (k=1, 2, . . . , n−1) and w may be one of values “0, 1, 2, 3, 4, 5 and 6.”
Also, in <condition #1-2′>, values of yp=1, yp=2, yp=3, yp=4, . . . , yp=k, . . . , yp=n-2, yp=n-1 (k=1, 2, . . . , n−1) and z may be one of values “0, 1, 2, 3, 4, 5 and 6.”
The reason will be described below.
For simplicity of explanation, a case will be considered where X1(D) in the parity check polynomials 32-0 to 32-6 of an LDPC-CC of a time varying period of 7 and a coding rate of (n−1)/n based on the parity check polynomials has two terms. In this case, the parity check polynomials are represented as shown in equations 35-0 to 35-6.
[35]
(Da#0,1,1+1)X1(D)+(Da#0,2,1+Da#0,2,2+1)X2(D)+ . . . +(Da#0,n-1,1+Da#0,n-1,2+1)Xn-1(D)+(Db#0,1+Db#0,2+1)P(D)=0 (Equation 35-0)
(Da#1,1,1+1)X1(D)+(Da#1,2,1+Da#1,2,2+1)X2(D)+ . . . +(Da#1,n-1,1+Da#1,n-1,2+1)Xn-1(D)+(Db#1,1+Db#1,2+1)P(D)=0 (Equation 35-1)
(Da#2,1,1+1)X1(D)+(Da#2,2,1+Da#2,2,2+1)X2(D)+ . . . +(Da#2,n-1,1+Da#2,n-1,2+1)Xn-1(D)+(Db#2,1+Db#2,2+1)P(D)=0 (Equation 35-2)
(Da#3,1,1+1)X1(D)+(Da#3,2,1+Da#3,2,2+1)X2(D)+ . . . +(Da#3,n-1,1+Da#3,n-1,2+1)Xn-1(D)+(Db#3,1+Db#3,2+1)P(D)=0 (Equation 35-3)
(Da#4,1,1+1)X1(D)+(Da#4,2,1+Da#4,2,2+1)X2(D)+ . . . +(Da#4,n-1,1+Da#4,n-1,2+1)Xn-1(D)+(Db#4,1+Db#4,2+1)P(D)=0 (Equation 35-4)
(Da#5,1,1+1)X1(D)+(Da#5,2,1+Da#5,2,2+1)X2(D)+ . . . +(Da#5,n-1,1+Da#5,n-1,2+1)Xn-1(D)+(Db#5,1+Db#5,2+1)P(D)=0 (Equation 35-5)
(Da#6,1,1+1)X1(D)+(Da#6,2,1+Da#6,2,2+1)X2(D)+ . . . +(Da#6,n-1,1+Da#6,n-1,2+1)Xn-1(D)+(Db#6,1+Db#6,2+1)P(D)=0 (Equation 35-6)
Here, a case will be considered where vp=k (k=1, 2, . . . , n−1) and w are set to “2.”
The parity check polynomial of equation 35-q is called “check equation #q.” In
In the case of a time varying period of 6, for example, as shown in
Thus, it is clear that if the time varying period is set to a prime number in this way, constraint conditions relating to parameter settings for achieving high error correction capability are drastically relaxed compared to a case where the time varying period is not a prime number. When the constraint conditions are relaxed, adding another constraint condition enables higher error correction capability to be achieved. Such a code configuration method will be described in detail below.
[Time Varying Period of q (q is a Prime Number Greater than 3): Equation 36]
First, a case will be considered where a g-th (g=0, 1, . . . , q−1) parity check polynomial of a coding rate of (n−1)/n and a time varying period of q (q is a prime number greater than 3) is represented as shown in equation 36.
[36]
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Da#g,2,1+Da#g,2,2+1)X2(D)+ . . . +(Da#g,n-1,1+Da#g,n-1,2+1)Xn-1(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 36)
In equation 36, it is also assumed that a#g,p,1 and a#g,p,2 are natural numbers equal to or greater than 1 and a#g,p,1≠a#g,p,2 holds true. Furthermore, it is also assumed that b#g,1 and b#g,2 are natural numbers equal to or greater than 1 and b#g,1≠b#g,2 holds true (g=0, 1, 2, . . . , q−2, q−1; p=1, 2, . . . , n−1).
In the same way as the above description, <condition #3-1> and <condition #3-2> described below are one of important requirements for an LDPC-CC to achieve high error correction capability. In the following conditions, “%” means a modulo, and, for example, “α%q” represents a remainder after dividing α by q.
<Condition #3-1>
“a#0,1,1%q=a#1,1,1%q=a#2,1,1%q=a#3,1,1%q= . . . =a#g,1,1%q= . . . =a#q-2,1,1%q=a#q-1,1,1%q=vp=1 (vp=1: fixed-value)”
“a#0,2,1%q=a#1,2,1%q=a#2,2,1%q=a#3,2,1%q= . . . =a#g,2,1%q= . . . =a#q-2,2,1%q=a#q-1,2,1%q=vp=2 (vp=2: fixed-value)”
“a#0,3,1%q=a#1,3,1%q=a#2,3,1%q=a#3,3,1%q= . . . =a#g,3,1%q= . . . =a#q-2,3,1%q=a#q-1,3,1%q=vp=3 (vp=3: fixed-value)”
“a#0,4,1%q=a#1,4,1%q=a#2,4,1%q=a#3,4,1%q= . . . =a#g,4,1%q= . . . =a#q-2,4,1%q=a#q-1,4,1%q=vp=4 (vp=4: fixed-value)”
“a#0,k,1%q=a#1,k,1%q=a#2,k,1%q=a#3,k,1%q= . . . =a#g,k,1%q= . . . =a#q-2,k,1%q=a#q-1,k,1%q=vp=k (vp=k: fixed-value) (therefore, k=1, 2, . . . , n−1)”
“a#0,n-2,1%q=a#1,n-2,1%q=a#2,n-2,1%q=a#3,n-2,1%q= . . . =a#g,n-2,1%q= . . . =a#q-2,n-2,1%q=a#q-1,n-2,1%q=vp=n-2 (vp=n-2: fixed-value)”
“a#0,n-1,1%q=a#1,n-1,1%q=a#2,n-1,1%q=a#3,n-1,1%q= . . . =a#g,n-1,1%q= . . . =a#q-2,n-1,1%q=a#q-1,n-1,1%q=vp=n-1 (vp=n-1: fixed-value)” and
“b#0,1%q=b#1,1%q=b#2,1%q=b#3,1%q= . . . =b#g,1%q= . . . =b#q-2,1%q=b#q-1,1%q=w (w: fixed-value)”
<Condition #3-2>
“a#0,1,2%q=a#1,1,2%q=a#2,1,2%q=a#3,1,2%q= . . . =a#g,1,2%q= . . . =a#q-2,1,2%q=a#q-1,1,2%q=yp=1 (yp=1: fixed-value)”
“a#0,2,2%q=a#1,2,2%q=a#2,2,2%q=a#3,2,2%q= . . . =a#g,2,2%q= . . . =a#q-2,2,2%q=a#q-1,2,2%q=yp=2 (yp=2: fixed-value)”
“a#0,3,2%q=a#1,3,2%q=a#2,3,2%q=a#3,3,2%q= . . . =a#g,3,2%q= . . . =a#q-2,3,2%q=a#q-1,3,2%q=yp=3 (yp=3: fixed-value)”
“a#0,4,2%q=a#1,4,2%q=a#2,4,2%q=a#3,4,2%q= . . . =a#g,4,2%q= . . . =a#q-2,4,2%q=a#q-1,4,2%q=yp=4 (yp=4: fixed-value)”
“a#0,k,2%q=a#1,k,2%q=a#2,k,2%q=a#3,k,2%q= . . . =a#g,k,2%q= . . . =a#q-2,k,2%q=a#q-1,k,2%q=yp=k (yp=k: fixed-value) (therefore, k=1, 2, . . . n−1)”
“a#0,n-2,2%q=a#1,n-2,2%q=a#2,n-2,2%q=a#3,n-2,2%q= . . . =a#g,n-2,2%q= . . . =a#q-2,n-2,2%q=a#q-1,n-2,2%q=yp=n-2 (yp=n-2: fixed-value)”
“a#0,n-1,2%q=a#1,n-1,2%q=a#2,n-1,2%q=a#3,n-1,2%q= . . . =a#g,n-1,2%q= . . . =a#q-2,n-1,2%q=a#q-1,n-1,2%q=yp=n-1 (yp=n-1: fixed-value)” and
“b#0,2%q=b#1,2%q=b#2,2%q=b#3,2%q= . . . =b#g,2%q= . . . =b#q-2,2%q=b#q-1,2%q=z (z: fixed-value)”
In addition, when <condition #4-1> or <condition #4-2> holds true for a set of (vp=1, yp=1), (vp=2, yp=2), (vp=3, yp=3), . . . , (vp=k, yp=k), . . . , (vp=n-2, yp=n-2), (vp=n-1, yp=n-1), and (w, z), high error correction capability can be achieved. Here, k=1, 2, . . . , n−1.
<Condition #4-1>
Consider (vp=i, yp=i) and (vp=j, yp=j), where it is assumed that i=1, 2, . . . , n−1, j=1, 2, . . . , n−1, and i≠j. At this time, i and j (i≠j) are present where (vp=i, yp=i)≠(vp=j, yp=j) and (vp=i, yp=i)≠(yp=j, vp=j) hold true.
<Condition #4-2>
Consider (vp=i, yp=i) and (w, z), where it is assumed that i=1, 2, . . . , n−1. At this time, i is present where (vp=i, yp=i)≠(w, z) and (vp=i, yp=i)≠(z, w) hold true.
Table 7 shows parity check polynomials of an LDPC-CC of a time varying period of 7 and coding rates of 1/2 and 2/3.
In Table 7, with the code of a coding rate of 1/2,
“a#0,1,1%7=a#1,1,1%7=a#2,1,1%7=a#3,1,1%7=a#4,1,1%7=a#5,1,1%7=a#6,1,1%7=vp-1=3”
“b#0,1%7=b#1,1%7=b#2,1%7=b#3,1%7=b#4,1%7=b#5,1%7=b#6,1%7=w=1”
“a#0,1,2%7=a#1,1,2%7=a#2,1,2%7=a#3,1,2%7=a#4,1,2%7=a#5,1,2%7=a#6,1,2%7=yp=1=6”
“b#0,2%7=b#1,2%7=b#2,2%7=b#3,2%7=b#4,2%7=b#5,2%7=b#6,2%7=z=5” hold.
At this time, since (vp=1, yp=1)=(3, 6), (w, z)=(1, 5), <condition #4-2> holds true.
Similarly, in Table 7, with the code of a coding rate of 2/3,
“a#0,1,1%7=a#1,1,1%7=a#2,1,1%7=a#3,1,1%7=a#4,1,1%7=a#5,1,1%7=a#6,1,1%7=vp=1=1”
“a#0,2,1%7=a#1,2,1%7=a#2,2,1%7=a#3,2,1%7=a#4,2,1%7=a#5,2,1%7=a#6,2,1%7=vp=2=2”
“b#0,1%7=b#1,1%7=b#2,1%7=b#3,1%7=b#4,1%7=b#5,1%7=b#6,1%7=w=5”
“a#0,1,2%7=a#1,1,2%7=a#2,1,2%7=a#3,1,2%7=a#4,1,2%7=a#5,1,2%7=a#6,1,2%7=yp=1=4”
“a#0,2,2%7=a#1,2,2%7=a#2,2,2%7=a#3,2,2%7=a#4,2,2%7=a#5,2,2%7=a#6,2,2%7=yp=2=3”
“b#0,2%7=b#1,2%7=b#2,2%7=b#3,2%7=b#4,2%7=b#5,2%7=b#6,2%7=z=6” hold.
At this time, since (vp=1, yp=1)=(1, 4), (vp=2, yp=2)=(2, 3) and (w, z)=(5, 6), <condition #4-1> and <condition #4-2> hold true.
Furthermore, Table 8 shows parity check polynomials of an LDPC-CC of a coding rate of 4/5 when the time varying period is 11 as an example.
By making more severe the constraint conditions of <condition #4-1, condition #4-2>, it is more likely to be able to generate an LDPC-CC of a time varying period of q (q is a prime number equal to or greater than 3) with higher error correction capability. The condition is that <condition #5-1> and <condition #5-2>, or <condition #5-1> or <condition #5-2> should hold true.
<Condition #5-1>
Consider (vp=i, yp=i) and (vp=j, yp=j), where it is assumed that i=1, 2, . . . , n−1, j=1, 2, . . . , n−1, and i≠j. At this time, (vp=i, yp=i)≠(vp=j, yp=j) and (vp=i, yp=i)≠(yp=j, vp=j) hold true for all i's and j's (i≠j).
<Condition #5-2>
Consider (vp=i, yp=i) and (w, z), where it is assumed that i=1, 2, . . . , n−1. At this time, (vp=i, yp=i)≠(w, z) and (vp=i, yp=i)≠(z, w) hold true for all i's.
Furthermore, when vp=i≠yp=1 (i=1, 2, . . . , n−1) and w≠z hold true, it is possible to suppress the occurrence of short loops in a Tanner graph.
In addition, when 2n<q, if (vp=i, yp=i) and (z, w) are different values, it is more likely to be able to generate an LDPC-CC of a time varying period of q (q is a prime number greater than 3) with higher error correction capability.
Furthermore, when 2n≥q, if (vp=i, yp=i) and (z, w) are set so that all values of 0, 1, 2, . . . , q−1 are present, it is more likely to be able to generate an LDPC-CC of a time varying period of q (q is a prime number greater than 3) with higher error correction capability.
In the above description, equation 36 having three terms in X1(D), X2(D), . . . , Xn-1(D) and P(D) has been handled as the g-th parity check polynomial of an LDPC-CC of a time varying period of q (q is a prime number greater than 3). In equation 36, it is also likely to be able to achieve high error correction capability when the number of terms of any of X1(D), X2(D), . . . , Xn-1(D) and P(D) is 1 or 2. For example, the following method is available as the method of setting the number of terms of X1(D) to 1 or 2. In the case of a time varying period of q, there are q parity check polynomials that satisfy 0 and the number of terms of X1(D) is set to 1 or 2 for all the q parity check polynomials that satisfy 0. Alternatively, instead of setting the number of terms of X1(D) to 1 or 2 for all the q parity check polynomials that satisfy 0, the number of terms of X1(D) may be set to 1 or 2 for any number (equal to or less than q−1) of parity check polynomials that satisfy 0. The same applies to X2(D), . . . , Xn-1(D) and P(D). In this case, satisfying the above-described condition constitutes an important condition in achieving high error correction capability. However, the condition relating to the deleted terms is unnecessary.
Even when the number of terms of any of X1(D), X2(D), . . . , Xn-1(D) and P(D) is 4 or more, it is also likely to be able to achieve high error correction capability. For example, the following method is available as the method of setting the number of terms of X1(D) to 4 or more. In the case of a time varying period of q, there are q parity check polynomials that satisfy 0, and the number of terms of X1(D) is set to 4 or more for all the q parity check polynomials that satisfy 0. Alternatively, instead of setting the number of terms of X1(D) to 4 or more for all the q parity check polynomials that satisfy 0, the number of terms of X1(D) may be set to 4 or more for any number (equal to or less than q−1) of the parity check polynomials that satisfy 0. The same applies to X2(D), . . . , Xn-1(D) and P(D). At this time, the above-described condition is excluded for the added terms.
By the way, equation 36 is the g-th parity check polynomial of an LDPC-CC of a coding rate of (n−1)/n and a time varying period of q (q is a prime number greater than 3). In this equation, in the case of, for example, a coding rate of 1/2, the g-th parity check polynomial is represented as shown in equation 37-1. Furthermore, in the case of a coding rate of 2/3, the g-th parity check polynomial is represented as shown in equation 37-2. Furthermore, in the case of a coding rate of 3/4, the g-th parity check polynomial is represented as shown in equation 37-3. Furthermore, in the case of a coding rate of 4/5, the g-th parity check polynomial is represented as shown in equation 37-4. Furthermore, in the case of a coding rate of 5/6, the g-th parity check polynomial is represented as shown in equation 37-5.
[37]
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 37-1)
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Da#g,2,1+Da#g,2,2+1)X2(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 37-2)
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Da#g,2,1+Da#g,2,2+1)X2(D)+(Da#g,3,1+Da#g,3,2+1)X3(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 37-3)
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Da#g,2,1+Da#g,2,2+1)X2(D)+(Da#g,3,1+Da#g,3,2+1)X3(D)+(Da#g,4,1+Da#g,4,2+1)X4(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 37-4)
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Da#g,2,1+Da#g,2,2+1)X2(D)+(Da#g,3,1+Da#g,3,2+1)X3(D)+(Da#g,4,1+Da#g,4,2+1)X4(D)+(Da#g,5,1+Da#g,5,2+1)X5(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 37-5)
[Time Varying Period of q (q is a Prime Number Greater than 3): Equation 38)]
Next, a case will be considered where the g-th (g=0, 1, . . . , q−1) parity check polynomial of a coding rate of (n−1)/n and a time varying period of q (q is a prime number greater than 3) is represented as shown in equation 38.
[38]
(Da#g,1,1+Da#g,1,2+Da#g,1,3)X1(D)+(Da#g,2,1+Da#g,2,2+Da#g,2,3)X2(D)+ . . . +(Da#g,n-1,1+Da#g,n-1,2+Da#g,n-1,3)Xn-1(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 38)
In equation 38, it is assumed that a#g,p,1, a#g,p,2 and a#g,p,3 are natural numbers equal to or greater than 1 and a#g,p,1≠a#g,p,2, a#g,p,1≠a#g,p,3 and a#g,p,2≠a#g,p,3 hold true. Furthermore, it is assumed that b#g,1 and b#g,2 are natural numbers equal to or greater than 1 and b#g,1≠b#g,2 holds true (g=0, 1, 2, . . . , q−2, q−1; p=1, 2, . . . , n−1).
In the same way as in the above description, <condition #6-1>, <condition #6-2> and <condition #6-3> described below are one of important requirements for an LDPC-CC to achieve high error correction capability. In the following conditions, “%” means a modulo and, for example, “α%q” represents a remainder after dividing α by q.
<Condition #6-1>
“a#0,1,1%q=a#1,1,1%q=a#2,1,1%q=a#3,1,1%q= . . . =a#g,1,1%q= . . . =a#q-2,1,1%q=a#q-1,1,1%q=vp=1 (vp=1: fixed-value)”
“a#0,2,1%q=a#1,2,1%q=a#2,2,1%q=a#3,2,1%q= . . . =a#g,2,1%q= . . . =a#q-2,2,1%q=a#q-1,2,1%q=vp=2 (vp=2: fixed-value)”
“a#0,3,1%q=a#1,3,1%q=a#2,3,1%q=a#3,3,1%q= . . . =a#g,3,1%q= . . . =a#q-2,3,1%q=a#q-1,3,1%q=vp=3 (vp=3: fixed-value)”
“a#0,4,1%q=a#1,4,1%q=a#2,4,1%q=a#3,4,1%q= . . . =a#g,4,1%q= . . . =a#q-2,4,1%q=a#q-1,4,1%q=vp=4 (vp=4: fixed-value)”
“a#0,k,1%q=a#1,k,1%q=a#2,k,1%q=a#3,k,1%q= . . . =a#g,k,1%q= . . . =a#q-2,k,1%q=a#q-1,k,1%q=vp=k (vp=k: fixed-value) (therefore, k=1, 2, . . . n−1)”
“a#0,n-2,1%q=a#1,n-2,1%q=a#2,n-2,1%q=a#3,n-2,1%q= . . . =a#g,n-2,1%q= . . . =a#q-2,n-2,1%q=a#q-1,n-2,1%q=vp=n-2 (vp=n-2: fixed-value)”
“a#0,n-1,1%q=a#1,n-1,1%q=a#2,n-1,1%q=a#3,n-1,1%q= . . . =a#g,n-1,1%q= . . . =a#q-2,p-1,1%q=a#q-1,n-1,1%q=vp=n-1 (vp=n-1: fixed-value)” and
“b#0,1%q=b#1,1%q=b#2,1%q=b#3,1%q= . . . =b#g,1%q= . . . =b#q-2,1%q=b#q-1,1%q=w (w: fixed-value)”
<Condition #6-2>
“a#0,1,2%q=a#1,1,2%q=a#2,1,2%q=a#3,1,2%q= . . . =a#g,1,2%q= . . . =a#q-2,1,2%q=a#q-1,1,2%q=yp=1 (yp=1: fixed-value)”
“a#0,2,2%q=a#1,2,2%q=a#2,2,2%q=a#3,2,2%q= . . . =a#g,2,2%q= . . . =a#q-2,2,2%q=a#q-1,2,2%q=yp=2 (yp=2: fixed-value)”
“a#0,3,2%q=a#1,3,2%q=a#2,3,2%q=a#3,3,2%q= . . . =a#g,3,2%q= . . . =a#q-2,3,2%q=a#q-1,3,2%q=yp=3 (yp=3: fixed-value)”
“a#0,4,2%q=a#1,4,2%q=a#2,4,2%q=a#3,4,2%q= . . . =a#g,4,2%q= . . . =a#q-2,4,2%q=a#q-1,4,2%q=yp=4 (yp=4: fixed-value)”
“a#0,k,2%q=a#1,k,2%q=a#2,k,2%q=a#3,k,2%q= . . . =a#g,k,2%q= . . . =a#q-2,k,2%q=a#q-1,k,2%q=yp=k (yp=k: fixed-value) (therefore, k=1, 2, . . . , n−1)”
“a#0,n-2,2%q=a#1,n-2,2%q=a#2,n-2,2%q=a#3,n-2,2%q= . . . =a#g,n-2,2%q= . . . =a#q-2,n-2,2%q=a#q-1,n-2,2%q=yp=n-2 (yp=n-2: fixed-value)”
“a#0,n-1,2%q=a#1,n-1,2%q=a#2,n-1,2%q=a#3,n-1,2%q= . . . =a#g,n-1,2%q= . . . =a#q-2,n-1,2%q=a#q-1,n-1,2%q=yp=n-1 (yp=n-1: fixed-value)” and
“b#0,2%q=b#1,2%q=b#2,2%q=b#3,2%q= . . . =b#g,2%q= . . . =b#q-2,2%q=b#q-1,2%q=z (z: fixed-value)”
<Condition #6-3>
“a#0,1,3%q=a#1,1,3%q=a#2,1,3%q=a#3,1,3%q= . . . =a#g,1,3%q= . . . =a#q-2,1,3%q=a#q-1,1,3%q=sp=1 (sp=1: fixed-value)”
“a#0,2,3%q=a#1,2,3%q=a#2,2,3%q=a#3,2,3%q= . . . =a#g,2,3%q= . . . =a#q-2,2,3%q=a#q-1,2,3%q=sp=2 (sp=2: fixed-value)”
“a#0,3,3%q=a#1,3,3%q=a#2,3,3%q=a#3,3,3%q= . . . =a#g,3,3%q= . . . =a#q-2,3,3%q=a#q-1,3,3%q=sp=3 (sp=3: fixed-value)”
“a#0,4,3%q=a#1,4,3%q=a#2,4,3%q=a#3,4,3%q=′ ‘ ’=a#g,4,3%q= . . . =a#q-2,4,3%q=a#q-1,4,3%q=sp=4 (sp=4: fixed-value)”
“a#0,k,3%q=a#1,k,3%q=a#2,k,3%q=a#3,k,3%q=′ ‘ ’=a#g,k,3%q= . . . =a#q-2,k,3%q=a#q-1,k,3%q=sp=k (sp=k: fixed-value) (therefore, k=1, 2, . . . , n−1)
“a#0,n-2,3%q=a#1,n-2,3%q=a#2,n-2,3%q=a#3,n-2,3%q= . . . =a#g,n-2,3%q= . . . =a#q-2,n-2,3%q=a#q-1,n-2,3%q=sp=n-2 (sp=n-2: fixed-value)”
“a#0,n-1,3%q=a#1,n-1,3%q=a#2,n-1,3%q=a#3,n-1,3%q= . . . =a#g,n-1,3%q= . . . =a#q-2,n-1,3%q=a#q-1,n-1,3%q=sp=n-1 (sp=n-1: fixed-value)”
In addition, consider a set of (vp=1, yp=1, sp=1), (vp=2, yp=2, sp=2), (vp=3, yp=3, sp=3), . . . (vp=k, yp=k, sp=k), . . . , (vp=n-2, yp=n-2, sp=n-2), (vp=n-1, yp=n-1, sp=n-1), and (w, z, 0). Here, it is assumed that k=1, 2, . . . , n−1. When <condition #7-1> or <condition #7-2> holds true, high error correction capability can be achieved.
<Condition #7-1>
Consider (vp=i, yp=i, sp=i) and (vp=j, yp=j, sp=j), where i=1, 2, . . . , n−1, j=1, 2, . . . , n−1, and i≠j. At this time, it is assumed that a set of vp=i, yp=i and sp=i arranged in descending order is (αp=i, βp=i, γp=i), where αp=i≥βp=i and βp=i≥γp=i. Furthermore, it is assumed that a set of vp=j, yp=j and sp=j arranged in descending order is (αp=j, βp=j, γp=j), where αp=j≥βp=j and βp=j≥γp=j. At this time, there are i and j (i≠j) for which (αp=i, βp=i, γp=i)≠(αp=j, βp=j, γp=j) holds true.
<Condition #7-2>
Consider (vp=i, yp=i, sp=i) and (w, z, 0), where it is assumed that i=1, 2, . . . , n−1. At this time, it is assumed that a set of vp=i, yp=i and sp=i arranged in descending order is (αp=i, βp=i, γp=i), where it is assumed that αp=i≥βp=i and βp=i≥γp=i. Furthermore, it is assumed that a set of w, z and 0 arranged in descending order is (αp=i, βp=i, 0), where it is assumed that αp=i≥βp=i. At this time, there is i for which (vp=i, yp=i, sp=i)≠(w, z, 0) holds true.
By making more severe the constraint conditions of <condition #7-1, condition #7-2>, it is more likely to be able to generate an LDPC-CC of a time varying period of q (q is a prime number equal to or greater than 3) with higher error correction capability. The condition is that <condition #8-1> and <condition #8-2>, or <condition #8-1> or <condition #8-2> should hold true.
<Condition #8-1>
Consider (vp=i, yp=i, sp=i) and (vp=j, yp=j, sp=j), where it is assumed that i=1, 2, . . . , n−1, j=1, 2, . . . , n−1, and i≠j. At this time, it is assumed that a set of vp=i, yp=i and sp=i arranged in descending order is (αp=i, βp=i, γp=i), where it is assumed that αp=i≥βp=i and βp=i≥γp=i. Furthermore, it is assumed that a set of vp=j, yp=j and sp=j arranged in descending order is (αp=j, βp=j, γp=j), where it is assumed that αp=j≥βp=j and βp=j≥γp=j. At this time, (αp=i, βp=i, γp=i)≠(αp=j, βp=j, γ=j) holds true for all i's and j's (i≠j).
<Condition #8-2>
Consider (vp=i, yp=i, sp=i) and (w, z, 0), where it is assumed that i=1, 2, . . . , n−1. At this time, it is assumed that a set of vp=i, yp=i and sp=i arranged in descending order is (αp=i, βp=i, γp=i), where it is assumed that αp=i≥βp=i and βp=i≥yp=i. Furthermore, it is assumed that a set of w, z and 0 arranged in descending order is (αp=i, βp=i, 0), where it is assumed that αp=i≥βp=i. At this time, (vp=i, yp=i, sp=i)≠(w, z, 0) holds true for all i's.
Furthermore, when vp=i≠yp=i, vp=i≠sp=i, yp=i≠sp=i (i=1, 2, . . . , n−1), and w≠z hold true, it is possible to suppress the occurrence of short loops in a Tanner graph.
In the above description, equation 38 having three terms in X1(D), X2(D), . . . , Xn-1(D) and P(D) has been handled as the g-th parity check polynomial of an LDPC-CC of a time varying period of q (q is a prime number greater than 3). In equation 38, it is also likely to be able to achieve high error correction capability when the number of terms of any of X1(D), X2(D), . . . , Xn-1(D) and P(D) is 1 or 2. For example, the following method is available as the method of setting the number of terms of X1(D) to 1 or 2. In the case of a time varying period of q, there are q parity check polynomials that satisfy 0 and the number of terms of X1(D) is set to 1 or 2 for all the q parity check polynomials that satisfy 0. Alternatively, instead of setting the number of terms of X1(D) to 1 or 2 for all the q parity check polynomials that satisfy 0, the number of terms of X1(D) may be set to 1 or 2 for any number (equal to or less than q−1) of parity check polynomials that satisfy 0. The same applies to X2(D), . . . , Xn-1(D) and P(D). In this case, satisfying the above-described condition constitutes an important condition in achieving high error correction capability. However, the condition relating to the deleted terms is unnecessary.
Furthermore, high error correction capability may also be likely to be achieved even when the number of terms of any of X1(D), X2(D), . . . , Xn-1(D) and P(D) is 4 or more. For example, the following method is available as the method of setting the number of terms of X1(D) to 4 or more. In the case of a time varying period of q, there are q parity check polynomials that satisfy 0 and the number of terms of X1(D) is set to 4 or more for all the q parity check polynomials that satisfy 0. Alternatively, instead of setting the number of terms of X1(D) to 4 or more for all the q parity check polynomials that satisfy 0, the number of terms of X1(D) may be set to 4 or more for any number (equal to or less than q−1) of parity check polynomials that satisfy 0. The same applies to X2(D), . . . , Xn-1(D) and P(D). At this time, the above-described condition is excluded for the added terms.
[Time Varying Period of h (h is an Integer Other than Prime Numbers Greater than 3): Equation 39)]
Next, a code configuration method when time varying period h is an integer other than prime numbers greater than 3 will be considered.
First, a case will be considered where the g-th (g=0, 1, . . . , h−1) parity check polynomial of a coding rate of (n−1)/n and a time varying period of h (h is an integer other than prime numbers greater than 3) is represented as shown in equation 39.
[39]
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Da#g,2,1+Da#g,2,2+1)X2(D)+ . . . +(Da#g,n-1,1+Da#g,n-1,2+1)Xn-1(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 39)
In equation 39, it is assumed that a#g,p,1 and a#g,p,2 are natural numbers equal to or greater than 1 and a#g,p,1≠a#g,p,2 holds true. Furthermore, it is assumed that b#g,1 and b#g,2 are natural numbers equal to or greater than 1 and b#g,1≠b#g,2 holds true (g=0, 1, 2, . . . , h−2, h−1; p=1, 2, . . . , n−1).
In the same way as in the above description, <condition #9-1> and <condition #9-2> described below are one of important requirements for an LDPC-CC to achieve high error correction capability. In the following conditions, “%” means a modulo and, for example, “α%h” represents a remainder after dividing α by h.
<Condition #9-1>
“a#0,1,1%h=a#1,1,1%h=a#2,1,1%h=a#3,1,1%h= . . . =a#g,1,1%h= . . . =a#h-2,1,1%h=a#h-1,1,1%h=vp=1 (vp=1: fixed-value)”
“a#0,2,1%h=a#1,2,1%h=a#2,2,1%h=a#3,2,1%h= . . . =a#g,2,1%h= . . . =a#h-2,2,1%h=a#h-1,2,1%h=vp=2 (vp=2: fixed-value)”
“a#0,3,1%h=a#1,3,1%h=a#2,3,1%h=a#3,3,1%h= . . . =a#g,3,1%h= . . . =a#h-2,3,1%h=a#h-1,3,1%h=vp=3 (vp=3: fixed-value)”
“a#0,4,1%h=a#1,4,1%h=a#2,4,1%h=a#3,4,1%h= . . . =a#g,4,1%h= . . . =a#h-2,4,1%h=a#h-1,4,1%h=vp=4 (vp=4: fixed-value)”
“a#0,k,1%h=a#1,k,1%h=a#2,k,1%h=a#3,k,1%h= . . . =a#g,k,1%h= . . . =a#h-2,k,1%h=a#h-1,k,1%h=vp=k (vp=k: fixed-value) (therefore, k=1, 2, . . . , n−1)”
“a#0,n-2,1%h=a#1,n-2,1%h=a#2,n-2,1%h=a#3,n-2,1%h= . . . =a#g,n-2,1%h= . . . =a#h-2,n-2,1%h=a#h-1,n-2,1%h=vp=n-2 (vp=n-2: fixed-value)”
“a#0,n-1,1%h=a#1,n-1,1%h=a#2,n-1,1%h=a#3,n-1,1%h= . . . =a#g,n-1,1%h= . . . =a#h-2,n-1,1%h=a#h-1,n-1,1%h=vp=n-1 (vp=n-1: fixed-value)” and
“b#0,1%h=b#1,1%h=b#2,1%h=b#3,1%h= . . . =b#g,1%h= . . . =b#h-2,1%h=b#h-1,1%h=w (w: fixed-value)”
<Condition #9-2>
“a#0,1,2%h=a#1,1,2%h=a#2,1,2%h=a#3,1,2%h= . . . =a#g,1,2%h= . . . =a#h-2,1,2%h=a#h-1,1,2%h=yp=1 (yp=1: fixed-value)”
“a#0,2,2%h=a#1,2,2%h=a#2,2,2%h=a#3,2,2%h= . . . =a#g,2,2%h= . . . =a#h-2,2,2%h=a#h-1,2,2%h=yp=2 (yp=2: fixed-value)”
“a#0,3,2%h=a#1,3,2%h=a#2,3,2%h=a#3,3,2%h= . . . =a#g,3,2%h= . . . =a#h-2,3,2%h=a#h-1,3,2%h=yp=3 (yp=3: fixed-value)”
“a#0,4,2%h=a#1,4,2%h=a#2,4,2%h=a#3,4,2%h= . . . =a#g,4,2%h= . . . =a#h-2,4,2%h=a#h-1,4,2%h=yp=4 (yp=4: fixed-value)”
“a#0,k,2%h=a#1,k,2%h=a#2,k,2%h=a#3,k,2%h= . . . =a#g,k,2%h= . . . =a#h-2,k,2%h=a#h-1,k,2%h=yp=k (yp=k: fixed-value) (therefore, k=1, 2, . . . , n−1)
“a#0,n-2,2%h=a#1,n-2,2%h=a#2,n-2,2%h=a#3,n-2,2%h= . . . =a#g,n-2,2%h= . . . =a#h-2,n-2,2%h=a#h-1,n-2,2%h=yp=n-2 (yp=n-2: fixed-value)”
“a#0,n-1,2%h=a#1,n-1,2%h=a#2,n-1,2%h=a#3,n-1,2%h= . . . =a#g,n-1,2%h= . . . =a#h-2,n-1,2%h=a#h-1,n-1,2%h=yp=n-1 (yp=n-1: fixed-value)” and
“b#0,2%h=b#1,2%h=b#2,2%h=b#3,2%h= . . . =b#g,2%h= . . . =b#h-2,2%h=b#h-1,2%h=z (z: fixed-value)”
In addition, as described above, high error correction capability can be achieved by adding <condition #10-1> or <condition #10-2>.
<Condition #10-1>
In <condition #9-1>, vp=1, vp=2, vp=3, vp=4, . . . , vp=k, . . . , vp=n-2, vp=n-1 (k=1, 2, . . . , n−1) and w are set to “1” and “natural numbers other than divisors of a time varying period of h.”
<Condition #10-2>
In <condition #9-2>, yp=1, yp=2, yp=3, yp=4, . . . , yp=k, . . . , yp=n-2, yp=n-1 (k=1, 2, . . . , n−1) and z are set to “1” and “natural numbers other than divisors of a time varying period of h.”
Then, consider a set of (vp=1, yp=1), (vp=2, yp=2), (vp=3, yp=3), (vp=k, yp=k), . . . , (vp=n-2, yp=n-2), (vp=n-1, yp=n-1) and (w, z). Here, it is assumed that k=1, 2, . . . , n−1. If <condition #11-1> or <condition #11-2> holds true, higher error correction capability can be achieved.
<Condition #11-1>
Consider (vp=i, yp=i) and (vp=j, yp=j), where it is assumed that i=1, 2, . . . , n−1, j=1, 2, . . . , n−1 and i≠j. At this time, there are i and j (i≠j) for which (vp=i, yp=i)≠(vp=j, yp=j) and (vp=i, yp=i)≠(yp=j, vp=j) hold true.
<Condition #11-2>
Consider (vp=i, yp=i) and (w, z), where it is assumed that i=1, 2, . . . , n−1. At this time, there is i for which (vp=i, yp=i)≠(w, z) and (vp=i, yp=i)≠(z, w) hold true.
Furthermore, by making more severe the constraint conditions of <condition #11-1, condition #11-2>, it is more likely to be able to generate an LDPC-CC of a time varying period of h (h is an integer other than prime numbers greater than 3) with higher error correction capability. The condition is that <condition #12-1> and <condition #12-2>, or <condition #12-1> or <condition #12-2> should hold true.
<Condition #12-1>
Consider (vp=i, yp=i) and (vp=j, yp=j), where it is assumed that i=1, 2, . . . , n−1, j=1, 2, . . . , n−1 and i≠j. At this time, (vp=i, yp=i)≠(vp=j, yp=j) and (vp=i, yp=i)≠(yp=j, vp=j) hold true for all i's and j's
<Condition #12-2>
Consider (vp=i, yp=i) and (w, z), where it is assumed that i=1, 2, . . . , n−1. At this time, (vp=i, yp=i)≠(w, z) and (vp=i, yp=i)≠(z, w) hold true for all i's.
Furthermore, when vp=i≠yp=i (i=1, 2, . . . , n−1) and w≠z hold true, it is possible to suppress the occurrence of short loops in a Tanner graph.
In the above description, equation 39 having three terms in X1(D), X2(D), . . . , Xn-1(D) and P(D) has been handled as the g-th parity check polynomial of an LDPC-CC of a time varying period of h (h is an integer other than prime numbers greater than 3). In equation 39, it is also likely to be able to achieve high error correction capability when the number of terms of any of X1(D), X2(D), . . . , Xn-1(D) and P(D) is 1 or 2. For example, the following method is available as the method of setting the number of terms of X1(D) to 1 or 2. In the case of a time varying period of h, there are h parity check polynomials that satisfy 0 and the number of terms of X1(D) is set to 1 or 2 for all the h parity check polynomials that satisfy 0. Alternatively, instead of setting the number of terms of X1(D) to 1 or 2 for all the h parity check polynomials that satisfy 0, the number of terms of X1(D) may be set to 1 or 2 for any number (equal to or less than h−1) of parity check polynomials that satisfy 0. The same applies to X2(D), . . . , Xn-1(D) and P(D). In this case, satisfying the above-described condition constitutes an important condition in achieving high error correction capability. However, the condition relating to the deleted terms is unnecessary.
Moreover, even when the number of terms of any of X1(D), X2(D), . . . , Xn-1(D) and P(D) is 4 or more, it is also likely to be able to achieve high error correction capability. For example, the following method is available as the method of setting the number of terms of X1(D) to 4 or more. In the case of a time varying period of h, there are h parity check polynomials that satisfy 0, and the number of terms of X1(D) is set to 4 or more for all the h parity check polynomials that satisfy 0. Alternatively, instead of setting the number of terms of X1(D) to 4 or more for all the h parity check polynomials that satisfy 0, the number of terms of X1(D) may be set to 4 or more for any number (equal to or less than h−1) of parity check polynomials that satisfy 0. The same applies to X2(D), . . . , Xn-1(D) and P(D). At this time, the above-described condition is excluded for the added terms.
By the way, equation 39 is the g-th parity check polynomial of an LDPC-CC of a coding rate of (n−1)/n and a time varying period of h (h is an integer other than prime numbers greater than 3). In this equation, in the case of, for example, a coding rate of 1/2, the g-th parity check polynomial is represented as shown in equation 40-1. Furthermore, in the case of a coding rate of 2/3, the g-th parity check polynomial is represented as shown in equation 40-2. Furthermore, in the case of a coding rate of 3/4, the g-th parity check polynomial is represented as shown in equation 40-3. Furthermore, in the case of a coding rate of 4/5, the g-th parity check polynomial is represented as shown in equation 40-4. Furthermore, in the case of a coding rate of 5/6, the g-th parity check polynomial is represented as shown in equation 40-5.
[40]
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 40-1)
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Da#g,2,1+Da#g,2,2+1)X2(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 40-2)
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Da#g,2,1+Da#g,2,2+1)X2(D)+(Da#g,3,1+Da#g,3,2+1)X3(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 40-3)
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Da#g,2,1+Da#g,2,2+1)X2(D)+(Da#g,3,1+Da#g,3,2+1)X3(D)+(Da#g,4,1+Da#g,4,2+1)X4(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 40-4)
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Da#g,2,1+Da#g,2,2+1)X2(D)+(Da#g,3,1+Da#g,3,2+1)X3(D)+(Da#g,4,1+Da#g,4,2+1)X4(D)+(Da#g,5,1+Da#g,5,2+1)X5(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 40-5)
[Time Varying Period h (h is an Integer Other than Prime Numbers Greater than 3): Equation 41)]
Next, a case will be considered where the g-th (g=0, 1, . . . , h−1) parity check polynomial (that satisfies 0) of a time varying period of h (h is an integer other than prime numbers greater than 3) is represented as shown in equation 41.
[41]
(Da#g,1,1+Da#g,1,2+Da#g,1,3)X1(D)+(Da#g,2,1+Da#g,2,2+Da#g,2,3)X2(D)+ . . . +(Da#g,n-1,1+Da#g,n-1,2+Da#g,n-1,3)Xn-1(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 41)
In equation 41, it is assumed that a#g,p,1, a#g,p,2 and a#g,p,3 are natural numbers equal to or greater than 1 and a#g,p,1≠a#g,p,2, a#g,p,1≠a#g,p,3 and a#g,p,2≠a#g,p,3 hold true. Furthermore, it is assumed that b#g,1 and b#g,2 are natural numbers equal to or greater than 1 and b#g,1≠b#g,2 holds true (g=0, 1, 2, . . . , h−2, h−1; p=1, 2, . . . , n−1).
As in the case of the above description, <condition #13-1>, <condition #13-2> and <condition #13-3> described below are one of important requirements for an LDPC-CC to achieve high error correction capability. In the following conditions, “%” means a modulo and, for example, “α%h” represents a remainder after dividing α by q.
<Condition #13-1>
“a#0,1,1%h=a#1,1,1%h=a#2,1,1%h=a#3,1,1%h= . . . =a#g,1,1%h= . . . =a#h-2,1,1%h=a#h-1,1,1%h=vp=1 (vp=1: fixed-value)”
“a#0,2,1%h=a#1,2,1%h=a#2,2,1%h=a#3,2,1%h= . . . =a#g,2,1%h= . . . =a#h-2,2,1%h=a#h-1,2,1%h=vp=2 (vp=2: fixed-value)”
“a#0,3,1%h=a#1,3,1%h=a#2,3,1%h=a#3,3,1%h= . . . =a#g,3,1%h= . . . =a#h-2,3,1%h=a#h-1,3,1%h=vp=3 (vp=3: fixed-value)”
“a#0,4,1%h=a#1,4,1%h=a#2,4,1%h=a#3,4,1%h= . . . =a#g,4,1%h= . . . =a#h-2,4,1%h=a#h-1,4,1%h=vp=4 (vp=4: fixed-value)”
“a#0,k,1%h=a#1,k,1%h=a#2,k,1%h=a#3,k,1%h= . . . =a#g,k,1%h= . . . =a#h-2,k,1%h=a#h-1,k,1%h=vp=k (vp=k: fixed-value) (therefore, k=1, 2, . . . , n−1)
“a#0,n-2,1%h=a#1,n-2,1%h=a#2,n-2,1%h=a#3,n-2,1%h= . . . =a#g,n-2,1%h= . . . =a#h-2,n-2,1%h=a#h-1,n-2,1%h=vp=n-2 (vp=n-2: fixed-value)”
“a#0,n-1,1%h=a#1,n-1,1%h=a#2,n-1,1%h=a#3,n-1,1%h= . . . =a#g,n-1,1%h= . . . =a#h-2,n-1,1%h=a#h-1,n-1,1%h=vp=n-1 (vp=n-1: fixed-value)” and
“b#0,1%h=b#1,1%h=b#2,1%h=b#3,1%h= . . . =b#g,1%h= . . . =b#h-2,1%h=b#h-1,1%h=w (w: fixed-value)”
<Condition #13-2>
“a#0,1,2%h=a#1,1,2%h=a#2,1,2%h=a#3,1,2%h= . . . =a#g,1,2%h= . . . =a#h-2,1,2%h=a#h-1,1,2%h=yp=1 (yp=1: fixed-value)”
“a#0,2,2%h=a#1,2,2%h=a#2,2,2%h=a#3,2,2%h= . . . =a#g,2,2%h= . . . =a#h-2,2,2%h=a#h-1,2,2%h=yp=2 (yp=2: fixed-value)”
“a#0,3,2%h=a#1,3,2%h=a#2,3,2%h=a#3,3,2%h= . . . =a#g,3,2%h= . . . =a#h-2,3,2%h=a#h-1,3,2%h=yp=3 (yp=3: fixed-value)”
“a#0,4,2%h=a#1,4,2%h=a#2,4,2%h=a#3,4,2%h= . . . =a#g,4,2%h= . . . =a#h-2,4,2%h=a#h-1,4,2%h=yp=4 (yp=4: fixed-value)”
“a#0,k,2%h=a#1,k,2%h=a#2,k,2%h=a#3,k,2%h= . . . =a#g,k,2%h= . . . =a#h-2,k,2%h=a#h-1,k,2%h=yp=k (yp=k: fixed-value) (therefore, k=1, 2, . . . , n−1)
“a#0,n-2,2%h=a#1,n-2,2%h=a#2,n-2,2%h=a#3,n-2,2%h= . . . =a#g,n-2,2%h= . . . =a#h-2,n-2,2%h=a#h-1,n-2,2%h=yp=n-2 (yp=n-2: fixed-value)”
“a#0,n-1,2%h=a#1,n-1,2%h=a#2,n-1,2%h=a#3,n-1,2%h= . . . =a#g,n-1,2%h= . . . =a#h-2,n-1,2%h=a#h-1,n-1,2%h=yp=n-1 (yp=n-1: fixed-value)” and
“b#0,2%h=b#1,2%h=b#2,2%h=b#3,2%h= . . . =b#g,2%h= . . . =b#h-2,2%h=b#h-1,2%h=z (z: fixed-value)”
<Condition #13-3>
“a#0,1,3%h-a#1,1,3%h=a#2,1,3%h=a#3,1,3%h= . . . =a#g,1,3%h= . . . =a#h-2,1,3%h=a#h-1,1,3%h=sp=1 (sp=1: fixed-value)”
“a#0,2,3%h=a#1,2,3%h=a#2,2,3%h=a#3,2,3%h= . . . =a#g,2,3%h= . . . =a#h-2,2,3%h=a#h-1,2,3%h=sp=2 (sp=2: fixed-value)”
“a#0,3,3%h=a#1,3,3%h=a#2,3,3%h=a#3,3,3%h= . . . =a#g,3,3%h= . . . =a#h-2,3,3%h=a#h-1,3,3%h=sp=3 (sp=3: fixed-value)”
“a#0,4,3%h=a#1,4,3%h=a#2,4,3%h=a#3,4,3%h= . . . =a#g,4,3%h= . . . =a#h-2,4,3%h=a#h-1,4,3%h=sp=4 (sp=4: fixed-value)”
“a#0,k,3%h=a#1,k,3%h=a#2,k,3%h=a#3,k,3%h= . . . =a#g,k,3%h= . . . =a#h-2,k,3%h=a#h-1,k,3%h=sp=k (sp=k: fixed-value) (therefore, k=1, 2, . . . , n−1)
“a#0,n-2,3%h=a#1,n-2,3%h=a#2,n-2,3%h=a#3,n-2,3%h= . . . =a#g,n-2,3%h= . . . =a#h-2,n-2,3%h=a#h-1,n-2,3%h=sp=n-2 (sp=n-2: fixed-value)”
“a#0,n-1,3%h=a#1,n-1,3%h=a#2,n-1,3%h=a#3,n-1,3%h= . . . =a#g,n-1,3%h= . . . =a#h-2,n-1,3%h=a#h-1,n-1,3%h=sp=n-1 (sp=n-1: fixed-value)”
In addition, consider a set of (vp=1, yp=1, sp=1), (vp=2, yp=2, sp=2), (vp=3, yp=3, sp=3), (vp=k, yp=k, sp=k), . . . , (vp=n-2, yp=n-2, sp=n-2), (vp=n-1, yp=n-1, sp=n-1) and (w, z, 0). Here, it is assumed that k=1, 2, . . . , n−1. When <condition #14-1> or <condition #14-2> holds true, high error correction capability can be achieved.
<Condition #14-1>
Consider (vp=i, yp=i, sp=i) and (vp=j, yp=j, sp=j), where i=1, 2, . . . , n−1, j=1, 2, . . . , n−1, and i≠j. At this time, it is assumed that a set of vp=i, yp=i, sp=i arranged in descending order is (αp=i, βp=i, γp=i), where αp=i≥βp=i, βp=i≥γp=i. Furthermore, it is assumed that a set of vp=j, yp=j, sp=j arranged in descending order is (αp=j, βp=j, γp=j), where αp=j≥βp=j, βp=j≥γp=j. At this time, there are i and j (i≠j) for which (αp=i, βp=i, γp=i)≠(αp=j, βp=j, γp=j) holds true.
<Condition #14-2>
Consider (vp=i, yp=i, sp=i) and (w, z, 0), where it is assumed that i=1, 2, . . . , n−1. At this time, it is assumed that a set of vp=i, yp=i, sp=i arranged in descending order is (αp=i, βp=i, γp=i), where it is assumed that αp=i≥βp=i and βp=i≥γp=i. Furthermore, it is assumed that a set of w, z and 0 arranged in descending order is (αp=i, βp=i, 0), where it is assumed that αp=i≥βp=i. At this time, there is i for which (vp=i, yp=i, sp=i)≠(w, z, 0) holds true.
Furthermore, by making more severe the constraint conditions of <condition #14-1, condition #14-2>, it is more likely to be able to generate an LDPC-CC of a time varying period of h (h is an integer other than prime numbers equal to or greater than 3) with higher error correction capability. The condition is that <condition #15-1> and <condition #15-2>, or <condition #15-1> or <condition #15-2> should hold true.
<Condition #15-1>
Consider (vp=i, yp=i, sp=i) and (vp=j, yp=j, sp=j), where it is assumed that i=1, 2, . . . , n−1, j=1, 2, . . . , n−1, and i≠j. At this time, it is assumed that a set of vp=i, yp=i, sp=i arranged in descending order is (αp=i, βp=i, γp=i), where it is assumed that αp=i≥βp=i and βp=i≥γp=i. Furthermore, it is assumed that a set of vp=j, yp=j, sp=j arranged in descending order is (αp=j, βp=j, γp=j), where αp=j≥βp=j and βp=j≥γp=j. At this time, (αp=i, βp=i, γp=i)≠(αp=j, βp=j, γp=j) holds true for all i's and j's (i≠j).
<Condition #15-2>
Consider (vp=i, yp=i, sp=i) and (w, z, 0), where it is assumed that i=1, 2, . . . , n−1. At this time, it is assumed that a set of vp=i, yp=i, sp=i arranged in descending order is (αp=i, βp=i, γp=i), where it is assumed that αp=i≥βp=i and βp=i≥γp=i. Furthermore, it is assumed that a set of w, z and 0 arranged in descending order is (αp=i, βp=i, 0), where it is assumed that αp=i≥βp=i. At this time, (vp=i, yp=i, sp=i)≠(w, z, 0) holds true for all i's.
Furthermore, when vp=i≠yp=i, vp=i≠sp=i, yp=i≠sp=i (i=1, 2, . . . , n−1), and w≠z hold true, it is possible to suppress the occurrence of short loops in a Tanner graph.
In the above description, equation 41 having three terms in X1(D), X2(D), . . . , Xn-1(D) and P(D) has been handled as the g-th parity check polynomial of an LDPC-CC of a time varying period of h (h is an integer other than prime numbers greater than 3). In equation 41, it is also likely to be able to achieve high error correction capability when the number of terms of any of X1(D), X2(D), . . . , Xn-1(D) and P(D) is 1 or 2. For example, the following method is available as the method of setting the number of terms of X1(D) to 1 or 2. In the case of a time varying period of h, there are h parity check polynomials that satisfy 0 and the number of terms of X1(D) is set to 1 or 2 for all the h parity check polynomials that satisfy 0. Alternatively, instead of setting the number of terms of X1(D) to 1 or 2 for all the h parity check polynomials that satisfy 0, the number of terms of X1(D) may be set to 1 or 2 for any number (equal to or less than h−1) of parity check polynomials that satisfy 0. The same applies to X2(D), . . . , Xn-1(D) and P(D). In this case, satisfying the above-described condition constitutes an important condition in achieving high error correction capability. However, the condition relating to the deleted terms is unnecessary.
Furthermore, it is likely to be able to achieve high error correction capability also when the number of terms of any of X1(D), X2(D), . . . , Xn-1(D) and P(D) is 4 or more. For example, the following method is available as the method of setting the number of terms of X1(D) to 4 or more. In the case of a time varying period of h, there are h parity check polynomials that satisfy 0 and the number of terms of X1(D) is set to 4 or more for all the h parity check polynomials that satisfy 0. Alternatively, instead of setting the number of terms of X1(D) to 4 or more for all the h parity check polynomials that satisfy 0, the number of terms of X1(D) may be set to 4 or more for any number (equal to or less than h−1) of parity check polynomials that satisfy 0. The same applies to X2(D), . . . , Xn-1(D) and P(D). At this time, the above-described condition is excluded for the added terms.
As described above, the present embodiment has described an LDPC-CC based on parity check polynomials of a time varying period greater than 3, and more particularly, the code configuration method of an LDPC-CC based on parity check polynomials of a time varying period of a prime number greater than 3. As described in the present embodiment, it is possible to achieve higher error correction capability by forming parity check polynomials and performing encoding of an LDPC-CC based on the parity check polynomials.
The present embodiment will describe, in detail, an LDPC-CC encoding method and the configuration of an encoder based on the parity check polynomials described in Embodiment 1.
First, consider an LDPC-CC of a coding rate of 1/2 and a time varying period of 3 as an example. Parity check polynomials of a time varying period of 3 are provided below.
[42]
(D2+D1+1)X1(D)+(D3+D1+1)P(D)=0 (Equation 42-0)
(D3+D1+1)X1(D)+(D2+D1+1)P(D)=0 (Equation 42-1)
(D3+D2+1)X1(D)+(D3+D2+1)P(D)=0 (Equation 42-2)
At this time, P(D) is obtained as shown in the equations below.
[43]
(D2+D1+1)X1(D)+(D3+D1+1)P(D)=0 (Equation 43-0)
(D3+D1+1)X1(D)+(D2+D1+1)P(D)=0 (Equation 43-1)
(D3+D2+1)X1(D)+(D3+D2+1)P(D)=0 (Equation 43-2)
Equations 43-0 to 43-2 are then represented as follows:
[44]
P[i]=X1[i]⊕X1[i−1]⊕X1[i−2]⊕P[i−1]⊕P[i−3] (Equation 44-0)
P[i]=X1[i]⊕X1[i−1]⊕X1[i−3]⊕P[i−1]⊕P[i−2] (Equation 44-1)
P[i]=X1[i]⊕X1[i−2]⊕X1[i−3]⊕P[i−2]⊕P[i−3] (Equation 44-2)
where the symbol “⊕” represents the exclusive OR.
At this time,
At point in time i=3k, the parity bit at point in time i is obtained through the circuit shown in
Encoding can be performed also when the time varying period is other than 3 and the coding rate is (n−1)/n in the same way as that described above. For example, the g-th (g=0, 1, . . . , q−1) parity check polynomial of an LDPC-CC of a time varying period of q and a coding rate of (n−1)/n is represented as shown in equation 36, and therefore P(D) is represented as follows, where q is not limited to a prime number.
[45]
P(D)=(Da·g,1,1+Da·g,1,2+1)X1(D)+(Da·g,2,1+Da·g,2,2+1)X2(D)+ . . . +(Da·g,n-1,1+Da·g,n-1,2+1)Xn-1(D)+(Db·g,1+Db·g,1)P(D) (Equation 45)
When expressed in the same way as equations 44-0 to 44-2, equation 45 is represented as follows:
[46]
P[i]=X1[i]⊕X1[i−a#g,1,1]⊕X1[i−a#g,1,2]⊕X2[i]⊕X2[i−a#g,2,1]⊕X2[i−a#g,2,2]⊕ . . . ⊕Xn-1[i]⊕Xn-1[i−a#g,n-1,1]⊕Xn-1[i−a#g,n-1,2]⊕P[i−b#g,1]⊕P[i−b#g,2] (Equation 46)
where the symbol “⊕” represents the exclusive OR.
Here, Xr[i] (r=1, 2, . . . , n−1) represents an information bit at point in time i and P[i] represents a parity bit at point in time i.
Therefore, when i%q=k at point in time i, the parity bit at point in time i in equation 45 and equation 46 can be achieved using an equation resulting from substituting k for g in equation 45 and equation 46.
Since the LDPC-CC according to the invention of the present application is a kind of convolutional code, securing belief in decoding of information bits requires termination or tail-biting. The present embodiment will consider a case where termination is performed (hereinafter “information-zero-termination” or simply “zero-termination”).
If the encoder performs encoding only until point in time s and the transmitting apparatus on the encoding side performs transmission only up to Ps to the receiving apparatus on the decoding side, receiving quality of information bits of the decoder considerably deteriorates. To solve this problem, encoding is performed assuming information bits from final information bit Xn-1,s onward (hereinafter “virtual information bits”) to be “0” and a parity bit (1603) is generated.
To be more specific, as shown in
In termination such as “information-zero-termination,” for example, LDPC-CC encoder 100 in
Assuming a sub-matrix (vector) in equation 36 to be Hg, a g-th sub-matrix can be represented as the equation below.
Here, n continuous “1”s correspond to the terms of X1(D), X2(D), . . . Xn-1(D) and P(D) in equation 36.
Therefore, when termination is used, the LDPC-CC check matrix of a coding rate of (n−1)/n and a time varying period of q represented by equation 36 is represented as shown in
As shown in
As described above, the encoder receives information bits Xr[i] (r=1, 2, . . . , n−1) at point in time i as input, generates parity bit P[i] at point in time i using equation 46, outputs parity bit [i], and can thereby perform encoding of the LDPC-CC described in Embodiment 1.
The present embodiment will specifically describe a code configuration method for achieving higher error correction capability when simple tail-biting described in Non-Patent Literatures 10 and 11 is performed for an LDPC-CC based on the parity check polynomials described in Embodiment 1.
A case has been described in Embodiment 1 where a g-th (g=0, 1, . . . , q−1) parity check polynomial of an LDPC-CC of a time varying period of q (q is a prime number greater than 3) and a coding rate of (n−1)/n is represented as shown in equation 36. The number of terms of each of X1(D), X2(D), . . . , Xn-1(D) and P(D) in equation 36 is 3 and in this case, Embodiment 1 has specifically described the code configuration method (constraint condition) for achieving high error correction capability. Moreover, Embodiment 1 has pointed out that even when the number of terms of one of X1(D), X2(D), . . . , Xn-1(D) and P(D) is 1 or 2, high error correction capability may be likely to be achieved.
Here, when the term of P(D) is assumed to be 1, the code is a feed forward convolutional code (LDPC-CC), and therefore tail-biting can be performed easily based on Non-Patent Literatures 10 and 11. The present embodiment will describe this aspect more specifically.
When the term of P(D) of g-th (g=0, 1, . . . , q−1) parity check polynomial (36) of an LDPC-CC of a time varying period of q and a coding rate of (n−1)/n is 1, the g-th parity check polynomial is represented as shown in equation 48.
[48]
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Da#g,2,1+Da#g,2,2+1)X2(D)+ . . . +(Da#g,n-1,1+Da#g,n-1,2+1)Xn-1(D)+P(D)=0 (Equation 48)
According to the present embodiment, time varying period q is not limited to a prime number equal to or greater than 3. However, it is assumed that the constraint condition described in Embodiment 1 will be observed. However, it is assumed that the condition relating to the deleted terms of P(D) will be excluded.
From equation 48, P(D) is represented as shown below.
[49]
P(D)=(Da#g,1,1+Da#g,1,2+1)X1(D)+(Da#g,2,1+Da#g,2,2+1)X2(D)+ . . . +(Da#g,n-1,1+Da#g,n-1,2+1)Xn-1(D) (Equation 49)
When represented in the same way as equations 44-0 to 44-2, equation 49 is represented as follows:
[50]
P[i]=X1[i]⊕X1[i−a#g,1,1]⊕X1[i−a#g,1,2]⊕X2[i]⊕X2[i−a#g,2,1]⊕X2[i−a#g,2,2]⊕ . . . ⊕Xn-1[i]⊕Xn-1[i−a#g,n-1,1]⊕Xn-1[i−a#g,n-1,2] (Equation 50)
where “⊕” represents the exclusive OR.
Therefore, when i%q=k at point in time i, the parity bit at point in time i can be achieved in equation 49 and equation 50 using an equation resulting from substituting k for g in equation 49 and equation 50. However, details of operation when performing tail-biting will be described later.
Next, the configuration and block size of the check matrix when performing tail-biting on the LDPC-CC of a time varying period of q and a coding rate of (n−1)/n defined in equation 49 will be described in detail.
Non-Patent Literature 12 describes a general equation of a parity check matrix when performing tail-biting on a time-varying LDPC-CC. Equation 51 is a parity check matrix when performing tail-biting described in Non-Patent Literature 12.
In equation 51, H represents a parity check matrix and HT represents a syndrome former. Furthermore, HTi(t) (i=0, 1, . . . , Ms) represents a sub-matrix of c·(c−b) and Ms represents a memory size.
However, Non-Patent Literature 12 does not show any specific code of the parity check matrix nor does it describe any code configuration method (constraint condition) for achieving high error correction capability.
Hereinafter, the code configuration method (constraint condition) will be described in detail for achieving high error correction capability even when performing tail-biting on an LDPC-CC of a time varying period of q and a coding rate of (n−1)/n defined in equation 49.
To achieve high error correction capability in an LDPC-CC of a time varying period of q and a coding rate of (n−1)/n defined in equation 49, the following condition becomes important in parity check matrix H considered necessary in decoding.
<Condition #16>
The number of rows of the parity check matrix is a multiple of q.
Therefore, the number of columns of the parity check matrix is a multiple of n×q. That is, (e.g.) a log likelihood ratio required in decoding corresponds to bits of a multiple of n×q.
However, the parity check polynomial of an LDPC-CC of a time varying period of q and a coding rate of (n−1)/n required in above <condition #16> is not limited to equation 48, but may be a parity check polynomial such as equation 36 or equation 38. Furthermore, the number of terms of each of X1(D), X2(D), . . . , Xn-1(D) and P(D) in equation 38 is 3, but the number of terms is not limited to 3. Furthermore, the time varying period of q may be any value equal to or greater than 2.
Here, <condition #16> will be discussed.
When information bits X1, X2, . . . , Xn-1, and parity bit P at point in time i are represented by X1,i, X2,i, . . . , Xn-1,i, and Pi respectively, tail-biting is performed as i=1, 2, 3, . . . , q, . . . , q×(N−1)+1, q×(N−1)+2, q×(N−1)+3, . . . , q×N to satisfy <condition #16>.
At this time, transmission sequence u becomes u=(X1,1, X2,1, . . . , Xn-1,1, P0, X1,2, X2,2, . . . , Xn-1,2, P2, . . . , X1,k, X2,k, . . . , Xn-1,k, Pk, . . . , X1,q×N, X2,q×N, . . . , Xn-1,q×N, Pq×N)T and Hu=0 holds true. The configuration of the parity check matrix at this time will be described using
Assuming the sub-matrix (vector) of equation 48 to be Hg, the g-th sub-matrix can be represented as shown in the equation below.
Here, n continuous “1”s correspond to the terms of X1(D), X2(D), . . . Xn-1(D) and P(D) in equation 48.
Of the parity check matrix corresponding to transmission sequence u defined above,
In
Furthermore, column group 1804 represents a column group corresponding to point in time q×N. In column group 1804, a transmission sequence is arranged in order of X1,q×N, X2,q×N, . . . , Xn-1,q×N, and Pq×N. Column group 1803 represents a column group corresponding to point in time q×N−1. In column group 1803, a transmission sequence is arranged in order of X1,q×N-1, X2,q×N-1, . . . , Xn-1,q×N-1 and Pq×N-1.
Next, the order of the transmission sequence is changed to u=( . . . , X1,q×N-1, X2,q×N-1, . . . , Xn-1,q×N-1, Pq×N-1, X1,q×N, X2,q×N, . . . , Xn-1,q×N, Pq×N, X1,0, X2,1, . . . , Xn-1,1, P1, X1,2, X2,2, . . . , Xn-1,2, P2, . . . )T. Of the parity check matrix corresponding to transmission sequence u,
As shown in
Column group 1803 represents a column group corresponding to point in time q×N−1 and column group 1803 is arranged in order of X1,q×N-1, X2,q×N-1, . . . , Xn-1,q×N-1, and Pq×N-1. Column group 1804 represents a column group corresponding to point in time q×N and column group 1804 is arranged in order of X1,q×N, X2,q×N, . . . , Xn-1,q×N, and Pq×N. Column group 1807 represents a column group corresponding to point in time 1 and column group 1807 is arranged in order of X1,1, X2,1, . . . , Xn-1,1, and P1. Column group 1808 represents a column group corresponding to point in time 2 and column group 1808 is arranged in order of X1,2, X2,2, . . . , Xn-1,2, and P2.
When the parity check matrix in the vicinity of point in time q×N−1 (1803) or point in time q×N (1804) is represented as shown in
At this time, a portion of the parity check matrix shown in
When the parity check matrix satisfies <condition #16>, if the parity check matrix is represented as shown in
The time-varying LDPC-CC described in Embodiment 1 is such a code that the number of short cycles (cycles of length) in a Tanner graph is reduced. Embodiment 1 has shown the condition to generate such a code that the number of short cycles in a Tanner graph is reduced. Here, when tail-biting is performed, it is important that the number of rows of the parity check matrix be a multiple of q (<condition #16>) to reduce the number of short cycles in a Tanner graph. In this case, if the number of rows of the parity check matrix is a multiple of q, all parity check polynomials of a time varying period of q are used. Thus, as described in Embodiment 1, by adopting a code in which the number of short cycles in a Tanner graph is reduced for the parity check polynomial, it is possible to reduce the number of short cycles in a Tanner graph also when performing tail-biting. Thus, <condition #16> is an important requirement in reducing the number of short cycles in a Tanner graph also when performing tail-biting.
However, the communication system may require some contrivance to satisfy <condition #16> for a block length (or information length) required in the communication system when performing tail-biting. This will be described by taking an example.
Encoder 1911 receives information as input, performs encoding, and generates and outputs a transmission sequence. Modulation section 1912 receives a transmission sequences as input, performs predetermined processing such as mapping, quadrature modulation, frequency conversion and amplification, and outputs a transmission signal. The transmission signal arrives at receiving section 1921 of receiving apparatus 1920 via a communication medium (radio, power line, light or the like).
Receiving section 1921 receives a received signal as input, performs processing such as amplification, frequency conversion, quadrature demodulation, channel estimation and demapping and outputs a baseband signal and a channel estimation signal.
Log likelihood ratio generating section 1922 receives the baseband signal and the channel estimation signal as input, generates a log likelihood ratio in bit units and outputs a log likelihood ratio signal.
Decoder 1923 receives the log likelihood ratio signal as input, performs iterative decoding using BP decoding in particular here and outputs an estimation transmission sequence and/or an estimation information sequence.
For example, consider an LDPC-CC of a coding rate 1/2 and a time varying period of 11. Assuming that tail-biting is performed at this time, the set information length is designated 16384. The information bits are designated X1,1, X1,2, X1,3, . . . , X1,16384. If parity bits are determined without any contrivance, P1, P2, P3, . . . , P16384 are determined.
However, even when a parity check matrix is created for transmission sequence u=(X1,1, P1, X1,2, P2, X1,16384, P16384), <condition #16> is not satisfied. Therefore, X1,16385, X1,16386, X1,16387, X1,16388 and X1,16389 may be added as the transmission sequence so that encoder 1911 determines P16385, P16386, P16387, P16388 and P16389.
At this time, encoder 1911 sets, for example, X1,16385=0, X1,16386=0, X1,16387=0, X1,16388=0 and X1,16389=0, performs encoding and determines P16385, P16386, P16387, P16388 and P16389. However, if a promise that X1,16385=0, X1,16386=0, X1,16387=0, X1,16388=0 and X1,16389=0 are set is shared between encoder 1911 and decoder 1923, X1,16385, X1,16386, X1,16387, X1,16388 and X1,16389 need not be transmitted.
Therefore, encoder 1911 receives information sequence=(X1,1, X1,2, X1,3, . . . , X1,16384, X1,16385, X1,16386, X1,16387, X1,16388, X1,16389)=(X1,1, X1,2, X1,3, . . . , X1,16384, 0, 0, 0, 0, 0) as input and obtains sequence (X1,1, P1, X1,2, P2, X1,16384, P16384, X1,16385, P16385, X1,16386, P16386, X1,16387, P16387, X1,16388, P16388, X1,16389, P16389)=(X1,1, P1, X1,2, P2, X1,16384, P16384, 0, P16385, 0, P16386, 0, P16387, 0, P16388, 0, P16389).
Transmitting apparatus 1910 then deletes “0”s known between encoder 1911 and decoder 1923, and transmits (X1,1, P1, X1,2, P2, X1,16384, P16384, P16385, P16386, P16387, P16388, P16389) as a transmission sequence.
Receiving apparatus 1920 obtains, for example, log likelihood ratios for each transmission sequence as LLR(X1,1), LLR(P1), LLR(X1,2), LLR(P2), LLR(X1,16384), LLR(P16384), LLR(P16385), LLR(P16386), LLR(P16387), LLR(P16388) and LLR(P16389).
Receiving apparatus 1920 then generates log likelihood ratios LLR(X1,16385)=LLR(0), LLR(X1,16386)=LLR(0), LLR(X1,16387)=LLR(0), LLR(X1,16388)=LLR(0) and LLR(X1,16389)=LLR(0) of X1,16385, X1,16386, X1,16387, X1,16388 and X1,16389 of values of “0”s not transmitted from transmitting apparatus 1910. Receiving apparatus 1920 obtains LLR(X1,1), LLR(P1), LLR(X1,2), LLR(P2), LLR(X1,16384), LLR(P16384), LLR(X1,16385)=LLR(0), LLR(P16385), LLR(X1,16386)=LLR(0), LLR(P16386), LLR(X1,16387)—LLR(0), LLR(P16387), LLR(X1,16388)=LLR(0), LLR(P16388), and
LLR(X1,16389)=LLR(0), LLR(P16389), and thereby performs decoding using these log likelihood ratios and the parity check matrix of 16389×32778 of an LDPC-CC of a coding rate of 1/2 and a time varying period of 11, and thereby obtains an estimation transmission sequence and/or estimation information sequence. As the decoding method, belief propagation such as BP (belief propagation) decoding, min-sum decoding which is an approximation of BP decoding, offset BP decoding, normalized BP decoding, shuffled BP decoding can be used as shown in Non-Patent Literature 4, Non-Patent Literature 5 and Non-Patent Literature 6.
As is clear from this example, when tail-biting is performed in an LDPC-CC of a coding rate of (n−1)/n and a time varying period of q, receiving apparatus 1920 performs decoding using such a parity check matrix that satisfies <condition #16>. Therefore, this means that decoder 1923 possesses a parity check matrix of (rows)×(columns)=(q×M)×(q×n×M) as the parity check matrix (M is a natural number).
In encoder 1911 corresponding to this, the number of information bits necessary for encoding is q×(n−1)×M. Using these information bits, q×M parity bits are obtained.
At this time, if the number of information bits inputted to encoder 1911 is smaller than q×(n−1)×M, bits (e.g., “0”s (may also be “1”s)) known between transmitting and receiving apparatuses (encoder 1911 and decoder 1923) are inserted so that the number of information bits is q×(n−1)×M in encoder 1911. Encoder 1911 then obtains q×M parity bits. At this time, transmitting apparatus 1910 transmits information bits excluding the inserted known bits and the parity bits obtained. Here, known bits may be transmitted and q×(n−1)×M information bits and q×M parity bits may always be transmitted, which, however, would cause the transmission rate to deteriorate by an amount corresponding to the known bits transmitted.
Next, an encoding method will be described in an LDPC-CC of a coding rate of (n−1)/n and a time varying period of q defined by the parity check polynomial of equation 48 when tail-biting is performed. The LDPC-CC of a coding rate of (n−1)/n and a time varying period of q defined by the parity check polynomial of equation 48 is a kind of feed forward convolutional code. Therefore, the tail-biting described in Non-Patent Literature 10 and Non-Patent Literature 11 can be performed. Hereinafter, an overview of a procedure for the encoding method when performing tail-biting described in Non-Patent Literature 10 and Non-Patent Literature 11 will be described.
The procedure is as shown below.
<Procedure 1>
For example, when encoder 1911 adopts a configuration similar to that in
<Procedure 2>
In procedure 1, encoding is performed again to determine parity bits from point in time i=1 from the state of each register stored in encoder 1911 (therefore, the values obtained in <procedure 1> are used when z in X1[z], X2[z], . . . , Xn-1[z], and P[z] in equation 50 is smaller than 1).
The parity bit and information bits obtained at this time constitute an encoded sequence when tail-biting is performed.
The present embodiment has described an LDPC-CC of a time varying period of q and a coding rate of (n−1)/n defined by equation 48 as an example. In equation 48, the number of terms of X1(D), X2(D), . . . and Xn-1(D) is 3. However, the number of terms is not limited to 3, but high error correction capability may also be likely to be achieved even when the number of terms of one of X1(D), X2(D), . . . and Xn-1(D) in equation 48 is 1 or 2. For example, the following method is available as the method of setting the number of terms of X1(D) to 1 or 2. In the case of a time varying period of q, there are q parity check polynomials that satisfy 0, and the number of terms of X1(D) is set to 1 or 2 for all the q parity check polynomials that satisfy 0. Alternatively, instead of setting the number of terms of X1(D) to 1 or 2 for all the q parity check polynomials that satisfy 0, the number of terms of X1(D) may be set to 1 or 2 for any number (equal to or less than q−1) of parity check polynomials that satisfy 0. The same applies to X2(D), . . . and Xn-1(D) as well. In this case, satisfying the condition described in Embodiment 1 constitutes an important condition in achieving high error correction capability. However, the condition relating to the deleted terms is unnecessary.
Furthermore, even when the number of terms of one of X1(D), X2(D), and Xn-1(D) is 4 or more, high error correction capability may be likely to be achieved. For example, the following method is available as the method of setting the number of terms of X1(D) to 4 or more. In the case of a time varying period of q, there are q parity check polynomials that satisfy 0, and the number of terms of X1(D) is set to 4 or more for all the q parity check polynomials that satisfy 0. Alternatively, instead of setting the number of terms of X1(D) to 4 or more for all the q parity check polynomials that satisfy 0, the number of terms of X1(D) may be set to 4 or more for any number (equal to or less than q−1) of parity check polynomials that satisfy 0. The same applies to X2(D), . . . and Xn-1(D) as well. At this time, the above-described condition is excluded for the added terms.
Furthermore, tail-biting according to the present embodiment can also be performed on a code for which a g-th (g=0, 1, . . . , q−1) parity check polynomial of an LDPC-CC of a time varying period of q and a coding rate of (n−1)/n is represented as shown in equation 53.
[53]
(Da#g,1,1+Da#g,1,2+Da#g,1,3)X1(D)+(Da#g,2,1+Da#g,2,2+Da#g,2,3)X2(D)+ . . . +(Da#g,n-1,1+Da#g,n-1,2+Da#g,n-1,3)Xn-1(D)+P(D)=0 (Equation 53)
However, it is assumed that the constraint condition described in Embodiment 1 is observed. However, the condition relating to the deleted terms in P(D) will be excluded.
From equation 53, P(D) is represented as shown below.
[54]
P(D)=(Da#g,1,1+Da#g,1,2+Da#g,1,3)X1(D)+(Da#g,2,1+Da#g,2,2+Da#g,2,3)X2(D)+ . . . +(Da#g,n-1,1+Da#g,n-1,2+Da#g,n-1,3)Xn-1(D) (Equation 54)
When represented in the same way as equations 44-0 to 44-2, equation 54 is represented as shown below.
[55]
P[i]=X1[i−a#g,1,1]⊕X1[i−a#g,1,2]⊕X1[i−a#g,1,3]⊕X2[i−a#g,2,1]⊕X2[i−a#g,2,2]⊕X2[i−a#g,2,3]⊕ . . . ⊕Xn-1[i−a#g,n-1,1]⊕Xn-1[i−a#g,n-1,2]⊕Xn-1[i−a#g,n-1,3] (Equation 55)
where the symbol “⊕” represents the exclusive OR.
High error correction capability may be likely to be achieved even when the number of terms of one of X1(D), X2(D), . . . and Xn-1(D) in equation 53 is 1 or 2. For example, the following method is available as the method of setting the number of terms of X1(D) to 1 or 2. In the case of a time varying period of q, there are q parity check polynomials that satisfy 0, and the number of terms of X1(D) is set to 1 or 2 for all the q parity check polynomials that satisfy 0. Alternatively, instead of setting the number of terms of X1(D) to 1 or 2 for all the q parity check polynomials that satisfy 0, the number of terms of X1(D) may be set to 1 or 2 for any number (equal to or less than q−1) of parity check polynomials that satisfy 0. The same applies to X2(D), and Xn-1(D) as well. In this case, satisfying the condition described in Embodiment 1 constitutes an important condition in achieving high error correction capability. However, the condition relating to the deleted terms is unnecessary.
Furthermore, high error correction capability may also be likely to be achieved even when the number of terms of one of X1(D), X2(D), . . . and Xn-1(D) is 4 or more, For example, the following method is available as the method of setting the number of terms of X1(D) to 4 or more. In the case of a time varying period of q, there are q parity check polynomials that satisfy 0 and the number of terms of X1(D) is set to 4 or more for all the q parity check polynomials that satisfy 0. Alternatively, instead of setting the number of terms of X1(D) to 4 or more for all the q parity check polynomials that satisfy 0, the number of terms of X1(D) may be set to 4 or more for any number (equal to or less than q-1) of parity check polynomials that satisfy 0. The same applies to X2(D), and Xn-1(D). At this time, the above-described condition is excluded for the added terms. Furthermore, the encoded sequence when tail-biting is performed can be achieved using the above-described procedure also for the LDPC-CC defined in equation 53.
As described above, encoder 1911 and decoder 1923 use the parity check matrix of the LDPC-CC described in Embodiment 1 whose number of rows is a multiple of time varying period q, and can thereby achieve high error correction capability even when simple tail-biting is performed.
The present embodiment will describe a time-varying LDPC-CC of a coding rate of R=(n−1)/n based on a parity check polynomial again. Information bits of X1, X2, . . . and Xn-1 and parity bit P at point in time j are represented by X1,j, X2,j, . . . , Xn-1,j, and Pj, respectively. Vector uj at point in time j is represented by uj=(X1,j, X2,j, . . . , Xn-1,j, Pj). Furthermore, the encoded sequence is represented by u=(u0, u1, . . . , uj, . . . )T. Assuming D to be a delay operator, the polynomial of information bits X1, X2, . . . , Xn-1 is represented by X1(D), X2(D), . . . , Xn-1(D) and the polynomial of parity bit P is represented by P(D). At this time, consider a parity check polynomial that satisfies 0 represented as shown in equation 56.
equation 56, it is assumed that ap,q (p=1, 2, . . . , n−1; q=1, 2, . . . , rp) and bs (s=1, 2, . . . , ε) are natural numbers. Furthermore, ap,y≠ap,z is satisfied for ∀(y, z) of y, z=1, 2, . . . , rp, y≠z. Furthermore, by≠bz is satisfied for ∀(y, z) of y, z=1, 2, . . . , ε, y≠z. Here, ∀ is a universal quantifier.
To create an LDPC-CC of a coding rate of R=(n−1)/n and a time varying period of m, a parity check polynomial based on equation 56 is provided. At this time, an i-th (i=0, 1, . . . , m−1) parity check polynomial is represented as shown in equation 57.
[57]
A
X1,i(D)X1(D)+AX2,i(D)X2(D)+ . . . +AXn-1,i(D)Xn-1(D)+Bi(D)P(D)=0 (Equation 57)+
In equation 57, maximum orders of D's of AXδ,i(D) (δ=1, 2, . . . , n−1) and Bi (D) are represented by ΓXδ,i and ΓP,i, respectively. A maximum value of ΓXδ,i and ΓP,i is assumed to be Γi. A maximum value of Γi (i=0, 1, . . . , m−1) is assumed to be Γ. When encoded sequence u is taken into consideration, using Γ, vector hi corresponding to an i-th parity check matrix is represented as shown in equation 58.
[58]
h
i=[hi,Γ,hi,Γ-1, . . . ,hi,1,hi,0] (Equation 58)
In equation 58, hi,v (v=0, 1, . . . , Γ) is a vector of 1×n and represented as shown in equation 59.
[59]
h
i,v=[αi,v,X1,αi,v,X2, . . . ,αi,v,Xn-1,βi,v] (Equation 59)
This is because the parity check polynomial of equation 57 has αi,v,XwDvXw(D) and βi,vDvP(D) (w=1, 2, . . . , n−1, and αi,v,Xw, βi,v∈[0, 1]). At this time, the parity check polynomial that satisfies 0 of equation 57 has D0X1(D), D0X2(D), . . . , D0Xn-1(D) and D0P(D), and therefore satisfies equation 60.
In equation 60, ∧(k)=∧(k+m) is satisfied for ∀k, where ∧(k) corresponds to hi on a k-th row of the parity check matrix.
Using equation 58, equation 59 and equation 60, an LDPC-CC check matrix based on the parity check polynomial of a coding rate of R=(n−1)/n and a time varying period of m is represented as shown in equation 61.
The present embodiment will describe a case where the time-varying LDPC-CC described in Embodiment 1 is applied to an erasure correction scheme. However, the time varying period of the LDPC-CC may also be a time varying period of 2, 3 or 4.
For example,
In a communication apparatus on the decoding side, a physical layer processing section in a lower layer performs reception processing. At this time, it is assumed that a bit error has occurred in a lower layer. There may be a case where due to this bit error, a packet including the corresponding bit may not be decoded correctly in the upper layer, the packet may be lost. The example in
Communication apparatus 2110 on the encoding side includes erasure correction coding-related processing section 2112, error correction encoding section 2113 and transmitting apparatus 2114.
Communication apparatus 2130 on the decoding side includes receiving apparatus 2131, error correction decoding section 2132 and erasure correction decoding-related processing section 2133.
Communication channel 2120 represents a channel through which a signal transmitted from transmitting apparatus 2114 of communication apparatus 2110 on the encoding side passes until it is received by receiving apparatus 2131 of communication apparatus 2130 on the decoding side. As communication channel 2120, Ethernet (registered trademark), power line, metal cable, optical fiber, wireless, light (visible light, infrared or the like) or a combination thereof can be used.
Error correction encoding section 2113 introduces an error correction code in the physical layer besides an erasure correction code to correct errors produced in communication channel 2120. Therefore, error correction decoding section 2132 decodes the error correction code in the physical layer. Therefore, the layer to which erasure correction coding/decoding is applied is different from the layer (that is, physical layer) to which error correction coding is applied, and soft decision decoding is performed in error correction decoding in the physical layer, while operation of reconstructing lost bits is performed in erasure correction decoding.
Packet generating section 2211 receives information 2241 as input, generates information packet 2243 and outputs information packet 2243 to reordering section 2215. Hereinafter, a case will be described as an example where information packet 2243 is formed with information packets #1 to #n.
Reordering section 2215 receives information packet 2243 (here, information packets #1 to #n) as input, reorders the information and outputs reordered information 2245.
Erasure correction encoder (parity packet generating section) 2216 receives reordered information 2245 as input, performs encoding of, for example, an LDPC-CC (low-density parity-check convolutional code) on information 2245 and generates parity. Erasure correction encoder (parity packet generating section) 2216 extracts only the parity portion generated, generates and outputs parity packet 2247 (by storing and reordering parity) from the extracted parity portion. At this time, when parity packets #1 to #m are generated for information packets #1 to #n, parity packet 2247 is formed with parity packets #1 to #m.
Error detection code adding section 2217 receives information packet 2243 (information packets #1 to #n), and parity packet 2247 (parity packets #1 to #m) as input. Error detection code adding section 2217 adds an error detection code, for example, CRC to information packet 2243 (information packets #1 to #n) and parity packet 2247 (parity packets #1 to #m). Error detection code adding section 2217 outputs information packet and parity packet 2249 with CRC added. Therefore, information packet and parity packet 2249 with CRC added is formed with information packets #1 to #n and parity packets #1 to #m with CRC added.
Furthermore,
Error detection section 2435 receives packet 2451 after the decoding of an error correction code in the physical layer as input and performs error detection using, for example, CRC. At this time, packet 2451 after the decoding of an error correction code in the physical layer is formed with decoded information packets #1 to #n and decoded parity packets #1 to #m. When there are lost packets in the decoded information packets and decoded parity packets as a result of the error detection as shown, for example, in
Erasure correction decoder 2436 receives packet 2453 (information packets (with packet numbers) in which packet loss has not occurred and parity packets (with packet numbers)) as input. Erasure correction decoder 2436 performs (reordering and then) erasure correction code decoding on packet 2453 and decodes information packet 2455 (information packets #1 to #n). When encoding is performed by erasure correction encoding-related processing section 2312 shown in
When compatibility between the improvement of transmission efficiency and the improvement of erasure correction capability is considered, it is desirable to be able to change the coding rate with an erasure correction code according to communication quality.
First erasure correction encoder 2561 is an encoder for an erasure correction code of a coding rate of 1/2. Furthermore, second erasure correction encoder 2562 is an encoder for an erasure correction code of a coding rate of 2/3. Furthermore, third erasure correction encoder 2563 is an encoder for an erasure correction code of a coding rate of 3/4.
First erasure correction encoder 2561 receives information 2571 and control signal 2572 as input, performs encoding when control signal 2572 designates a coding rate of 1/2 and outputs data 2573 after the erasure correction coding to selection section 2564. Similarly, second erasure correction encoder 2562 receives information 2571 and control signal 2572 as input, performs encoding when control signal 2572 designates a coding rate of 2/3 and outputs data 2574 after the erasure correction coding to selection section 2564. Similarly, third erasure correction encoder 2563 receives information 2571 and control signal 2572 as input, performs encoding when control signal 2572 designates a coding rate of 3/4 and outputs data 2575 after the erasure correction coding to selection section 2564.
Selection section 2564 receives data 2573, 2574 and 2575 after the erasure correction coding and control signal 2572 as input, and outputs data 2576 after the erasure correction coding corresponding to the coding rate designated by control signal 2572.
By changing the coding rate of an erasure correction code according to the communication situation and setting an appropriate coding rate in this way, it is possible to realize compatibility between the improvement of receiving quality of the communicating party and the improvement of the transmission rate of data (information).
At this time, the encoder is required to realize a plurality of coding rates with a small circuit scale and achieve high erasure correction capability simultaneously. Hereinafter, an encoding method (encoder) and decoding method for realizing this compatibility will be described in detail.
The encoding/decoding method which will be described hereinafter uses the LDPC-CC described in Embodiments 1 to 3 as a code for erasure correction. If erasure correction capability is focused upon at this time, when, for example, an LDPC-CC of a coding rate greater than 3/4 is used, high erasure correction capability can be achieved. On the other hand, when an LDPC-CC of a lower coding rate than 2/3 is used, there is a problem that it is difficult to achieve high erasure correction capability. Hereinafter, an encoding method that can solve this problem and realize a plurality of coding rates with a small circuit scale will be described.
Communication channel 2607 represents a path through which a signal transmitted from transmitting apparatus 2605 of communication apparatus 2600 on the encoding side passes until it is received by receiving apparatus 2609 of communication apparatus 2608 on the decoding side.
Receiving apparatus 2613 receives received signal 2612 as input and obtains information (feedback information) 2615 fed back from communication apparatus 2608 and received data 2614.
Erasure correction coding-related processing section 2603 receives information 2601, control signal 2602 and information 2615 fed back from communication apparatus 2608 as input. Erasure correction coding-related processing section 2603 determines the coding rate of an erasure correction code based on control signal 2602 or feedback information 2615 from communication apparatus 2608, performs encoding and outputs a packet after the erasure correction encoding.
Error correction encoding section 2604 receives packets after the erasure correction coding, control signal 2602 and feedback information 2615 from communication apparatus 2608 as input. Error correction encoding section 2604 determines the coding rate of an error correction code in the physical layer based on control signal 2602 or feedback information 2615 from communication apparatus 2608, performs error correcting coding in the physical layer and outputs encoded data.
Transmitting apparatus 2605 receives the encoded data as input, performs processing such as quadrature modulation, frequency conversion and amplification, and outputs a transmission signal. Here, it is assumed that the transmission signal includes symbols such as symbols for transmitting control information, known symbols in addition to data. Furthermore, it is assumed that the transmission signal includes control information such as information on the coding rate of an error correction code in the physical layer and the coding rate of an erasure correction code.
Receiving apparatus 2609 receives a received signal as input, applies processing such as amplification, frequency conversion, quadrature demodulation, outputs a received log likelihood ratio, estimates an environment of the communication channel such as propagation environment, reception electric field intensity from known symbols included in the transmission signal and outputs an estimation signal. Furthermore, receiving apparatus 2609 demodulates symbols for the control information included in the received signal, thereby obtains information on the coding rate of the error correction code and the coding rate of the erasure correction code in the physical layer set by transmitting apparatus 2605 and outputs the information as a control signal.
Error correction decoding section 2610 receives the received log likelihood ratio and a control signal as input and performs appropriate error correction decoding in the physical layer using the coding rate of the error correction code in the physical layer included in the control signal. Error correction decoding section 2610 outputs the decoded data and outputs information on whether or not error correction has been successfully performed in the physical layer (error correction success/failure information (e.g., ACK/NACK)).
Erasure correction decoding-related processing section 2611 receives decoded data and a control signal as input and performs erasure correction decoding using the coding rate of the erasure correction code included in the control signal. Erasure correction decoding-related processing section 2611 then outputs the erasure correction decoded data and outputs information on whether or not error correction has been successfully performed in erasure correction (erasure correction success/failure information (e.g., ACK/NACK)).
Transmitting apparatus 2617 receives estimation information (RSSI: Received Signal Strength Indicator, or CSI: Channel State Information) that is estimation of the environment of the communication channel such as propagation environment, reception electric field intensity, error correction success/failure information in the physical layer and feedback information based on the erasure correction success/failure information in erasure correction, and transmission data as input. Transmitting apparatus 2617 applies processing such as encoding, mapping, quadrature modulation, frequency conversion, amplification and outputs transmission signal 2618. Transmission signal 2618 is transmitted to communication apparatus 2600.
The method of changing the coding rate of an erasure correction code in erasure correction coding-related processing section 2603 will be described using
Furthermore,
Reordering section 2902 receives information X as input and stores information bits X. When four information bits X are stored, reordering section 2902 reorders information bits X and outputs information bits X1, X2, X3 and X4 in parallel in four lines of information. However, this configuration is merely an example. Operations of reordering section 2902 will be described later.
LDPC-CC encoder 2907 supports a coding rate of 4/5. LDPC-CC encoder 2907 receives information bits X1, X2, X3 and X4, and control signal 2916 as input. LDPC-CC encoder 2907 performs the LDPC-CC encoding shown in Embodiment 1 to Embodiment 3 and outputs parity bit (P1) 2908. When control signal 2916 indicates a coding rate of 4/5, information X1, X2, X3 and X4 and parity (P1) become the outputs of encoder 2900.
Reordering section 2902 receives information bits X1, X2, X3, X4, parity bit P1, and control signal 2916 as input. When control signal 2916 indicates a coding rate of 4/5, reordering section 2909 does not operate. On the other hand, when control signal 2916 indicates a coding rate of 16/25, reordering section 2909 stores information bits X1, X2, X3 and X4 and parity bit P1. Reordering section 2909 then reorders stored information bits X1, X2, X3 and X4 and parity bit P1, outputs reordered data #1 (2910), reordered data #2 (2911), reordered data #3 (2912) and reordered data #4 (2913). The reordering method in reordering section 2909 will be described later.
As with LDPC-CC encoder 2907, LDPC-CC encoder 2914 supports a coding rate of 4/5. LDPC-CC encoder 2914 receives reordered data #1 (2910), reordered data #2 (2911), reordered data #3 (2912), reordered data #4 (2913), and control signal 2916 as input. When control signal 2916 indicates a coding rate of 16/25, LDPC-CC encoder 2914 performs encoding and outputs parity bit (P2) 2915. When control signal 2916 indicates a coding rate of 4/5, reordered data #1 (2910), reordered data #2 (2911), reordered data #3 (2912), reordered data #4 (2913), and parity bit (P2) (2915) become the outputs of encoder 2900.
LDPC-CC encoder 2907 of a coding rate of 4/5 encodes [X1(1), X2(1), X3(1), X4(1)] and outputs parity bit P1(1). LDPC-CC encoder 2907 likewise performs encoding, generates and outputs parity bits P1(2), P1(3), . . . , P1(N) hereinafter.
Reordering section 2909 receives [X1(1), X2(1), X3(1), X4(1), P1(1)], [X1(2), X2(2), X3(2), X4(2), P1(2)], . . . , [X1(N), X2(N), X3(N), X4(N), P1(N)] as input. Reordering section 2909 performs reordering including parity bits in addition to information bits.
For example, in the example shown in
LDPC-CC encoder 2914 of a coding rate of 4/5 performs encoding on [X1(50), X2(31), X3(7), P1(40)] as shown by frame 3000 in
When control signal 2916 indicates a coding rate of 4/5, encoder 2900 generates packets using [X1(1),X2(1),X3(1),X4(1),P1(1)], [X1(2),X2(2),X3(2),X4(2),P1(2)], . . . , [X1(N),X2(N),X3(N),X4(N),P1(N)].
Furthermore, when control signal 2916 indicates a coding rate of 16/25, encoder 2900 generates packets using [X1(50), X2(31), X3(7), P1(40), P2(1)], [X2(39), X4(67), P1(4), X1(20), P2(2)], . . . , [P2(65), X4(21), P1(16), X2(87), P2(M)].
As described above, according to the present embodiment, encoder 2900 adopts a configuration of connecting LDPC-CC encoders 2907 and 2914 of a coding rate as high as 4/5 and arranging reordering sections 2902 and 2909 before LDPC-CC encoders 2907 and 2914, respectively. Encoder 2900 then changes data to be outputted according to the designated coding rate. Thus, it is possible to support a plurality of coding rates with a small circuit scale and achieve an effect of achieving high erasure correction capability at each coding rate.
Reordering section 3101 receives information bits X as input and stores information bits X. When five information bits X are stored, reordering section 3101 reorders information bits X and outputs information bits X1, X2, X3, X4 and X5 in five parallel lines.
LDPC-CC encoder 3103 supports a coding rate of 5/6. LDPC-CC encoder 3103 receives information bits X1, X2, X3, X4, X5, and control signal 2916 as input, performs encoding on information bits X1, X2, X3, X4 and X5 and outputs parity bit (P1) 2908. When control signal 2916 indicates a coding rate of 5/6, information bits X1, X2, X3, X4, X5, and parity bit (P1) 2908 become the outputs of encoder 2900.
Reordering section 3104 receives information bits X1, X2, X3, X4, X5, parity bit (P1) 2908, and control signal 2916 as input. When control signal 2916 indicates a coding rate of 2/3, reordering section 3104 stores information bits X1, X2, X3, X4, X5, and parity bit (P1) 2908. Reordering section 3104 reorders stored information bits X1, X2, X3, X4, X5, and parity bit (P1) 2908 and outputs the reordered data in four parallel lines. At this time, the four lines include information bits X1, X2, X3, X4, X5, and parity bit (P1).
LDPC-CC encoder 2914 supports a coding rate of 4/5. LDPC-CC encoder 2914 receives four lines of data and control signal 2916 as input. When control signal 2916 indicates a coding rate of 2/3, LDPC-CC encoder 2914 performs encoding on the four lines of data and outputs parity bit (P2). Therefore, LDPC-CC encoder 2914 performs encoding using information bits X1, X2, X3, X4, X5, and parity bit P1.
Encoder 2900 may set a coding rate to any value. Furthermore, when encoders of the same coding rate are connected, these may be encoders of the same code or encoders of different codes.
Furthermore, although
Reordering section 3202 receives information bits X as input and stores information bit sX. Reordering section 3202 reorders stored information bits X and outputs reordered information bits X as first data 3203 to be encoded by next LDPC-CC encoder 3204.
LDPC-CC encoder 3204 supports a coding rate of (n−1)/n. LDPC-CC encoder 3204 receives first data 3203 and control signal 2916 as input, performs encoding on first data 3203 and control signal 2916 and outputs parity bit (P1) 3205. When control signal 2916 indicates a coding rate of (n−1)/n, first data 3203 and parity bit (P1) 3205 become the outputs of encoder 3200.
Reordering section 3206 receives first data 3203, parity bit (P1) 3205 and control signal 2916 as input. When control signal 2916 indicates a coding rate of {(n−1)(m-1)}/(nm) or less, reordering section 3206 stores first data 3203 and bit parity (P1) 3205. Reordering section 3206 reorders stored first data 3203 and parity bit (P1) 3205 and outputs reordered first data 3203 and parity bit (P1) 3205 as second data 3207 to be encoded by next LDPC-CC encoder 3208.
LDPC-CC encoder 3208 supports a coding rate of (m−1)/m. LDPC-CC encoder 3208 receives second data 3207 and control signal 2916 as input. When control signal 2916 indicates a coding rate of {(n−1)(m−1)}/(nm) or less, LDPC-CC encoder 3208 performs encoding on second data 3207 and outputs parity (P2) 3209. When control signal 2916 indicates a coding rate of {(n−1)(m−1)}/(nm), second data 3207 and parity bit (P2) 3209 become the output of encoder 3200.
Reordering section 3210 receives second data 3207, parity bit (P2) 3209 and control signal 2916 as input. When control signal 2916 indicates a coding rate of {(n−1)(m−1)(s−1)}/(nms) or less, reordering section 3210 stores second data 3209 and parity bit (P2) 3207. Reordering section 3210 reorders stored second data 3209 and parity bit (P2) 3207 and outputs reordered second data 3209 and parity (P2) 3207 as third data 3211 to be encoded by next LDPC-CC encoder 3212.
LDPC-CC encoder 3212 supports a coding rate of (s−1)/s. LDPC-CC encoder 3212 receives third data 3211 and control signal 2916 as input. When control signal 2916 indicates a coding rate of {(n−1)(m−1)(s−1)}/(nms) or less, LDPC-CC encoder 3212 performs encoding on third data 3211 and outputs parity bit (P3) 3213. When control signal 2916 indicates a coding rate of {(n−1)(m−1)(s−1)}/(nms), third data 3211 and parity bit (P3) 3213 become the outputs of encoder 3200.
By further connecting multiple LDPC-CC encoders, it is possible to realize more coding rates. This makes it possible to realize a plurality of coding rates with a small circuit scale and achieve an effect of being able to achieve high erasure correction capability at each coding rate.
In
When transmission sequence ui at point in time i is assumed as ui=(X1,i, X2,i, . . . , Xn-1,i, P1,i, P2,i, P3,i . . . ), transmission sequence u is represented as u=(u0, u1, . . . , ui, . . . )T.
In
In decoder 3310 shown in
Hereinafter, operations of decoder 3310 will be described.
For example, when the coding rate is (n−1)/n, data corresponding to P2, P3, are not present in lost data 3311. However, in this case, BP decoder 3313 performs decoding operation assuming data corresponding to P2, P3, to be “0” and can thereby realize erasure correction.
Similarly, when the coding rate is {(n−1)(m−1))}/(nm), data corresponding to P2, P3, . . . are not present in lost data 3311. However, in this case, BP decoder 3313 performs decoding operation assuming data corresponding to P3, to be “0” and can thereby realize erasure correction. BP decoder 3313 may operate similarly for other coding rates.
Thus, decoder 3310 possesses a parity check matrix of the lowest coding rate among the supported coding rates and supports BP decoding at a plurality of coding rates using this parity check matrix. This makes it possible to support a plurality of coding rates with a small circuit scale and achieve an effect of achieving high erasure correction capability at each coding rate.
Hereinafter, a case will be described where erasure correction coding is actually performed using an LDPC-CC. Since an LDPC-CC is a kind of convolutional code, the LDPC-CC requires termination or tail-biting to achieve high erasure correction capability.
A case will be studied below as an example where zero-termination described in Embodiment 2 is used. Particularly, a method of inserting a termination sequence will be described.
It is assumed that the number of information bits is 16384 and the number of bits constituting one packet is 512. Here, a case where encoding is performed using an
LDPC-CC of a coding rate of 4/5 will be considered. At this time, if information bits are encoded at a coding rate of 4/5 without performing termination, since the number of information bits is 16384, the number of parity bits is 4096 (16384/4). Therefore, when one packet is formed with 512 bits (where 512 bits do not include bits other than information such as error detection code), 40 packets are generated.
However, if encoding is performed without performing termination in this way, the erasure correction capability deteriorates significantly. To solve this problem, a termination sequence needs to be inserted.
Thus, a termination sequence insertion method will be proposed below taking the number of bits constituting a packet into consideration.
To be more specific, the proposed method inserts a termination sequence in such a way that the sum of the number of information bits (not including the termination sequence), the number of parity bits and the number of bits of the termination sequence becomes an integer multiple of the number of bits constituting a packet. However, the bits constituting a packet do not include control information such as the error detection code and the number of bits constituting a packet means the number of bits of data relating to erasure correction coding.
Therefore, in the above example, a termination sequence of 512×h bits (h is a natural number) is added. By so doing, it is possible to provide an effect of inserting a termination sequence, and thereby achieve high erasure correction capability and efficiently configure a packet.
As described above, an LDPC-CC of a coding rate of (n−1)/n is used and when the number of information bits is (n−1)×c bits, c parity bits are obtained. Next, a relationship between the number of bits of zero-termination d and the number of bits constituting one packet z will be considered. However, the number of bits constituting a packet z does not include control information such as error detection code, and the number of bits constituting a packet z means the number of bits of data relating to erasure correction coding.
At this time, if the number of bits of zero-termination d is determined in such a way that equation 62 holds true, it is possible to provide an effect of inserting a termination sequence, achieve high erasure correction capability and efficiently configure a packet.
[62]
(n−1)×c+c+d=nc+d=Az (Equation 62)
where A is an integer.
However, (n−1)×c information bits may include padded dummy data (not original information bits but known bits (e.g., “0”) added to information bits to facilitate encoding). Padding will be described later.
When erasure correction encoding is performed, there is a reordering section (2215) as is clear from
It is possible to easily support both the aforementioned case where erasure correction coding is performed and the case where erasure correction encoding is not performed.
When erasure correction encoding is not performed, only information packets are transmitted.
When erasure correction encoding is performed, consider a case where packets are transmitted using one of the following methods:
<1> Packets are generated and transmitted by making distinction between information packets and parity packets.
<2> Packets are generated and transmitted without making distinction between information packets and parity packets.
In this case, to suppress an increase in the hardware circuit scale, it is desirable to equalize the number of bits constituting a packet z regardless of whether or not erasure correction encoding is performed.
Therefore, when the number of information bits used for erasure correction encoding is assumed to be I, equation 63 needs to hold true. However, depending on the number of information bits, padding needs to be performed.
[63]
I=α×z (Equation 63)
Here, a is assumed to be an integer. Furthermore, z is the number of bits constituting a packet, bits constituting a packet do not include control information such as error detection code and the number of bits constituting a packet z means the number of bits of data relating to erasure correction encoding.
In the above case, the number of bits of information required for erasure correction encoding is α×z. However, information of all α×z bits is not always actually available for erasure correction encoding but only information of fewer than α×z bits may be available. In this case, a method of inserting dummy data is employed so that the number of bits becomes α×z. Therefore, when the number of bits of information for erasure correction encoding is smaller than α×z, known data (e.g., “0”) is inserted so that the number of bits becomes α×z. Erasure correction encoding is performed on the information of α×z bits generated in this way.
Parity bits are obtained by performing erasure correction encoding. It is then assumed that zero-termination is performed to achieve high erasure correction capability. At this time, assuming that the number of bits of parity obtained through erasure correction encoding is C and the number of bits of zero-termination is D, packets are efficiently configured when equation 64 holds true.
[64]
C+D=βz (Equation 64)
Here, β is assumed to be an integer. Furthermore, z is the number of bits constituting a packet, bits constituting a packet does not include control information such as error detection code and the number of bits constituting a packet z means the number of bits of data relating to erasure correction encoding.
Here, the bits constituting a packet z is often configured in byte units. Therefore, when the coding rate of an LDPC-CC is (n−1)/n, if equation 65 holds true, it is possible to avoid such a situation that padding bits are always necessary when erasure correction encoding is performed.
[65]
(n−1)=2k (Equation 65)
where K is an integer equal to or greater than 0.
Therefore, when an erasure correction encoder that realizes a plurality of coding rates is configured, if the coding rates to be supported are assumed to be R=(n0−1)/n0, (n1−1)/n1, (n2−1)/n2, . . . , (ni−1)/ni, . . . , (nv−1)/nv (i=0, 1, 2, . . . , v−1, v; v is an integer equal to or greater than 1) and equation 66 holds true, it is possible to avoid such a situation that padding bits are always required when erasure correction encoding is performed.
[66]
(ni−1)=2k (Equation 66)
where K is an integer equal to or greater than 0.
When the condition corresponding to this condition is considered about, for example, a coding rate of the erasure correction encoder in
[67]
(n−1)=2k1 (Equation 67-1)
(n−1)(m−1)=2k2 (Equation 67-2)
(n−1)(m−1)(s−1)=2k3 (Equation 67-3)
where k1, k2, and k3 are integers equal to or greater than 0.
Although a case with an LDPC-CC has been described above, the same may be likewise considered about a QC-LDPC code, LDPC code (LDPC block code) such as random LDPC code as shown in Non-Patent Literature 1, Non-Patent Literature 2, Non-Patent Literature 3 and Non-Patent Literature 7. For example, consider an erasure correction encoder that uses an LDPC block code as an erasure correction code and supports a plurality of coding rates of R=b0/a0, b1/a1, b2/a2, . . . , bi/ai, . . . , bv-1/av-1, bv/av (i=0, 1, 2, . . . , v−1, v; v is an integer equal to or greater than 1; ai is an integer equal to or greater than 1, bi is an integer equal to or greater than 1, ai≥bi). At this time, if equation 68 holds true, it is possible to avoid such a situation that padding bits are always required when erasure correction encoding is performed.
[68]
b
i=2ki (Equation 68)
where ki is an integer equal to or greater than 0.
Furthermore, with regard to the relationship between the number of information bits, the number of parity bits and the number of bits constituting a packet, a case will be considered where an LDPC block code is used as the erasure correction code. At this time, assuming that the number of information bits used for erasure correction encoding is I, equation 69 may hold true. However, depending on the number of information bits, padding needs to be performed.
[69]
I=α×z (Equation 69)
Here, α is assumed to be an integer. It is also the number of bits constituting a packet and bits constituting a packet do not include control information such as error detection code, and the number of bits constituting a packet z means the number of bits of data relating to erasure correction encoding.
In the above-described case, the number of bits of information necessary to perform erasure correction coding is α×z. However, all information of α×z bits is not always actually available for erasure correction encoding, but only information of bits fewer than α×z bits may be available. In this case, a method of inserting dummy data is employed so that the number of bits becomes α×z. Therefore, when the number of bits of information for erasure correction encoding is smaller than α×z, known data (e.g., “0”) is inserted so that the number of bits becomes α×z. Erasure correction encoding is performed on the information of α×z bits generated in this way.
Parity bits are obtained by performing erasure correction encoding. At this time, assuming that the number of bits of parity obtained through erasure correction encoding is C, packets are efficiently configured when equation 70 holds true.
[70]
C=βz (Equation 70)
where β is assumed to be an integer.
Since the block length is determined when tail-biting is performed, this case can be handled in the same way as when an LDPC block code is applied to an erasure correction code.
The present embodiment will describe important items relating to an “LDPC-CC based on a parity check polynomial of a time varying period greater than 3” described in Embodiment 1.
An LDPC-CC is a code defined by a low density parity check matrix as in the case of an LDPC-BC, can be defined by a time varying parity check matrix of an infinite length, but can actually be considered with a periodically time varying parity check matrix.
Assuming that a parity check matrix is H and a syndrome former is HT, HT of an LDPC-CC of a coding rate of R=d/c (d<c) can be represented as shown in equation 71.
In equation 71, HTi(t) (i=0, 1, . . . , ms) is a c×(c−d) periodic sub-matrix and if the period is assumed to be Ts, HTi(t)=HTi(t+Ts) holds true for ∀i and ∀t. Furthermore, Ms is a memory size.
The LDPC-CC defined by equation 71 is a time varying convolutional code and this code is called “time-varying LDPC-CC.” As for decoding, BP decoding is performed using parity check matrix H. When encoded sequence vector u is assumed, the following relational expression holds true.
[72]
Hu=0 (Equation 72)
An information sequence is obtained by performing BP decoding using the relational expression in equation 72.
Consider a systematic convolutional code of a coding rate of R=1/2 of generator matrix G=[1 G1(D)/G0(D)]. At this time, Gi represents a feed forward polynomial and G0 represents a feedback polynomial.
Assuming a polynomial representation of an information sequence is X(D) and a polynomial representation of a parity sequence is P(D), a parity check polynomial that satisfies 0 can be represented as shown below.
[73]
G
1(D)X(D)+G0(D)P(D)=0 (Equation 73)
Here, the parity check polynomial is provided as equation 74 that satisfies equation 73.
[74]
(Da
In equation 74, ap and bq are integers equal to or greater than 1 (p=1, 2, . . . , r; q=1, 2, . . . , s), terms of D0 are present in X(D) and P(D). The code defined by a parity check matrix based on the parity check polynomial that satisfies 0 of equation 74 becomes a time-invariant LDPC-CC.
M (m is an integer equal to or greater than 2) different parity check polynomials based on equation 74 are provided. The parity check polynomial that satisfies 0 is represented as shown below.
[75]
A
i(D)X(D)+Bi(D)P(D)=0 (Equation 75)
At this time, i=0, 1, . . . , m−1.
The data and parity at point in time j are represented by Xj and Pj as uj=(Xj, Pj). It is then assumed that the parity check polynomial that satisfies 0 of equation 76 holds true.
[76]
A
k(D)X(D)+Bk(D)P(D)=0 (k=j mod m) (Equation 76)
Parity Pj at point in time j can then be determined from equation 76. The code defined by the parity check matrix generated based on the parity check polynomial that satisfies 0 of equation 76 becomes an LDPC-CC of a time varying period of m (TV-m-LDPC-CC: Time-Varying LDPC-CC with a time period of m).
At this time, there are terms of D0 in P(D) of the time-invariant LDPC-CC defined in equation 74 and TV-m-LDPC-CC defined in equation 76, where bj is an integer equal to or greater than 1. Therefore, there is a characteristic that parity can be easily found sequentially by means of a register and exclusive OR.
The decoding section creates parity check matrix H from equation 74 using the time-invariant LDPC-CC and creates parity check matrix H from equation 76 using the TV-m-LDPC-CC. The decoding section performs BP decoding on encoded sequence u=(u0, u1, . . . , uj, . . . )T using equation 72 and obtains an information sequence.
Next, consider a time-invariant LDPC-CC and TV-m-LDPC-CC of a coding rate of (n−1)/n. It is assumed that information sequence X1, X2, . . . , and parity P at point in time j are represented by X2,j, . . . , Xn-1,j, and Pj respectively, and uj=(X1,j, X2,j, . . . , Xn-1,j, Pj). When it is assumed that a polynomial representation of information sequence X1, X2, . . . , Xn-1 is X1(D), X2(D), . . . , Xn-1(D), the parity check polynomial that satisfies 0 is represented as shown below.
[77]
(Da
In equation 77, ap,i is an integer equal to or greater than 1 (p=1, 2, . . . , n−1; i=1, 2, . . . rp), and satisfies ap,y≠ap,z (∀(y, z)|y, z=1, 2, . . . , rp, y≠z) and b≠bz (∀(y, z)|y, z=1, 2, . . . , ε, y≠z).
m (m is an integer equal to or greater than 2) different parity check polynomials based on equation 77 are provided. A parity check polynomial that satisfies 0 is represented as shown below.
[78]
A
X1,i(D)X1(D)+AX2,i(D)X2(D)+ . . . +AXn-1,i(D)Xn-1(D)+Bi(D)P(D)=0 (Equation 78)
where i=0, 1, . . . , m−1.
It is then assumed that equation 79 holds true for X1,j, X2,j, . . . , Xn-1,j, and Pj of information X1, X2, . . . , Xn-1 and parity P at point in time j.
[79]
A
X1,k(D)X1(D)+AX2,k(D)X2(D)+ . . . +AXn-1,k(D)Xn-1(D)+Bk(D)P(D)=0 (k=j mod m) (Equation 79)
At this time, the codes based on equation 77 and equation 79 become time-invariant LDPC-CC and TV-m-LDPC-CC of a coding rate of (n−1)/n.
First, a regular TV-m-LDPC-CC handled in the present study will be described.
It is known that when the constraint length is substantially the same, a TV3-LDPC-CC can obtain better error correction capability than an LDPC-CC (TV2-LDPC-CC) of a time varying period of 2. It is also known that good error correction capability can be achieved by employing a regular LDPC code for the TV3-LDPC-CC. The present study attempts to create a regular LDPC-CC of a time varying period of m (m>3).
A #q-th parity check polynomial of a TV-m-LDPC-CC of a coding rate of (n−1)/n that satisfies 0 is provided as shown below (q=0, 1, . . . , m−1).
[80]
(Da
In equation 80, a#q,p,i is an integer equal to or greater than 0 (p=1, 2, . . . , n−1; i=1, 2, . . . , rp) and satisfies a#q,p,y≠a#q,p,z (∀(y,z)|y, z=1, 2, . . . , rp, y≠z) and b#q,y≠b#q,z (∀(y,z)|y, z=1, 2, . . . , ε, y≠z).
The following features are then provided.
Feature 1:
There is a relationship as shown below between the term of Da#α,p,iXp(D) of parity check polynomial #α, the term of Da#β,p,jXp(D) of parity check polynomial #β (α, β=0, 1, . . . , m−1; p=1, 2, . . . , n−1; i, j=1, 2, . . . , rp) and between the term of Db#α,iP(D) of parity check polynomial #α and the term of Db#β,jP(D) of parity check polynomial #β (α, β=0, 1, . . . , m−1 (β≥α); i, j=1, 2, . . . , rp).
<1> When β=α:
When {a#α,p,i mod m=a#β,p,j mod m}∩{i≠j} holds true, variable node $1 is present which forms edges of both a check node corresponding to parity check polynomial #α and a check node corresponding to parity check polynomial #β as shown in
<2> When β≠α:
It is assumed that β−α=L.
1) When a#α,p,i mod m<a#β,p,j mod m
When (a#β,p,j mod m)−(a#α,p,i mod m)=L, variable node $1 is present which forms edges of both a check node corresponding to parity check polynomial #α and a check node corresponding to parity check polynomial #β as shown in
2) When a#α,p,i mod m>a#β,p,j mod m
When (a#β,p,i mod m)−(a#α,p,i mod m)=L+m, variable node $1 is present which forms edges of both a check node corresponding to parity check polynomial #α and a check node corresponding to parity check polynomial #β as shown in
3) When b#α,i mod m<b#β,j mod m
When (b#β,j mod m)−(b#α,i mod m)=L, variable node $1 is present which forms edges of both a check node corresponding to parity check polynomial #α and a check node corresponding to parity check polynomial #β as shown in
4) When b#α,i mod m>b#β,j mod m
When (b#β,j mod m)−(b#α,j mod m)=L+m, variable node $1 is present which forms edges of both a check node corresponding to parity check polynomial #α and a check node corresponding to parity check polynomial #β as shown in
Theorem 1 holds true for cycle length 6 (CL6: cycle length of 6) of a TV-m-LDPC-CC.
Theorem 1: The following two conditions are provided for a parity check polynomial that satisfies 0 of the TV-m-LDPC-CC:
There are p and q that satisfy C#1.1: a#q,p,i mod m=a#q,p,j mod m=a#q,p,k mod m, where i≠j, i≠k and j≠k. There is q that satisfies C#1.2: b#q,i mod m=b#q,j mod m=b#q,k mod m, where i≠j, i≠k and j≠k. There is at least one CL6 when C#1.1 or C#1.2 is satisfied.
Proof:
If it is possible to prove that at least one CL6 is present when a#0,1,i mod m=a#0,1,j mod m=a#0,1,k mod m when p=1 and q=0, it is possible to prove that at least one CL6 is present also for X2(D), . . . , Xn-1(D), P(D) by substituting X2(D), . . . , Xn-1(D), P(D) for X1(D), if C#1.1 and C#1.2 hold true when q=0
Furthermore, when q=0 if the above description can be proved, it is possible to prove that “at least one CL6 is present also when “q=1, . . . , m−1 if C#1.1 and C#1.2 hold true” in the same way of thinking.
Therefore, when p=1, q=0, if a#0,1,i mod m=a#0,1,j mod m=a#0,1,k mod m holds true, it is possible to prove that at least one CL6 is present.
In X1(D) when q=0 is assumed for a parity check polynomial that satisfies 0 of the TV-m-LDPC-CC in equation 80, if two or fewer terms are present, C#1.1 is never satisfied.
In X1(D) when q=0 is assumed for a parity check polynomial that satisfies 0 of the TV-m-LDPC-CC in equation 80, if three terms are present and a#q,p,i mod m=a#q,p,j mod m=a#q,p,k mod m is satisfied, the parity check polynomial that satisfies 0 of q=0 can be represented as shown in equation 81.
Here, even when a#0,1,1>a#0,1,2>a#0,1,3 is assumed, generality is not lost, and γ and δ become natural numbers. At this time, in equation 81, when q=0, the term relating to X1(D), that is, (Da#0,1,3+mγ+mδ+Da#0,1,3+mδ+Da#0,1,3) X1(D) is focused upon. At this time, a sub-matrix generated by extracting only a portion relating to X1(D) in parity check matrix
H is represented as shown in
At this time, the relationship as shown in
When four or more X1(D)-related terms are present, three terms are selected from among four or more terms and if a#0,1,i mod m=a#0,i,j mod m=a#0,1,k mod m holds true in the selected three terms, CL6 is formed as shown in
As shown above, when q=0, if a#0,1,i mod m=a#0,1,j mod m=a#0,1,k mod m holds true about X1(D), CL6 is present.
Furthermore, by also substituting X1(D) for X2(D), . . . , Xn-1(D), P(D), at least one CL6 occurs when C#1.1 or C#1.2 holds true.
Furthermore, in the same way of thinking, also for when q=1, . . . , m−1, at least one CL6 is present when C#1.1 or C#1.2 is satisfied.
Therefore, in the parity check polynomial that satisfies 0 of equation 80, when C#1.1 or C#1.2 holds true, at least one CL6 is generated.
The #q-th parity check polynomial that satisfies 0 of a TV-m-LDPC-CC of a coding rate of (n−1)/n, which will be described hereinafter, is provided below based on equation 74 (q=0, . . . , m−1):
[82]
(Da
Here, in equation 82, it is assumed that there are three terms in X1(D), X2(D), . . . , Xn-1(D) and P(D), respectively.
According to theorem 1, to suppress the occurrence of CL6, it is necessary to satisfy {a#q,p,1 mod m≠a#q,p,2 mod m}∩{a#q,p,1 mod m≠a#q,p,3 mod m}∩{a#q,p,2 mod m≠a#q,p,3 mod m} in Xq(D) of equation 82. Similarly, it is necessary to satisfy {b#q,1 mod m≠b#q,2 mod m}∩{b#q,1 mod m·b#q,3 mod m}∩{b#q,2 mod m≠b#q,3 mod m} in P(D). ∩ represents an intersection.
Then, according to feature 1, the following condition is considered as an example of the condition to be a regular LDPC code.
C#2: for ∀q, (a#q,p,1 mod m, a#q,p,2 mod m, a#q,p,3 mod m)=(Np,1, Np,2, Np,3)∩(b#q,1 mod m, b#q,2 mod m, b#q,3 mod m)=(M1, M2, M3) holds true. However, {a#q,p,1 mod m≠a#q,p,2 mod m}∩{a#q,p,1 mod m≠a#q,p,3 mod m}∩{a#q,p,2 mod m≠a#q,p,3 mod m} and {b#q,1 mod m≠b#q,2 mod m}∩{b#q,1 mod m≠b#q,3 mod m}Ω{b#q,2 mod m≠b#q,3 mod m} is satisfied. Here, the symbol “∀” of ∀q is a universal quantifier and ∀q means all q's.
The following discussion will treat a regular TV-m-LDPC-CC that satisfies the condition of C#2.
[Code Design of Regular TV-m-LDPC-CC]
Non-Patent Literature 13 shows a decoding error rate when a uniformly random regular LDPC code is subjected to maximum likelihood decoding in a binary-input output-symmetric channel and shows that Gallager's belief function (see Non-Patent Literature 14) can be achieved by a uniformly random regular LDPC code. However, when BP decoding is performed, it is unclear whether or not Gallager's belief function can be achieved by a uniformly random regular LDPC code.
By the way, an LDPC-CC belongs to a convolutional code. Non-Patent Literature 15 and Non-Patent Literature 16 describe the belief function of the convolutional code and describe that the belief depends on a constraint length. Since the LDPC-CC is a convolutional code, it has a structure specific to a convolutional code in a parity check matrix, but when the time varying period is increased, positions at which “1”s of the parity check matrix exist approximate to uniform randomness. However, since the LDPC-CC is a convolutional code, the parity check matrix has a structure specific to a convolutional code and the positions at which “1”s exist depend on the constraint length.
From these results, inference of inference #1 on a code design is provided in a regular TV-m-LDPC-CC that satisfies the condition of C#2.
Inference #1:
When BP decoding is used, if time varying period m of a TV-m-LDPC-CC increases in a regular TV-m-LDPC-CC that satisfies the condition of C#2, uniform randomness is approximated for positions at which “1”s exist in the parity check matrix and a code of high error correction capability is obtained.
The method of realizing inference #1 will be discussed below.
[Feature of Regular TV-m-LDPC-CC]
A feature will be described that holds true when drawing a tree about equation 82 which is a #q-th parity check polynomial that satisfies 0 of a regular TV-m-LDPC-CC that satisfies the condition of C#2 of a coding rate of (n−1)/n, which will be treated in the present discussion.
Feature 2:
In a regular TV-m-LDPC-CC that satisfies the condition of C#2, when time varying period m is a prime number, consider a case where C#3.1 holds true with attention focused on one of X1(D), . . . , Xn-1(D).
C#3.1: In parity check polynomial (82) that satisfies 0 of a regular TV-m-LDPC-CC that satisfies the condition of C#2, a#q,p,i mod m≠a#q,p,j mod m holds true in Xp(D) for ∀q (q=0, . . . , m−1), where i≠j.
In parity check polynomial (82) that satisfies 0 of a regular TV-m-LDPC-CC that satisfies the condition of C#2, a case will be considered where a tree is drawn exclusively for variable nodes corresponding to Da#q,p,iXp(D) and Da#q,p,jXp(D) that satisfy C#3.1.
At this time, according to feature 1, there are check nodes corresponding to all #0 to #m−1 parity check polynomials for ∀q in a tree whose starting point is a check node corresponding to a #q-th parity check polynomial that satisfies 0 of equation 82.
Similarly, when time varying period m is a prime number in a regular TV-m-LDPC-CC that satisfies the condition of C#2, consider a case where C#3.2 holds true with attention focused on the term of P(D).
C#3.2: In parity check polynomial (82) that satisfies 0 of a regular TV-m-LDPC-CC that satisfies the condition of C#2, b#q,i mod m≠b#q,j mod m holds true in P(D) for ∀q, where i≠j.
In parity check polynomial (82) that satisfies 0 of a regular TV-m-LDPC-CC that satisfies the condition of C#2, a case will be considered where a tree is drawn exclusively for variable nodes corresponding to Db#q,iP(D) and Db#q,jP(D) that satisfy C#3.2.
At this time, according to feature 1, there are check nodes corresponding to all #0 to #m−1 parity check polynomials for ∀q in a tree whose starting point is a check node corresponding to a #q-th parity check polynomial that satisfies 0 of equation 82.
Example: In parity check polynomial (82) that satisfies 0 of a regular TV-m-LDPC-CC that satisfies the condition of C#2, it is assumed that time varying period m=7 (prime number) and (b#q,1, b#q,2)=(2, 0) holds true for ∀q. Therefore, C#3.2 is satisfied.
When a tree is drawn exclusively for variable nodes corresponding to Db#q,1P(D) and Db#q,2P(D), a tree whose starting point is a check node corresponding to a #0-th parity check polynomial that satisfies 0 of equation 82 is represented as shown in
Feature 3:
In a regular TV-m-LDPC-CC that satisfies the condition of C#2, when time varying period m is not a prime number, consider a case where C#4.1 holds true with attention focused on one of X1(D), . . . , Xn-1(D).
C#4.1: In parity check polynomial (82) that satisfies 0 of a regular TV-m-LDPC-CC that satisfies the condition of C#2, when a#q,p,i mod m≥a#q,p,j mod m in Xp(D) for ∀q, |a#q,p,i mod m−a#q,p,j mod m| is a divisor other than 1 of m, where i≠j.
In parity check polynomial (82) that satisfies 0 of the regular TV-m-LDPC-CC that satisfies the condition of C#2, a case will be considered where a tree is drawn exclusively for variable nodes corresponding to Da#q,p,jXp(D) and Da#q,p,jXp(D) that satisfy C#4.1. At this time, according to feature 1, in the tree whose starting point corresponds to the #q-th parity check polynomial that satisfies 0 of equation 82, there is no check node corresponding to all #0 to #m−1 parity check polynomials for ∀q.
Similarly, in the regular TV-m-LDPC-CC that satisfies the condition of C#2, consider a case where C#4.2 holds true when time varying period m is not a prime number with attention focused on the term of P(D).
C#4.2: In parity check polynomial (82) that satisfies 0 of the regular TV-m-LDPC-CC that satisfies the condition of C#2, when b#q,i mod m≥b#q,j mod m in P(D) for ∀q, |b#q,i mod m−b#q,j mod m| is a divisor other than 1 of m, where i≠j.
In parity check polynomial (82) that satisfies 0 of the regular TV-m-LDPC-CC that satisfies the condition of C#2, a case will be considered where a tree is drawn exclusively for variable nodes corresponding to Db#q,iP(D) and Db#q,jP(D) that satisfy C#4.2. At this time, according to feature 1, in the tree whose starting point is a check node corresponds to the #q-th parity check polynomial that satisfies 0 of equation 82, there are not all check nodes corresponding to #0 to #m-1 parity check polynomials for ∀q.
Example: In parity check polynomial (82) that satisfies 0 of the regular TV-m-LDPC-CC that satisfies the condition of C#2, it is assumed that time varying period m=6 (not a prime number) and (b#q,1, b#q,2)=(3, 0) holds true for ∀q. Therefore, C#4.2 is satisfied.
When a tree is drawn exclusively for variable nodes Db#q,1P(D) and Db#q,2P(D), a tree whose starting point is a check node corresponding to #0-th parity check polynomial that satisfies 0 of equation 82 is represented as shown in
Next, in the regular TV-m-LDPC-CC that satisfies the condition of C#2, a feature will be described which particularly relates to when time varying period m is an even number.
Feature 4:
In the regular TV-m-LDPC-CC that satisfies the condition of C#2, when time varying period m is an even number, consider a case where C#5.1 holds true with attention focused on one of X1(D), . . . , Xn-1(D).
C#5.1: In parity check polynomial (82) that satisfies 0 of the regular TV-m-LDPC-CC that satisfies the condition of C#2, when a#q,p,i mod m≥a#q,p,j mod m in Xp(D) for ∀q, |a#q,p,i mod m−a#q,p,j mod m| is an even number, where
In parity check polynomial (82) that satisfies 0 of the regular TV-m-LDPC-CC that satisfies the condition of C#2, a case will be considered where a tree is drawn exclusively for variable nodes corresponding to Da#q,p,iXp(D) and Da#q,p,jXp(D) that satisfy C#5.1. At this time, according to feature 1, when q is an odd number, there are only check nodes corresponding to odd-numbered parity check polynomials in a tree whose starting point is a check node corresponding to the #q-th parity check polynomial that satisfies 0 of equation 82. On the other hand, when q is an even number, there are only check nodes corresponding to even-numbered parity check polynomials in a tree whose starting point is a check node corresponding to the #q-th parity check polynomial that satisfies 0 of equation 82.
Similarly, in the regular TV-m-LDPC-CC that satisfies the condition of C#2, when time varying period m is an even number, consider a case where C#5.2 holds true with attention focused on the term of P(D).
C#5.2: In parity check polynomial (82) that satisfies 0 of the regular TV-m-LDPC-CC that satisfies the condition of C#2, when b#q,i mod m≥b#q,j mod m in P(D) for ∀q, |b#q,i mod m−b#q,j mod m| is an even number, where
In parity check polynomial (82) that satisfies 0 of the regular TV-m-LDPC-CC that satisfies the condition of C#2, a case will be considered where a tree is drawn exclusively for variable nodes corresponding to Db#q,iP(D) and Db#q,jP(D) that satisfy C#5.2. At this time, according to feature 1, when q is an odd number, only check nodes corresponding to odd-numbered parity check polynomials are present in a tree whose starting point is a check node corresponding to the #q-th parity check polynomial that satisfies 0 of equation 82. On the other hand, when q is an even number, only check nodes corresponding to even-numbered parity check polynomials are present in a tree whose starting point is a check node corresponding to the #q-th parity check polynomial that satisfies 0 of equation 82.
[Design Method of Regular TV-m-LDPC-CC]
A design policy will be considered for providing high error correction capability in the regular TV-m-LDPC-CC that satisfies the condition of C#2. Here, a case of C#6.1, C#6.2 or the like will be considered.
C#6.1: In parity check polynomial (82) that satisfies 0 of the regular TV-m-LDPC-CC that satisfies the condition of C#2, a case will be considered where a tree is drawn exclusively for variable nodes corresponding to Da#q,p,iXp(D) and Da#q,p,jXp(D) (where i≠j). At this time, all check nodes corresponding to #0 to #m−1 parity check polynomials for ∀q are not present in a tree whose starting point is a check node corresponding to the #q-th parity check polynomial that satisfies 0 of equation 82.
C#6.2: In parity check polynomial (82) that satisfies 0 of the regular TV-m-LDPC-CC that satisfies the condition of C#2, a case will be considered where a tree is drawn exclusively for variable nodes corresponding to Db#q,iP(D) and Db#q,jP(D) (where i≠j). At this time, all check nodes corresponding to #0 to #m−1 parity check polynomials for ∀q are not present in a tree whose starting point is a check node corresponding to the #q-th parity check polynomial that satisfies 0 of equation 82.
In such cases as C#6.1 and C#6.2, since “all check nodes corresponding to #0 to #m-1 parity check polynomials for ∀q are not present,” the effect in inference #1 when the time varying period is increased is not obtained. Therefore, with the above description taken into consideration, the following design policy is given to provide high error correction capability.
[Design policy]: In the regular TV-m-LDPC-CC that satisfies the condition of C#2, a condition of C#7.1 is provided with attention focused on one of X1(D), . . . , Xn-1(D).
C#7.1: A case will be considered where a tree is drawn exclusively for variable nodes corresponding to Da#q,p,iXp(D) and Da#q,p,jXp(D) in parity check polynomial (82) that satisfies 0 of a regular TV-m-LDPC-CC that satisfies the condition of C#2 (where i≠j). At this time, check nodes corresponding to all #0 to #m−1 parity check polynomials are present in a tree whose starting point is a check node corresponding to the #q-th parity check polynomial that satisfies 0 of equation 82 for ∀q.
Similarly, in the regular TV-m-LDPC-CC that satisfies the condition of C#2, the condition of C#7.2 is provided with attention focused on the term of P(D).
C#7.2: In parity check polynomial (82) that satisfies 0 of the regular TV-m-LDPC-CC that satisfies the condition of C#2, a case will be considered where a tree is drawn exclusively for variable nodes corresponding to Db#q,iP(D) and Db#q,jP(D) (where i≠j). At this time, check nodes corresponding to all #0 to #m-1 parity check polynomials are present in a tree whose starting point is a check node corresponding to the #q-th parity check polynomial that satisfies 0 of equation 82 for ∀q.
In the present design policy, it is assumed that C#7.1 holds true for ∀(i, j) and also holds true for ∀p, and C#7.2 holds true for ∀(i, j).
Inference #1 is then satisfied.
Next, a theorem relating to the design policy will be described.
Theorem 2: Satisfying the design policy requires a#q,p,i mod m≠a#q,p,j mod m and b#q,i mod m≠b#q,j mod m to be satisfied, where i≠j.
Proof: When a tree is drawn exclusively for variable nodes corresponding to Da#q,p,iXp(D) and Da#q,p,jXp(D) in equation 82 of the parity check polynomial that satisfies 0 of the regular TV-m-LDPC-CC that satisfies the condition of C#2, if theorem 2 is satisfied, check nodes corresponding to all #0 to #m−1 parity check polynomials are present in a tree whose starting point is a check node corresponding to the #q-th parity check polynomial that satisfies 0 of equation 82. This holds true for all p's. Similarly, when a tree is drawn exclusively for variable nodes corresponding to Db#q,iP(D) and Db#q,jP(D) in equation 82 of the parity check polynomial that satisfies 0 of the regular TV-m-LDPC-CC that satisfies the condition of C#2, if theorem 2 is satisfied, check nodes corresponding to all #0 to #m−1 parity check polynomials are present in a tree whose starting point is a check node corresponding to the #q-th parity check polynomial that satisfies 0 of equation 82. Therefore, theorem 2 is proven.
Theorem 3: In the regular TV-m-LDPC-CC that satisfies the condition of C#2, when time varying period m is an even number, there is no code that satisfies the design policy.
Proof: In parity check polynomial (82) that satisfies 0 of the regular TV-m-LDPC-CC that satisfies the condition of C#2, when p=1, if it is possible to prove that the design policy is not satisfied, this means that theorem 3 has been proven. Therefore, the proof is continued assuming p=1.
In the regular TV-m-LDPC-CC that satisfies the condition of C#2, (Np,1, Np,2, Np,3)=(“o”, “o”, “o”)∪(“o”, “o”, “e”)∪(“o”, “e”, “e”)∪(“e”, “e”, “e”) can represent all cases. However, “o” represents an odd number and “e” represents an even number.
Therefore, (Np,1, Np,2, Np,3)=(“o” “o”, “o”)∪(“o”, “o”, “e”)∪(“o”, “e”, “e”)∪(“e”, “e”, “e”) shows that C#7.1 is not satisfied. U represents a union.
When (Np,1, Np,2, Np,3)=(“o”, “o”, “o”), C#5.1 is satisfied so that i, j=1, 2, 3 (i≠j) is satisfied in C#5.1 no matter what the value of the set of (i, j) may be.
When (Np,1, Np,2, Np,3)=(“o”, “o”, “e”), C#5.1 is satisfied when (i, j)=(1, 2) in C#5.1.
When (Np,1, Np,2, Np,3)=(“o”, “e”, “e”), C#5.1 is satisfied when (i, j)=(2, 3) in C#5.1.
When (Np,1, Np,2, Np,3)=(“e”, “e”, “e”), C#5.1 is satisfied so that i, j=1, 2, 3 (i≠j) is satisfied in C#5.1 no matter what the value of the set of (i, j) may be.
Therefore, when (Np,1, Np,2, Np,3)=(“o”, “o”, “o”)∪(“o”, “o”, “e”)∪(“o”, “e”, “e”)∪(“e”, “e”, “e”), there are always sets of (i, j) that satisfy C#5.1. Thus, theorem 3 has been proven according to feature 4.
Therefore, to satisfy the design policy, time varying period m must be an odd number. Furthermore, to satisfy the design policy, the following conditions are effective according to feature 2 and feature 3.
Time varying period m is a prime number.
Time varying period m is an odd number and the number of divisors of m is small.
Especially, when the condition that “time varying period m is an odd number and the number of divisors of m is small” is taken into consideration, the following cases can be considered as examples of conditions under which codes of high error correction capability are likely to be achieved:
(1) The time varying period is assumed to be α×β, where α and β are odd numbers other than 1 and are prime numbers.
(2) The time varying period is assumed to be αn, where α is an odd number other than 1 and is a prime number, and n is an integer equal to or greater than 2.
(3) The time varying period is assumed to be α×β×γ, where α, β and γ are odd numbers other than 1 and are prime numbers.
However, when z mod m (z is an integer equal to or greater than 0) is computed, there are m values that can be taken, and therefore the number of values taken when z mod m is computed increases as m increases. Therefore, when m is increased, it is easier to satisfy the above-described design policy. However, when time varying period m is assumed to be an even number, this does not mean that a code having high error correction capability cannot be obtained.
Table 9 shows examples of LDPC-CC (#1 and #2 in Table 9) based on parity check polynomials of time varying periods of 2 and 3 discussed so far. In addition, Table 9 also shows an example of regular TV11-LDPC-CC (#3 in Table 9) of a time varying period of 11 that satisfies the aforementioned design policy. However, it is assumed that the coding rate set for the code search is R=2/3 and maximum constraint length Kmax is 600.
Evaluation of BER Characteristic:
As shown in
From above, it is possible to confirm that the TV-m-LDPC-CC of a greater time varying period based on the aforementioned design policy has better error correction capability than that of the TV2-LDPC-CC and TV3-LDPC-CC and confirm the effectiveness of the design policy discussed above.
The present embodiment will describe a reordering method of the erasure correction coding processing section in a packet layer when an LDPC-CC of a coding rate of (n−1)/n and a time varying period of h (h is an integer equal to or greater than 4) described in Embodiment 1 is applied to an erasure correction scheme. The configuration of the erasure correction coding processing section according to the present embodiment is common to that of the erasure correction coding processing section shown in
Aforementioned
[83]
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Da#g,2,1+Da#g,2,2+1)X2(D)+ . . . +(Da#g,n-1,1+Da#g,n-1,2+1)Xn-1(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 83)
In equation 83, a#g,p,1 and a#g,p,2 are natural numbers equal to or greater than 1, and hold a#g,p,1≠a#g,p,2. Also, b#g,1 and b#g,2 are natural numbers equal to or greater than 1 and hold b#g,1≠b#g,2 (g=0, 1, 2, . . . , h−2, h−1; p=1, 2, . . . , n−1).
Referring to the parity check matrix shown in
In
“11111” assigned reference numeral 5503 corresponds to terms of X1(D), X2(D), X3(D), X4(D) and P(D) of the 0-th parity check polynomial that satisfies 0 of equation 83. When compared with X1,k, X2,k, . . . , Xn-1,k, and Pk at point in time k, “1” of reference numeral 5510 corresponds to X1,k, “1” of reference numeral 5511 corresponds to X2,k, “1” of reference numeral 5512 corresponds to X3,k, “1” of reference numeral 5513 corresponds to X4,k, and “1” of reference numeral 5514 corresponds to Pk (see equation 60).
Similarly, “11111” assigned reference numeral 5504 corresponds to terms of X1(D), X2(D), X3(D), X4(D) and P(D) of the first parity check polynomial that satisfies 0 of equation 83. When compared with X1,k+1, X2,k+1, . . . , Xn-1,k+1, and Pk+1 at point in time k+1, “1” of reference numeral 5515 corresponds to X1,k+1, “1” of reference numeral 5516 corresponds to X2,k+1, “1” of reference numeral 5517 corresponds to X3,k+1, “1” of reference numeral 5518 corresponds to X4,k+1, and “1” of reference numeral 5519 corresponds to Pk+1 (see equation 60).
Next, the method of reordering information bits of an information packet when information packets and parity packets are configured separately (see
Pattern $1 shows a pattern example with low erasure correction capability and pattern $2 shows a pattern example with high erasure correction capability. In
In pattern $1, X1,k and X4,k among X1,k, X2,k, X3,k, and X4,k at point in time k are data of the same packet (packet #1). Similarly, X3,k+1 and X4,k+1 at point in time k+1 are also data of the same packet (packet #2). At this time, when, for example, packet #1 is lost (loss), it is difficult to reconstruct lost bits (X1,k and X4,k) through row computation in BP decoding. Similarly, when packet #2 is lost (loss), it is difficult to reconstruct lost bits (X3,k+1 and X4,k+1) through row computation in BP decoding. From the points described above, pattern $1 can be said to be a pattern example with low erasure correction capability.
On the other hand, in pattern $2, with regard to X1,k, X2,k, X3,k, and X4,k, it is assumed that X1,k, X2,k, X3,k, and X4,k are comprised of data with different packet numbers at all points in time k. At this time, since it is more likely to be able to reconstruct lost bits through row computation in BP decoding, pattern $2 can be said to be a pattern example with high erasure correction capability.
In this way, when information packets and parity packets are configured separately (see
Next, the method of reordering information bits in an information packet when information packets and parity packets are configured without distinction (see
In pattern $1, X1,k, and Pk among X1,k, X2,k, X3,k, X4,k, and Pk at point in time k are comprised of data of the same packet. Similarly, X3,k+1 and X4,k+1 at point in time k+1 are also comprised of data of the same packet and X2,k+2, and Pk+2 at point in time k+2 are also comprised of data of the same packet.
At this time, when, for example, packet #1 is lost, it is difficult to reconstruct lost bits (X1,k and Pk) through row computation in BP decoding. Similarly, when packet #2 is lost, it is not possible to reconstruct lost bits (X3,k+1 and X4,k+1) through row computation in BP decoding, and when packet #5 is lost, it is difficult to reconstruct lost bits (X2,k+2 and Pk+2) through row computation in BP decoding. From the point described above, pattern $1 can be said to be a pattern example with low erasure correction capability.
On the other hand, in pattern $2, with regard to X1,k, X2,k, X3,k, X4,k and Pk, it is assumed that X1,k, X2,k, X3,k, X4,k and Pk are comprised of data of different packet numbers at all points in time k. At this time, since it is more likely to be able to reconstruct lost bits through row computation in BP decoding, pattern $2 can be said to be a pattern example with high erasure correction capability.
Thus, when information packets and parity packets are configured without distinction (see
As described above, the present embodiment has proposed a specific configuration for improving erasure correction capability as a reordering method at the erasure correction coding section in a packet layer when the LDPC-CC of a coding rate of (n−1)/n and a time varying period of h (h is an integer equal to or greater than 4) described in Embodiment 1 is applied to an erasure correction scheme. However, time varying period h is not limited to an integer equal to or greater than 4, but even when the time varying period is 2 or 3, erasure correction capability can be improved by performing similar reordering.
The present embodiment will describe an encoding method (encoding method at a packet level) in a layer higher than the physical layer in detail.
In
One simple method of setting the size of a parity packet is a method that sets the same size for a parity packet and an information packet. However, these sizes need not be the same.
The encoder then applies encoding to sub-information packets #1-n, #2-n, #3-n, . . . , #511-n, #512-n (n=1, 2, 3, 4, 5, 6, 7, 8) and forms parity group #n. The encoder then divides parity group #n into m portions as shown in
Thus, the information packets described in Embodiment 5 correspond to information packets #1 to #512 in
The encoder may regard a sub-information packet itself obtained by dividing an information packet as one information packet.
As another method, Embodiment 5 can also be implemented by considering the information packets described in Embodiment 5 as sub-information packets #k-1, #k-2, and #k-8 (k=1, 2, . . . , 511, 512) described in the present embodiment. Particularly, Embodiment 5 has described the method of inserting a termination sequence and the method of configuring a packet. Here, Embodiment 5 can also be implemented by considering “sub-information packets” and “sub-parity packets” in the present embodiment as “sub-information packets” and “parity packets” described in Embodiment 5. However, the embodiment can be more easily implemented if the number of bits constituting a sub-information packet is the same as the number of bits constituting a sub-parity packet.
In Embodiment 5, data other than information (e.g., error detection code) is added to an information packet. Furthermore, in Embodiment 5, data other than parity bits is added to a parity packet. However, the conditions relating to termination shown in equation 62 to equation 70 become important conditions when applied to a case not including data other than information bits and parity bits, and a case relating to the number of information bits of an information packet and a case relating to the number of parity bits of a parity packet.
Embodiment 1 has described an LDPC-CC having good characteristics. The present embodiment will describe a shortening method that makes a coding rate variable when an LDPC-CC described in Embodiment 1 is applied to a physical layer. “Shortening” refers to generating a code of a second coding rate from a code of a first coding rate (first coding rate>second coding rate).
Hereinafter, a shortening method of generating an LDPC-CC of a coding rate of 1/3 from an LDPC-CC of a time varying period of h (his an integer equal to or greater than 4) of a coding rate of 1/2 described in Embodiment 1 will be described as an example.
A case will be considered where a g-th (g=0, 1, . . . , h−1) parity check polynomial of a coding rate of 1/2 and a time varying period of h is represented as shown in equation 84.
[84]
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 84)
It is assumed in equation 84 that a#g,1,1 and a#g,1,2 are natural numbers equal to or greater than 1 and a#g,1,1≠a#g,1,2 holds true. Furthermore, it is assumed that b#g,1 and b#g,2 are natural numbers equal to or greater than 1 and b#g,1≠b#g,2 holds true (g=0, 1, 2, . . . , h−2, h−1).
Equation 84 is assumed to satisfy <condition #17> below.
<Condition #17>
“a#0,1,1%h=a#1,1,1%h=a#2,1,1%h=a#3,1,1%h= . . . =a#g,1,1%h= . . . =a#h-2,1,1%h=a#h-1,1,1%h=vp=1 (vp=1: fixed-value)”
“b#0,1%h=b#1,1%h=b#2,1%h=b#3,1%h= . . . =b#g,1%h= . . . =b#h-2,1%h=b#h-1,1%h=w (w: fixed-value)”
“a#0,1,2%h=a#1,1,2%h=a#2,1,2%h=a#3,1,2%h= . . . =a#g,1,2%h= . . . =a#h-2,1,2%h=a#h-1,1,2%h=yp=1 (yp=1: fixed-value)”
“b#0,2%h=b#1,2%h=b#2,2%h=b#3,2%h= . . . =b#g,2%h= . . . =b#h-2,2%h=b#h-1,2%h=z (z: fixed-value)”
When a parity check matrix is created as in the case of Embodiment 4, if it is assumed that information and parity at time i are Xi and Pi respectively, codeword w is represented by w=(X0, P0, X1, P1, . . . , Xi, Pi, . . . )T.
At this time, the shortening method of the present embodiment employs the following methods.
[Method #1-1]
Method #1-1 inserts known information (e.g., 0's) in information X on a regular basis (insertion rule of method #1-1). For example, known information is inserted into hk (=h×k) bits of information 2hk (=2×h×k) bits (insertion step) and encoding is performed on information of 2hk bits including known information using an LDPC-CC of a coding rate of 1/2. Parity of 2hk bits is generated (coding step) in this way. At this time, the known information of hk bits of the information of 2hk bits is designated bits not to transmit (transmission step). A coding rate of 1/3 can be realized in this way.
Known information is not limited to 0, but may be 1 or a predetermined value other than 1 and may be reported to a communication apparatus of the communicating party or determined as a specification.
Hereinafter, differences from the insertion rule of method #1-1 will be mainly described.
[Method #1-2]
Unlike method #1-1, as shown in
The insertion rule for known information (insertion rule of method #1-2) will be described focused on the differences from method #1-1 using
Furthermore, method #1-2 inserts known information (e.g., 0 (or 1 or a predetermined value)) in X8, X10, X12 and X13 at the next one period, . . . , and inserts known information in X8i, X8i+2, X8i+4 and X8i+5 at an i-th one period. From the i-th one period onward, method #1-2 inserts known information at the same positions at each period.
Next, as with [method #1-1], method #1-2 inserts known information in, for example, hk bits of information 2hk bits and performs encoding on information of 2hk bits including known information using an LDPC-CC of a coding rate of 1/2. Thus, parity of 2hk bits is generated. At this time, when known information of hk bits is assumed to be bits not to transmit, a coding rate of 1/3 can be realized.
Hereinafter, the relationship between positions at which known information is inserted and error correction capability will be described using
That is, when realizing a lower coding rate than the original coding rate by inserting known information, it is important, from the standpoint of achieving high error correction capability, to increase the number of rows, all of which correspond to known information or rows, a large number of which correspond to known information (e.g., all bits except one bit correspond to known information) of the information out of the parity and information in each row of a check matrix, that is, parity check polynomial.
In the case of a time-varying LDPC-CC, there is regularity in a pattern of parity check matrix H in which elements “1” are arranged. Therefore, by inserting known information on a regular basis at each period based on parity check matrix H, it is possible to increase the number of rows whose unknown values only correspond to parity or rows with fewer unknown information bits when parity and information are unknown. As a result, it is possible to provide an LDPC-CC of a coding rate of 1/3 providing good characteristics.
According to following [method #1-3], it is possible to realize an LDPC-CC having high error correction capability, of a coding rate of 1/3 and a time varying period of h (h is an integer equal to or greater than 4) from the LDPC-CC having good characteristics, of a coding rate of 1/2 and a time varying period of h described in Embodiment 1.
[Method #1-3]
Method #1-3 inserts known information (e.g., 0) in h×k Xj's out of 2×h×k bits of information X2hi, X2hi+1, X2hi+2, . . . , X2hi+2h-1, . . . , X2h(i+k−1), X2h(i+k−1)+1, X2h(i+k−1)+2, . . . , X2h(i+k−1)+2h-1 for a period of 2×h×2k bits formed with information and parity (since parity is included).
Here, j takes a value of one of 2hi to 2h(i+k−1)+2h−1 and h×k different values are present. Furthermore, known information may be 1 or a predetermined value.
At this time, when known information is inserted in h×k Xj's, it is assumed that, of the remainders after dividing h×k different j's by h, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (vp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less, and the difference between “the number of remainders that become (vp=1+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less. (For vp=1, yp=1 see <condition #7-1> and <condition #7-2>.) At least one such γ is present.
Thus, by providing a condition for positions at which known information is inserted, it is possible to increase the number of rows in which all information is known information or rows with many pieces of known information (e.g., all bits except one bit correspond to known information) as much as possible in each row of parity check matrix H, that is, a parity check polynomial.
The LDPC-CC of a time varying period of h described above satisfies <condition #17>. At this time, since the g-th (g=0, 1, . . . , h−1) parity check polynomial is represented as shown in equation 84, the sub-matrix (vector) corresponding to the parity check polynomial of equation 84 in the parity check matrix is represented as shown in
In
At this time, when “1” of reference numeral 4103 is represented by Xj assuming the point in time thereof to be j, “1” of reference numeral 4101 is represented by Xj−a#g,1,1 and “1” of reference numeral 4102 is represented by Xj−a#g,1,2.
Therefore, when j is considered as a reference position, “1” of reference numeral 4101 is located at a position corresponding to a multiple of vp=1 and “1” of reference numeral 4102 is located at a position corresponding to a multiple of yp=1. Furthermore, this does not depend on g.
When this is taken into consideration, the following can be said. That is, [method #1-3] is one of important requirements to “increase the number of rows whose all information is known information or rows with many pieces of known information (e.g., known information except for one bit) as much as possible in each row of parity check matrix H, that is, in the parity check polynomial by providing conditions for positions at which known information is inserted.”
As an example, it is assumed that time varying period h=4 and vp=1=1, yp=1=2. In
In this case, as j of Xj in which known information is inserted, there are four different values of 8i, 8i+2, 8i+4 and 8i+5. At this time, the remainder after dividing 8i by 4 is 0, the remainder after dividing 8i+2 by 4 is 2, the remainder after dividing 8i+4 by 4 is 0 and the remainder after dividing 8i+5 by 4 is 1. Therefore, the number of remainders which become 0 is 2, the number of remainders which become vp=1=1 is 1, the number of remainders which become yp=1=2 is 1, and the insertion rule of above [method #1-3] is satisfied (where γ=0). Therefore, the example shown in
As a more severe condition of [method #1-3], the following [method #1-3′] can be provided.
[Method #1-3′]
Method #1-3′ inserts known information (e.g., 0) in h×k Xj's of 2×h×k bits of information X2hi, X2hi+1, X2hi+2, . . . , X2hi+2h-1, . . . , X2h(i+k−1), X2h(i+k−1)+1, X2h(i+k−1)+2, . . . , X2h(i+k−1)+2h-1 for a period of 2×h×2k bits formed with information and parity (since parity is included). However, j takes the value of one of 2hi to 2h(i+k−1)+2h−1 and there are h×k different values. Furthermore, known information may be 1 or a predetermined value.
At this time, when known information is inserted in h×k Xj's, it is assumed that, of the remainders after dividing h×k different j's by h, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (vp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less, and the difference between “the number of remainders that become (vp=1+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less. (For vp=1, yp=1, see <condition #7-1> and <condition #7-2>.) At least one such γ is present.
For γ that does not satisfy the above description, “the number of remainders that become (0+γ) mod h,” “the number of remainders that become (vp=1+γ) mod h” and “the number of remainders that become (yp=1+γ) mod h” become 0.
Furthermore, to implement [method #1-3] more effectively, one of the following three conditions may be satisfied in an LDPC-CC based on the aforementioned parity check polynomial with <condition #17> of a time varying period of h (insertion rule of method #1-3′). However, it is assumed that vp=1<yp=1 in <condition #17>.
yp=1−vp=1=vp=1−0 that is, yp=1=2×vp=1
vp=1−0=h−yp=1 that is, vp=1=h−yp=1
h−yp-1=yp=1−vp=1 that is, h=2×yp=1−vp=1
When this condition is added, by providing a condition for positions at which known information is inserted, it is possible to increase the number of rows whose all information is known information or rows with many pieces of known information (e.g., all bits except one bit correspond to known information) as much as possible in each row of parity check matrix H, that is, a parity check polynomial. This is because the LDPC-CC has a specific configuration of parity check matrix.
Next, a shortening method will be described which realizes a lower coding rate than a coding rate of (n−1)/n from an LDPC-CC of a time varying period of h (h is an integer equal to or greater than 4) of a coding rate of (n−1)/n (n is an integer equal to or greater than 2) described in Embodiment 1.
A case will be considered where a g-th (g=0, 1, . . . , h-1) parity check polynomial of a coding rate of (n−1)/n and a time varying period of h is represented as shown in equation 85.
[85]
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Da#g,2,1+Da#g,2,2+1)X2(D)+ . . . +(Da#g,n-1,1+Da#g,n-1,2+1)Xn-1(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 85)
In equation 85, it is assumed that a#g,p,1 and a#g,p,2 are natural numbers equal to or greater than 1 and a#g,p,1≠a#g,p,2 holds true. Furthermore, it is assumed that b#g,1 and b#g,2 are natural numbers equal to or greater than 1 and b#g,1≠b#g,2 holds true (g=0, 1, 2, . . . , h−2, h−1; p=1, 2, . . . , n−1).
In equation 85, it is assumed that following <condition #18-1> and <condition #18-2> are satisfied.
<Condition #18-1>
“a#0,1,1%h=a#1,1,1%h=a#2,1,1%h=a#3,1,1%h= . . . =a#g,1,1%h= . . . =a#h-2,1,1%h=a#h-1,1,1%h=vp=1 (vp=1: fixed-value)”
“a#0,2,1%h=a#1,2,1%h=a#2,2,1%h=a#3,2,1%h= . . . =a#g,2,1%h= . . . =a#h-2,2,1%h=a#h-1,2,1%h=vp=2 (vp=2: fixed-value)”
“a#0,3,1%h=a#1,3,1%h=a#2,3,1%h=a#3,3,1%h= . . . =a#g,3,1%h= . . . =a#h-2,3,1%h=a#h-1,3,1%h=vp=3 (vp=3: fixed-value)”
“a#0,4,1%h=a#1,4,1%h=a#2,4,1%h=a#3,4,1%h= . . . =a#g,4,1%h= . . . =a#h-2,4,1%h=a#h-1,4,1%h=vp=4 (vp=4: fixed-value)”
“a#0,k,1%h=a#1,k,1%h=a#2,k,1%h=a#3,k,1%h= . . . =a#g,k,1%h= . . . =a#h-2,k,1%h=a#h-1,k,1%h=vp=k (vp=k: fixed-value)
(therefore, k=1, 2, . . . , n−1)”
“a#0,n-2,1%h=a#1,n-2,1%h=a#2,n-2,1%h=a#3,n-2,1%h= . . . =a#g,n-2,1%h= . . . =a#h-2,n-2,1%h=a#h-1,n-2,1%h=vp=n-2 (vp=n-2: fixed-value)”
“a#0,n-1,1%h=a#1,n-1,1%h=a#2,n-1,1%h=a#3,n-1,1%h= . . . =a#g,n-1,1%h= . . . =a#h-2,n-1,1%h=a#h-1,n-1,1%h=vp=n-1 (vp=n-1: fixed-value)”
“b#0,1%h=b#1,1%h=b#2,1%h=b#3,1%h= . . . =b#0%h= . . . =b#h-2,1%h=b#h-1,1%h=w (w: fixed-value)”
<Condition #18-2>
“a#0,1,2%h=a#1,1,2%h=a#2,1,2%h=a#3,1,2%h= . . . =a#g,1,2%h= . . . =a#h-2,1,2%h=a#h-1,1,2%h=yp=1 (vp=1: fixed-value)”
“a#0,2,2%h=a#1,2,2%h=a#2,2,2%h=a#3,2,2%h= . . . =a#g,2,2%h= . . . =a#h-2,2,2%h=a#h-1,2,2%h=yp=2 (yp=2: fixed-value)”
“a#0,3,2%h=a#1,3,2%h=a#2,3,2%h=a#3,3,2%h= . . . =a#g,3,2%h= . . . =a#h-2,3,2%h=a#h-1,3,2%h=yp=3 (yp=3: fixed-value)”
“a#0,4,2%h=a#1,4,2%h=a#2,4,2%h=a#3,4,2%h= . . . =a#g,4,2%h= . . . =a#h-2,4,2%h=a#h-1,4,2%h=yp=4 (yp=4: fixed-value)”
“a#0,k,2%h=a#1,k,2%h=a#2,k,2%h=a#3,k,2%h= . . . =a#g,k,2%h= . . . =a#h-2,k,2%h=a#h-1,k,2%h=yp=k (yp=k: fixed-value) (therefore, k=1, 2, . . . , n−1)”
“a#0,n-2,2%h=a#1,n-2,2%h=a#2,n-2,2%h=a#3,n-2,2%h= . . . =a#g,n-2,2%h= . . . =a#h-2,n-2,2%h=a#h-1,n-2,2%h=yp=n-2 (yp=n-2: fixed-value)”
“a#0,n-1,2%h=a#1,n-1,2%h=a#2,n-1,2%h=a#3,n-1,2%h= . . . =a#g,n-1,2%h= . . . =a#h-2,h-1,2%h=a#h-1,n-1,2%h=yp=n-1 (yp=n-1: fixed-value)” and
“b#0,2%h=b#1,2%h=b#2,2%h=b#3,2%h= . . . =b#g,2%h= . . . =b#h-2,2%h=b#h-1,2%h=z (z: fixed-value)”
The shortening methods for realizing a lower coding rate than a coding rate of (n−1)/n with high error correction capability using the aforementioned LDPC-CC of a coding rate of (n−1)/n and a time varying period of h are as shown below.
[Method #2-1]
Method #2-1 inserts known information (e.g., 0 (or 1 or a predetermined value)) in information X on a regular basis (insertion rule of method #2-1).
[Method #2-2]
Unlike method #2-1, method #2-2 uses h×n×k bits formed with information and parity as one period as shown in
[Method #2-3]
Method #2-3 selects Z bits from h×(n−1)×k bits of information X1,hi, X2,hi, . . . , Xn-1,hi, . . . , X1,h(i+k−1)+h-1, X2,h(i+k−1)+h-1, . . . , Xn-1,h(i+k−1)+h-1 for a period of h×n×k bits formed with information and parity and inserts known information (e.g., 0 (or 1 or a predetermined value)) of the selected Z bits (insertion rule of method #2-3).
At this time, method #2-3 computes remainders after dividing all j's by h in information X1,j (where j takes the value of one of hi to h(i+k−1)+h−1) in which known information is inserted.
Then, it is assumed that: the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (vp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less, and the difference between “the number of remainders that become (vp=1+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less. At least one such y is present.
Similarly, method #2-3 computes remainders after dividing all j's by h in information X2,j (where j takes the value of one of hi to h(i+k−1)+h−1) in which known information is inserted. Then, it is assumed that: the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (vp=2+γ) mod h (where the number of remainders is non-zero)” is 1 or less, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=2+γ) mod h (where the number of remainders is non-zero)” is 1 or less, and the difference between “the number of remainders that become (vp=2+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=2+γ) mod h (where the number of remainders is non-zero)” is 1 or less. At least one such γ is present.
Method #2-3 can be described in a similar way also when information Xf,j (f=1, 2, 3, . . . , n−1) is assumed. Method #2-3 computes remainders after dividing all j's by h in Xf,j (where j takes the value of one of hi to h(i+k−1)+h−1) in which known information is inserted. Then, it is assumed that: the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (vp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less, and the difference between “the number of remainders that become (vp=f+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less. At least one such γ is present.
Thus, by providing a condition at positions at which known information is inserted, it is possible to generate more “rows whose unknown values are parity and information bits” in parity check matrix H in the same way as in [method #1-3]. Thus, it is possible to realize a lower coding rate than a coding rate of (n−1)/n with high error correction capability using the above-described LDPC-CC of a coding rate of (n−1)/n and a time varying period of h having good characteristics.
A case has been described in [method #2-3] where the number of pieces of known information inserted is the same at each period, but the number of pieces of known information inserted may differ from one period to another. For example, as shown in
Thus, when the number of pieces of known information inserted differs from one period to another, the concept of “period” is meaningless. When the insertion rule of method #2-3 is represented without using the concept of “period,” the insertion rule is represented as shown in [method #2-4].
[Method #2-4]
Z bits are selected from a bit sequence of information X1,0, X2,0, . . . , Xn-1,0, . . . , X1,v, X2,v, . . . , Xn-1,v in a data sequence formed with information and parity, and known information (e.g., 0 (or 1 or a predetermined value)) is inserted in the selected Z bits (insertion rule of method #2-4).
At this time, method #2-4 computes remainders after dividing all j's by h in X1,j (where j takes the value of one of 0 to v) in which known information is inserted. Then, it is assumed that: the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (vp=i+γ) mod h (where the number of remainders is non-zero)” is 1 or less, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less, and the difference between “the number of remainders that become (vp=1+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less. At least one such γ is present.
Similarly, method #2-4 computes remainders after dividing all j's by h in X2,j (where j takes the value of one of 0 to v) in which known information is inserted. Then, it is assumed that: the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (vp=2+γ) mod h (where the number of remainders is non-zero)” is 1 or less, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=2+γ) mod h (where the number of remainders is non-zero)” is 1 or less, and the difference between “the number of remainders that become (vp=2+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=2+γ) mod h (where the number of remainders is non-zero)” is 1 or less. At least one such y is present.
That is, method #2-4 computes remainders after dividing all j's by h in Xf,j (where j takes the value of one of 0 to v) in which known information is inserted. Then, it is assumed that: the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (vp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less, and the difference between “the number of remainders that become (vp=f+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less (f=1, 2, 3, . . . , n−1). At least one such γ is present.
Thus, by providing a condition for positions at which known information is inserted, it is possible to generate more “rows whose unknown values are parity and information bits” in parity check matrix H in the same way as in [method #2-3] even when the number of bits of known information inserted differs from one period to another. Thus, it is possible to realize a lower coding rate than a coding rate of (n−1)/n with high error correction capability using the above-described LDPC-CC of a coding rate of (n−1)/n and a time varying period of h having good characteristics.
Furthermore, to implement [method #2-3] and [method #2-4] more effectively, one of the following three conditions may be satisfied in the aforementioned LDPC-CC based on the parity check polynomial of <condition #18-1> and <condition #18-2> of a time varying period of h. However, it is assumed that vp=s<yp=s (s=1, 2, . . . , n−1) in <condition #18-1> and <condition #18-2>.
yp=s−vp=s=vp=s−0 that is, yp=s=2×vp=s
vp=s−0=h−yp=s that is, vp=s=h−yp=s
h−yp=s=yp=s−vp=s that is, h=2×yp=s−vp=s
When this condition is added, by providing a condition for positions at which known information is inserted, it is possible to increase the number of rows whose all information is known information or rows with many pieces of known information (e.g., all bits except one bit correspond to known information) as much as possible in each row of parity check matrix H, that is, a parity check polynomial. This is because the LDPC-CC has a specific configuration of parity check matrix.
As described above, the communication apparatus inserts information known to the communicating party, performs encoding at a coding rate of 1/2 on information including known information and generates parity bits. The communication apparatus then does not transmit known information but transmits information other than known information and the parity bits obtained, and thereby realizes a coding rate of 1/3.
Known information insertion section 4403 receives information 4401 and control signal 4402 as input and inserts known information according to information on the coding rate included in control signal 4402. To be more specific, when the coding rate included in control signal 4402 is smaller than the coding rate supported by encoder 4405 and shortening needs to be performed, known information is inserted according to the aforementioned shortening method and information 4404 after the insertion of known information is outputted. On the other hand, when the coding rate included in control signal 4402 is equal to the coding rate supported by encoder 4405 and shortening need not be performed, known information is not inserted and information 4401 is outputted as information 4404 as is.
Encoder 4405 receives information 4404 and control signal 4402 as input, performs encoding on information 4404, generates parity 4406 and outputs parity 4406.
Known information deleting section 4407 receives information 4404 and control signal 4402 as input, deletes, when known information is inserted to known information insertion section 4403, the known information from information 4404 based on the information on the coding rate included in control signal 4402 and outputs information 4408 after the deletion. On the other hand, when known information is not inserted, known information insertion section 4403 outputs information 4404 as information 4408 as is.
Modulation section 4409 receives parity 4406, information 4408 and control signal 4402 as input, modulates parity 4406 and information 4408 based on information of the modulation scheme included in control signal 4402, and generates and outputs baseband signal 4410.
Decoding section 4605 receives control signal 4602 and log likelihood ratio signal 4604 after inserting the log likelihood ratio of the known information as input, performs decoding based on information of the encoding method such as a coding rate included in control signal 4602, decodes the received data and outputs decoded data 4606.
Known information deleting section 4607 receives control signal 4602 and decoded data 4606 as input, deletes, when known information is inserted, the known information based on the information of the encoding method such as the coding rate included in control signal 4602 and outputs information 4608 after the deletion of the known information.
The shortening method has been described so far which realizes a lower coding rate than the coding rate of the code from an LDPC-CC of a time varying period of h described in Embodiment 1. When the LDPC-CC of a time varying period of h is used in a packet layer described in Embodiment 1, using the shortening method according to the present embodiment makes it possible to improve transmission efficiency and erasure correction capability simultaneously. Even when the coding rate is changed in the physical layer, good error correction capability can be achieved.
In the case of a convolutional code such as LDPC-CC, a termination sequence may be added at the termination of a transmission information sequence to perform termination processing (termination). At this time, encoding section 4405 receives known information (e.g., all zeros) as input and the termination sequence is formed with only a parity sequence obtained by encoding the known information. Thus, the termination sequence may include parts that do not follow the known information insertion rule described in the invention of the present application. Furthermore, there may be a part following the insertion rule and a part in which known information is not inserted also in parts other than the termination to improve the transmission rate. The termination processing (termination) will be described in Embodiment 11.
The present embodiment will describe an erasure correction method that realizes a lower coding rate than a coding rate of (n−1)/n with high error correction capability using the LDPC-CC of a coding rate of (n−1)/n and a time varying period of h (h is an integer equal to or greater than 4) described in Embodiment 1. However, the description of the LDPC-CC of a coding rate of (n−1)/n and a time varying period of h (h is an integer equal to or greater than 4) is assumed to be the same as that in Embodiment 9.
[Method #3-1]
As shown in
[Method #3-2]
Method #3-2 selects Z bits from h×(n−1)×k bits of information X1,hi, X2,hi, . . . , Xn-1,hi, . . . , X1,h(i+k−1)+h-1, X2,h(i+k−1)+h-1, . . . , Xn-1,h(i+k−1)+h-1 at a period of h×n×k bits formed with information and parity, and inserts data of a known information packet (e.g., 0 (or 1 or a predetermined value)) in the selected Z bits (insertion rule of method #3-2).
At this time, method #3-2 computes remainders after dividing all j's by h in X1,j (where j takes the value of one of hi to h(i+k−1)+h−1) in which the data of the known information packet is inserted. Then, it is assumed that: the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (vp=i+γ) mod h (where the number of remainders is non-zero)” is 1 or less, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less, and the difference between “the number of remainders that become (vp=1+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less. At least one such y is present.
That is, method #3-2 computes remainders after dividing all j's by h in Xf,j (where j takes the value of one of hi to h(i+k−1)+h−1) in which the data of the known information packet is inserted. Then, it is assumed that: the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (vp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less, and the difference between “the number of remainders that become (vp=f+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less (f=1, 2, 3, . . . , n−1). At least one such y is present.
Thus, by providing a condition at positions at which known information is inserted, it is possible to generate more “rows whose unknown values are parity and fewer information bits” in parity check matrix H. Thus, it is possible to realize a system capable of changing a coding rate of its erasure correction code with high erasure correction capability and a low circuit scale using the above-described LDPC-CC of a coding rate of (n−1)/n and a time varying period of h.
An erasure correction method using a variable coding rate of a erasure correction code has been described so far as the erasure correction method in a upper layer.
With regard to the configuration of the erasure correction coding-related processing section and erasure correction decoding-related processing section using a variable coding rate of an erasure correction code in a upper layer, the coding rate of the erasure correction code can be changed by inserting a known information packet before erasure correction coding-related processing section 2112 in
Thus, the coding rate is made variable according to, for example, a communication situation, and it is thereby possible to increase the coding rate when the communication situation is good and improve transmission efficiency. Furthermore, when the coding rate is decreased, it is possible to improve erasure correction capability by inserting known information included in a known information packet according to the check matrix as in the case of [method #3-2].
A case has been described with [method #3-2] where the number of pieces of data of a known information packet inserted is the same among different periods, but the number of pieces of data inserted may differ from one period to another. For example, as shown in
When the number of pieces of data of the known information packet inserted differs from one period to another in this way, the concept of “period” is meaningless. When the insertion rule of method #3-2 is represented without using the concept of “period,” the insertion rule is as shown in [method #3-3].
[Method #3-3]
Z bits are selected from a bit sequence of information X1,0, X2,0, . . . , Xn-1,0, . . . , X1,v, X2,v, . . . , Xn-1,v in a data sequence formed with information and parity, and known information (e.g., 0 (or 1 or a predetermined value)) is inserted in the selected Z bits (insertion rule of method #3-3).
At this time, method #3-3 computes remainders after dividing all j's by h in X1,j (where j takes the value of one of 0 to v) in which known information is inserted.
Then, it is assumed that: the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (vp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less, and the difference between “the number of remainders that become (vp=1+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less. At least one such y is present.
That is, method #3-3 computes remainders after dividing all j's by h in Xf,j (where j takes the value of one of 0 to v) in which known information is inserted. Then, it is assumed that: the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (vp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less, and the difference between “the number of remainders that become (vp=f+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less (f=1, 2, 3, . . . , n−1). At least one such γ is present.
A system using a variable coding rate of an erasure correction code has been described so far which uses a method of realizing a lower coding rate than the coding rate of a code from an LDPC-CC of a time varying period of h described in Embodiment 1. Using the variable coding rate method of the present embodiment, it is possible to improve transmission efficiency and erasure correction capability simultaneously and achieve good erasure correction capability when the coding rate is changed during erasure correction.
When an LDPC-CC relating to the present invention is used, termination or tail-biting is necessary to secure belief in decoding of information bits. Thus, the present embodiment will describe a method in detail when termination (referred to as “information-zero-termination” or simply referred to as “zero-termination”) is performed.
For this reason, when the encoder performs encoding only until point in time s and the transmitting apparatus on the encoding side performs transmission to the receiving apparatus on the decoding side only until Ps, receiving quality of information bits in the decoder deteriorates considerably. To solve this problem, encoding is performed assuming information bits (hereinafter “virtual information bits”) from final information bit Xn-1,s onward to be “0”s and parity bit (4903) is generated.
To be more specific, as shown in
It goes without saying that all embodiments of the present invention can also be implemented even when termination is performed.
The present embodiment will describe an example of a specific method of generating an LDPC-CC based on the parity check polynomials described in Embodiment 1 and Embodiment 6.
Embodiment 6 has described that the following conditions are effective as the time varying period of an LDPC-CC described in Embodiment 1:
The time varying period is a prime number. The time varying period is an odd number and the number of divisors is small with respect to the value of a time varying period.
Here, a case will be considered where the time varying period is increased and a code is generated. At this time, a code is generated using a random number with which the constraint condition is given, but when the time varying period is increased, the number of parameters to be set using a random number increases, resulting in a problem that it is difficult to search a code having high error correction capability. To solve this problem, the present embodiment will describe a method of generating a different code using an LDPC-CC based on the parity check polynomials described in Embodiment 1 and Embodiment 6.
An LDPC-CC design method based on a parity check polynomial of a coding rate of 1/2 and a time varying period of 15 will be described as an example.
Consider equations 86-0 to 86-14 as parity check polynomials (that satisfy 0) of an LDPC-CC of a coding rate of (n−1)/n (n is an integer equal to or greater than 2) and a time varying period of 15.
[86]
(Da#0,1,1+Da#0,1,2+Da#0,1,3)X1(D)+(Da#0,2,1+Da#0,2,2+Da#0,2,3)X2(D)+ . . . +(Da#0,n-1,1+D#0,n-1,2+D#a0,n-1,3)Xn-1(D)+(Db#0,1+Db#0,2+Db#0,3)P(D)=0 (Equation 86-0)
(Da#1,1,1+Da#1,1,2+Da#1,1,3)X1(D)+(Da#1,2,1+Da#1,2,2+Da#1,2,3)X2(D)+ . . . +(Da#1,n-1,1+D#1,n-1,2+Da#1,n-1,3)Xn-1(D)+(Db#1,1+Db#1,2+Db#1,3)P(D)=0 (Equation 86-1)
(Da#2,1,1+Da#2,1,2+Da#2,1,3)X1(D)+(Da#2,2,1+Da#2,2,2+Da#2,2,3)X2(D)+ . . . +(Da#2,n-1,1+D#2,n-1,2+Da#2,n-1,3)Xn-1(D)+(Db#2,1+Db#2,2+Db#2,3)P(D)=0 (Equation 86-2)
(Da#3,1,1+Da#3,1,2+Da#3,1,3)X1(D)+(Da#3,2,1+Da#3,2,2+Da#3,2,3)X2(D)+ . . . +(Da#3,n-1,1+D#3,n-1,2+Da#3,n-1,3)Xn-1(D)+(Db#3,1+Db#3,2+Db#3,3)P(D)=0 (Equation 86-3)
(Da#4,1,1+Da#4,1,2+Da#4,1,3)X1(D)+(Da#4,2,1+Da#4,2,2+Da#4,2,3)X2(D)+ . . . +(Da#4,n-1,1+D#4,n-1,2+Da#4,n-1,3)Xn-1(D)+(Db#4,1+Db#4,2+Db#4,3)P(D)=0 (Equation 86-4)
(Da#5,1,1+Da#5,1,2+Da#5,1,3)X1(D)+(Da#5,2,1+Da#5,2,2+Da#5,2,3)X2(D)+ . . . +(Da#5,n-1,1+D#5,n-1,2+Da#5,n-1,3)Xn-1(D)+(Db#5,1+Db#5,2+Db#5,3)P(D)=0 (Equation 86-5)
(Da#6,1,1+Da#6,1,2+Da#6,1,3)X1(D)+(Da#6,2,1+Da#6,2,2+Da#6,2,3)X2(D)+ . . . +(Da#6,n-1,1+D#6,n-1,2+Da#6,n-1,3)Xn-1(D)+(Db#6,1+Db#6,2+Db#6,3)P(D)=0 (Equation 86-6)
(Da#7,1,1+Da#7,1,2+Da#7,1,3)X1(D)+(Da#7,2,1+Da#7,2,2+Da#7,2,3)X2(D)+ . . . +(Da#7,n-1,1+D#7,n-1,2+Da#7,n-1,3)Xn-1(D)+(Db#7,1+Db#7,2+Db#7,3)P(D)=0 (Equation 86-7)
(Da#8,1,1+Da#8,1,2+Da#8,1,3)X1(D)+(Da#8,2,1+Da#8,2,2+Da#8,2,3)X2(D)+ . . . +(Da#8,n-1,1+D#8,n-1,2+Da#8,n-1,3)Xn-1(D)+(Db#8,1+Db#8,2+Db#8,3)P(D)=0 (Equation 86-8)
(Da#9,1,1+Da#9,1,2+Da#9,1,3)X1(D)+(Da#9,2,1+Da#9,2,2+Da#9,2,3)X2(D)+ . . . +(Da#9,n-1,1+D#9,n-1,2+Da#9,n-1,3)Xn-1(D)+(Db#9,1+Db#9,2+Db#9,3)P(D)=0 (Equation 86-9)
(Da#10,1,1+Da#10,1,2+Da#10,1,3)X1(D)+(Da#10,2,1+Da#10,2,2+Da#10,2,3)X2(D)+ . . . +(Da#10,n-1,1+D#10,n-1,2+Da#10,n-1,3)Xn-1(D)+(Db#10,1+Db#10,2+Db#10,3)P(D)=0 (Equation 86-10)
(Da#11,1,1+Da#11,1,2+Da#11,1,3)X1(D)+(Da#11,2,1+Da#11,2,2+Da#11,2,3)X2(D)+ . . . +(Da#11,n-1,1+D#11,n-1,2+Da#11,n-1,3)Xn-1(D)+(Db#11,1+Db#11,2+Db#11,3)P(D)=0 (Equation 86-11)
(Da#12,1,1+Da#12,1,2+Da#12,1,3)X1(D)+(Da#12,2,1+Da#12,2,2+Da#12,2,3)X2(D)+ . . . +(Da#12,n-1,1+D#12,n-1,2+Da#12,n-1,3)Xn-1(D)+(Db#12,1+Db#12,2+Db#12,3)P(D)=0 (Equation 86-12)
(Da#13,1,1+Da#13,1,2+Da#13,1,3)X1(D)+(Da#13,2,1+Da#13,2,2+Da#13,2,3)X2(D)+ . . . +(Da#13,n-1,1+D#13,n-1,2+Da#13,n-1,3)Xn-1(D)+(Db#13,1+Db#13,2+Db#13,3)P(D)=0 (Equation 86-13)
(Da#14,1,1+Da#14,1,2+Da#14,1,3)X1(D)+(Da#14,2,1+Da#14,2,2+Da#14,2,3)X2(D)+ . . . +(Da#14,n-1,1+D#14,n-1,2+Da#14,n-1,3)Xn-1(D)+(Db#14,1+Db#14,2+Db#14,3)P(D)=0 (Equation 86-14)
At this time, X1(D), X2(D), . . . , Xn-1(D) are polynomial representations of data (information) X1, X2, . . . Xn-1 and P(D) is a polynomial representation of parity. In equations 86-0 86-14, when, for example, the coding rate is 1/2, there are only terms of X1(D) and P(D) and there are no terms of X2(D), . . . , Xn-1(D). Similarly, when the coding rate is 2/3, there are only terms of X1(D), X2(D) and P(D) and there are no terms of X3(D), . . . , Xn-1(D). Other coding rates may also be considered likewise. Here, equations 86-0 to 86-14 are assumed to be such parity check polynomials that there are three terms in each of X1(D), X2(D), . . . , Xn-1(D) and P(D).
Furthermore, it is assumed that the following holds true for X1(D), X2(D), . . . , Xn-1(D) and P(D) in equations 86-0 to 86-14.
In equation 86-q, it is assumed that a#q,p,1, a#q,p,2 and a#q,p,3 are natural numbers and a#q,p,1≠aq,p,2, a#q,p,1≠aq,p,3 and a#q,p,2≠a#q,p,3 hold true. Furthermore, it is assumed that b#q,1, b#q,2 and b#q,3 are natural numbers and b#q,1≠b#q,2, b#q,1≠b#q,3 and b#q,1·bq,3 hold true (q=0, 1, 2, . . . , 13, 14; p=1, 2, . . . , n−1).
The parity check polynomial of equation 86-q is called “check equation #q” and the sub-matrix based on the parity check polynomial of equation 86-q is called q-th sub-matrix Hq. An LDPC-CC of a time varying period of 15 generated from 0-th sub-matrix H0, first sub-matrix H1, second sub-matrix H2, . . . , 13-th sub-matrix H13 and 14-th sub-matrix H14 will be considered. Thus, the code configuring method, parity check matrix generating method, encoding method and decoding method will be similar to those of the methods described in Embodiment 1 and Embodiment 6.
As described above, a case with a coding rate of 1/2 will be described, and therefore there are only terms of X1(D) and P(D) hereinafter.
In Embodiment 1 and Embodiment 6, assuming that the time varying period is 15, both the time varying period of the coefficient of X1(D) and the time varying period of the coefficient of P(D) are 15. By contrast, the present embodiment proposes a code configuring method of an LDPC-CC with a time varying period of 15 by setting the time varying period of the coefficients of X1(D) to 3 and the time varying period of the coefficients of P(D) to 5 as an example. That is, the present embodiment configures a code where the time varying period of the LDPC-CC is LCM(α, β) by setting the time varying period of the coefficients of X1(D) to a and the time varying period of the coefficients of P(D) to β (α≠β), where LCM(X, Y) is assumed to be a least common multiple of X and Y.
To achieve high error correction capability, the following conditions are provided for the coefficient of X1(D) as in the cases of Embodiment 1 and Embodiment 6. In the following conditions, “%” means a modulo, and, for example, “α%15” represents a remainder after dividing α by 15.
<Condition #19-1>
“a#0,1,1%15=a#1,1,1%15=a#2,1,1%15= . . . =a#k,1,1%15= . . . =a#14,1,1%15=vp=1 (vp=1: fixed-value)(therefore k=0, 1, 2, . . . , 14)”
“a#0,1,2%15=a#1,1,2%15=a#2,1,2%15= . . . =a#k,1,2%15= . . . =a#14,1,2%15=yp=1 (yp=1: fixed-value)(therefore k=0, 1, 2, . . . , 14)”
“a#0,1,3%15=a#1,1,3%15=a#2,1,3%15= . . . =a#k,1,3%15= . . . =a#14,1,3%15=zp=1 (zp=1: fixed-value)(therefore k=0, 1, 2, . . . , 14)”
Furthermore, since the time varying period of the coefficient of X1(D) is 3, the following condition holds true.
<Condition #19-2>
When i%3=j%3 (i, j=0, 1, . . . , 13, 14; i≠j); holds true, the following three equations hold true.
[87]
a
#i,1,1
=a
#j,1,1 (Equation 87-1)
a
#i,1,2
=a
#j,1,2 (Equation 87-2)
a
#i,1,3
=a
#j,1,3 (Equation 87-3)
Similarly, the following conditions are provided for the coefficient of P(D).
<Condition #20-1>
“b#0,1%15=b#1,1%15=b#2,1%15= . . . =b#k,1%15= . . . =b#14,1%15=d (d: fixed-value) (therefore k=0, 1, 2, . . . , 14)”
“b#0,2%15=b#1,2%15=b#2,2%15= . . . =b#k,2%15= . . . =b#14,2%15=e (e: fixed-value) (therefore k=0, 1, 2, . . . , 14)”
“b#0,3%15=b#1,3%15=b#2,3%15= . . . =b#k,3%15= . . . =b#14,3%15=f (f: fixed-value) (therefore k=0, 1, 2, . . . , 14)”
Furthermore, since the time varying period of the coefficient of P(D) is 5, the following conditions hold true.
<Condition #20-2>
When i%5=j%5 (i, j=0, 1, . . . , 13, 14; i≠j) holds true, the following three equations hold true.
[88]
b
#i,1
=b
#j,1 (Equation 88-1)
b
#i,2
=b
#j,2 (Equation 88-2)
b
#i,3
=b
#j,3 (Equation 88-3)
Providing the above-described conditions makes it possible to reduce the number of parameters set using random numbers while increasing the time varying period and achieve the effect of facilitating a code search. <Condition #19-1> and <condition #20-1> are not always necessary conditions. That is, only <condition #19-2> and <condition #20-2> may be provided as conditions. Furthermore, conditions of <condition #19-1′> and <condition #20-1′> may also be provided instead of <condition #19-1> and <condition #20-1>.
<Condition #19-1′>
“a#0,1,1%3=a#1,1,1%3=a#2,1,1%3= . . . =a#k,1,1%3= . . . =a#14,1,1%3=vp=1 (vp=1: fixed-value) (therefore k=0, 1, 2, . . . , 14)”
“a#0,1,2%3=a#1,1,2%3=a#2,1,2%3= . . . =a#k,1,2%3= . . . =a#14,1,2%3=yp=1 (yp=1: fixed-value) (therefore k=0, 1, 2, . . . , 14)”
“a#0,1,3%3=a#1,1,3%3=a#2,1,3%3= . . . =a#k,1,3%3= . . . =a#14,1,3%3=zp=1 (zp=1: fixed-value) (therefore k=0, 1, 2, . . . , 14)”
<Condition #20-1′>
“b#0,1%5=b#1,1%5=b#2,1%5= . . . =b#k,1%5= . . . =b#14,1%5=d (d: fixed-value) (therefore k=0, 1, 2, . . . , 14)”
“b#0,2%5=b#1,2%5=b#2,2%5= . . . =b#k,2%5= . . . =b#14,2%5=e (e: fixed-value) (therefore k=0, 1, 2, . . . , 14)”
“b#0,3%5=b#1,3%5=b#2,3%5= . . . =b#k,3%5= . . . =b#14,3%5=f (f: fixed-value) (therefore k=0, 1, 2, . . . , 14)”
Using the above example as a reference and assuming that the time varying period of the coefficient of X1(D) is a and the time varying period of the coefficient of P(D) is β, the code configuration method of an LDPC-CC of a time varying period of LCM(α, β) will be described, where time varying period LCM(α, β)=s.
An i-th (i=0, 1, 2, . . . , s−2, s−1) parity check polynomial that satisfies 0 of an LDPC-CC based on a parity check polynomial of a time varying period of s and a coding rate of 1/2 is represented as shown in the equation below.
[89]
(Da#i,1,1+Da#i,1,2+Da#i,1,3)X1(D)+(Db#i,1+Db#i,2+Db#i,3)P(D)=0 (Equation 89-1)
Using the above description as a reference, the following condition becomes important in the code configuration method of the present embodiment.
The following condition is provided for the coefficient of X1(D).
<Condition #21-1>
“a#0,1,1%s=a#1,1,1%s=a#2,1,1%s= . . . =a#k,1,1%s= . . . =a#s-1,1,1%s=vp=1 (vp=1: fixed-value) (therefore k=0, 1, 2, . . . , s−1)”
“a#0,1,2%s=a#1,1,2%s=a#2,1,2%s= . . . =a#k,1,2%s= . . . =a#s-1,1,2%s=yp=1 (yp=1: fixed-value) (therefore k=0, 1, 2, . . . , s−1)”
“a#0,1,3%s=a#1,1,3%s=a#2,1,3%s= . . . =a#k,1,3%s= . . . =a#s-1,1,3%s=zp=1 (zp=1: fixed-value) (therefore k=0, 1, 2, . . . , s−1)”
Furthermore, since the time varying period of the coefficient of X1(D) is α, the following condition holds true.
<Condition #21-2>
When i%α=j%α (i, j=0, 1, . . . , s−2, s−1; i≠j) holds true, the following three equations hold true.
[90]
a
#i,1,1
=a
#j,1,1 (Equation 90-1)
a
#i,1,2
=a
#j,1,2 (Equation 90-2)
a
#i,1,3
=a
#j,1,3 (Equation 90-3)
Similarly, the following condition is provided for the coefficient of P(D).
<Condition #22-1>
“b#0,1%s=b#1,1%s=b#2,1%s= . . . =b#k,1%s= . . . =b#s-1,1%s=d (d: fixed-value) (therefore k=0, 1, 2, . . . , s−1)”
“b#0,2%s=b#1,2%s=b#2,2%s= . . . =b#k,2%s= . . . =b#s-1,2%s=e (e: fixed-value) (therefore k=0, 1, 2, . . . , s−1)”
“b#0,3%s=b#1,3%s=b#2,3%s= . . . =b#k,3%s= . . . =b#s-1,3%s=f (f: fixed-value) (therefore k=0, 1, 2, . . . , s−1)”
Furthermore, since the time varying period of the coefficient of P(D) is β, the following condition holds true.
<Condition #22-2>
When i%β=j%β (i, j=0, 1, . . . , s−2, s−1; holds true, the following three equations hold true.
[91]
b
#i,1
=b
#j,1 (Equation 91-1)
b
#i,2
=b
#j,2 (Equation 91-2)
b
#i,3
=b
#j,3 (Equation 91-3)
By providing the following conditions, it is possible to reduce the number of parameters set using random numbers while increasing the time varying period and provide an effect of facilitating a code search. <Condition #21-1> and <condition #22-1> are not always necessary conditions. That is, only <condition #21-2> and <condition #22-2> may be provided as conditions. Furthermore, instead of <condition #21-1> and <condition #22-1>, conditions: <condition #21-1′> and <condition #22-1′> may also be provided.
<Condition #21-1′>
“a#0,1,1%α=a#1,1,1%α=a#2,1,1%α= . . . =a#k,1,1%α= . . . =a#s-1,1,1%α=vp=1 (vp=1: fixed-value) (therefore k=0, 1, 2, . . . , s−1)”
“a#0,1,2%α=a#1,1,2%α=a#2,1,2%α= . . . =a#k,1,2%α= . . . =a#s-1,1,2%α=yp=1 (yp=1: fixed-value) (therefore k=0, 1, 2, . . . , s−1)”
“a#0,1,3%α=a#1,1,3%α=a#2,1,3%α= . . . =a#k,1,3%α= . . . =a#s-1,1,3%α=zp=1 (zp=1: fixed-value) (therefore k=0, 1, 2, . . . , s−1)”
<Condition #22-1>
“b#0,1%β=b#1,1%β=b#2,1%β= . . . =b#k,1%β= . . . =b#s-1,1%β=d (d: fixed-value) (therefore k=0, 1, 2, . . . , s−1)”
“b#0,2%β=b#1,2%β=b#2,2%β= . . . =b#k,2%β= . . . =b#s-1,2%β=e (e: fixed-value) (therefore k=0, 1, 2, . . . , s−1)”
“b#0,3%β=b#1,3%β=b#2,3%β= . . . =b#k,3%β= . . . =b#s-1,3%β=f (f: fixed-value) (therefore k=0, 1, 2, . . . , s−1)”
The i-th (i=0, 1, 2, . . . , s−2, s−1) parity check polynomial that satisfies 0 of an LDPC-CC based on a parity check polynomial of a time varying period of s and a coding rate of 1/2 has been represented as shown in equation 89-i, but when actually used, the parity check polynomial that satisfies 0 is represented by the following equation.
[92]
(Da#i,1,1+Da#i,1,2+1)X1(D)+(Db#i,1+Db#i,2+1)P(D)=0 (Equation 92-1)
Furthermore, consider generalizing the parity check polynomial. The i-th (i=0, 1, 2, . . . , s−2, s−1) parity check polynomial that satisfies 0 is represented as shown in the equation below.
That is, a case will be considered where the number of terms of X1(D) and P(D) as the parity check polynomial is not limited to three as shown in equation 93-i. Using the above description as a reference, the following condition becomes important in the code configuration method of the present embodiment.
<Condition #23>
When i%α=j%α (i, j=0, 1, . . . , s−2, s−1; i≠j) holds true, the following equation holds true.
[94]
A
X1,i(D)=AX1,j(D) (Equation 94)
<Condition #24>
When i%β=j%β (i, j=0, 1, . . . , s−2, s−1; i≠j) holds true, the following equation holds true:
[95]
B
i(D)=Bi(D) (Equation 95)
Providing the above-described conditions makes it possible to reduce the number of parameters set using random numbers while increasing the time varying period and achieve the effect of facilitating a code search. At this time, to efficiently increase the time varying period, α and β may be “prime to each other” (coprime). The description “a and β being coprime” means that α and β have a relationship of having no common divisor other than 1 (and −1).
At this time, the time varying period can be represented by α×β. However, even when there is no such relationship that α and β are coprime, high error correction capability may be likely to be achieved. Furthermore, based on the description of Embodiment 6, α and β may be odd numbers. However, even when α and β are not odd numbers, high error correction capability may be likely to be achieved.
Next, with regard to an LDPC-CC based on a parity check polynomial of a time varying period of s and a coding rate of (n−1)/n, a code configuration method of an LDPC-CC will be described in which the time varying period of the coefficient of X1(D) is α1, the time varying period of the coefficient of X2(D) is α2, . . . , the time varying period of the coefficient of Xk(D) is αk (k=1, 2, . . . , n−2, n−1), . . . , the time varying period of the coefficient of Xn-1(D) is αn-1, and the time varying period of the coefficient of P(D) is β. At this time, time varying period s=LCM(α1, α2, . . . αn-2, αn-1, β). That is, time varying period s is a least common multiple of α1, α2, . . . αn-2, αn-1, β.
The i-th (i=0, 1, 2, . . . , s−2, s−1) parity check polynomial that satisfies 0 of an LDPC-CC based on a parity check polynomial of a time varying period of s and a coding rate of (n−1)/n is a parity check polynomial that satisfies 0 represented as shown in the equation below.
where X1(D), X2(D), . . . , Xn-1(D) are polynomial representations of information sequences X1, X2, . . . , Xn-1 (n is an integer equal to or greater than 2), P(D) is a polynomial representation of a parity sequence.
That is, a case will be considered where the number of terms of X1(D), X2(D), . . . , Xn-2(D), Xn-1(D) and P(D) is not limited to three. Using the above description as a reference, the following condition becomes important in the code configuration method according to the present embodiment.
<Condition #25>
When i%αk=j%αk (i, j=0, 1, . . . , s−2, s−1; i≠j) holds true, the following equation holds true.
[97]
A
Xk,i(D)=AXk,j(D) (Equation 97)
where, k=1, 2, . . . , n−2, n−1.
<Condition #26>
When i%β=j%β (i, j=0, 1, . . . , s−2, s−1; i≠j) holds true, the following equation holds true.
[98]
B
i(D)=Bi(D) (Equation 98)
That is, the encoding method according to the present embodiment is an encoding method of a low density parity check convolutional code (LDPC-CC) of a time varying period of s, includes a step of supplying an i-th (i=0, 1, . . . , s−2, s−1) parity check polynomial represented by equation 96-i and a step of acquiring an LDPC-CC codeword through a linear computation of the 0-th to (s−1)-th parity check polynomials and input data, and it is assumed that a time varying period of coefficient AXk,i of Xk(D) is αk (αk is an integer greater than 1) (k=1, 2, . . . , n−2, n−1), a time varying period of coefficient BXk,i of P(D) is β (β is an integer greater than 1), time varying period s is a least common multiple of α1, α2, . . . αn-2, αn-1, and β, equation 97 holds true when i%αk=j%αk (i, j=0, 1, . . . , s−2, s−1; i≠j) holds true and equation 98 holds true when i%β=j%β (i, j=0, 1, . . . , s−2, s−1; i≠j) holds true (see
Providing the above-described conditions makes it possible to reduce the number of parameters set using random numbers while increasing the time varying period and achieve the effect of facilitating a code search.
At this time, to efficiently increase the time varying period, if α1, α2, . . . , αn−2, αn−1 and β are “coprime,” the time varying period can be increased. At this time, the time varying period can be represented by α1×α2× . . . × αn−2×αn−1×β.
However, even if there is no such relationship of being coprime, high error correction capability may be likely to be achieved. Based on the description of Embodiment 6, α1, α2, . . . , αn-2, αn-1 and β may be odd numbers. However, even when they are not odd numbers, high error correction capability may be likely to be achieved.
With regard to the LDPC-CC described in Embodiment 12, the present embodiment proposes an LDPC-CC that makes it possible to configure an encoder/decoder with a small circuit scale.
First, a code configuration method of a coding rate of 1/2, 2/3 having the above features will be described.
As described in Embodiment 12, an i-th (i=0, 1, 2, . . . , s−2, s−1) parity check polynomial that satisfies 0 of an LDPC-CC based on a parity check polynomial in which the time varying period of X1(D) is α1, time varying period of P(D) is β, time varying period s is LCM(α1, β) and coding rate is 1/2 is represented as shown in the equation below.
Using Embodiment 12 as a reference, the following condition holds true.
<Condition #26-1>
When i%α1=j%α1 (i, j=0, 1, . . . , s−2, s−1; i≠j) holds true, the following equation holds true.
[100]
A
X1,i(D)=AX1,j(D) (Equation 100)
<Condition #27>
When i%β=j%β (i, j=0, 1, . . . , s−2, s−1; i≠j) holds true, the following equation holds true.
[101]
B
i(D)=Bj(D) (Equation 101)
Here, consider an LDPC-CC of a coding rate of 1/2 and an LDPC-CC of a coding rate of 2/3 which allows circuits to be shared between an encoder and a decoder. An i-th (i=0, 1, 2, . . . , z−2, z−1) parity check polynomial that satisfies 0 based on a parity check polynomial of a coding rate of 2/3 and a time varying period of z is represented as shown in the equation below.
[102]
C
X1,i(D)X1(D)+CX2,i(D)X2(D)+Ei(D)P(D)=0 (Equation 102-1)
At this time, conditions of an LDPC-CC based on a parity check polynomial of a coding rate of 1/2 and an LDPC-CC of a coding rate of 2/3 which allows circuits to be shared between an encoder and a decoder based on equation 99-i are described below.
<Condition #28>
In the parity check polynomial that satisfies 0 of equation 102-i, when the time varying period of X1(D) is α1 and i%α1=j%α1 (i=0, 1, . . . , s−2, s−1, j=0, 1, . . . , z−2, z−1) holds true, the following equation holds true.
[103]
A
X1,i(D)=CX1,j(D) (Equation 103)
<Condition #29>
In the parity check polynomial that satisfies 0 of equation 102-i, when the time varying period of P(D) is β and i%β=j%β (i=0, 1, . . . , s−2, s−1, j=0, 1, . . . , z−2, z−1) holds true, the following equation holds true.
[104]
B
i(D)=Ej(D) (Equation 104)
In the parity check polynomial that satisfies 0 of equation 102-i, since the time varying period of X2(D) may be assumed to be aa, the following condition holds true.
<Condition #30>
[105]
C
X2,i(D)=CX2,j(D) (Equation 105)
At this time, α2 may be α1 or β, as may be a natural number which is coprime to α1 and β. However, α2 has a characteristic of enabling the time varying period to be efficiently increased as long as it is a natural number coprime to α1 and β. Based on the description of Embodiment 6, α1, α2 and β are preferably odd numbers. However, even when α1, α2 and β are not odd numbers, high error correction capability may be likely to be achieved.
Time varying period z is LCM (α1, α2, β), that is, a least common multiple of α1, α2 and β.
An LDPC-CC of a coding rate of 1/2 and an LDPC-CC of a coding rate of 2/3 which allows circuits to be shared between an encoder and a decoder has been described so far. Hereinafter, with further generalization, a code configuration method for an LDPC-CC of a coding rate of (n−1)/n and an LDPC-CC of a coding rate of (m−1)/m (n<m) which allows circuits to be shared between an encoder and a decoder will be described.
An i-th (i=0, 1, 2, . . . , s−2, s−1) parity check polynomial that satisfies 0 of an LDPC-CC based on a parity check polynomial of (n−1)/n in which the time varying period of X1(D) is α1, time varying period of X2(D) is aa, . . . , time varying period of Xn-1(D) is αn-1, time varying period of P(D) is β, time varying period s is LCM (α1, α2, . . . , αn-1, β), that is, a least common multiple of a1, α2, . . . , αn-1, β is represented as shown in the equation below.
Using Embodiment 12 as a reference, the following condition holds true:
<Condition #31>
When i%αk=j%αk (i, j=0, 1, . . . , s−2, s−1; i≠j) holds true, the following equation holds true.
[107]
A
Xk,i(D)=AXk,j(D) (Equation 107)
where, k=1, 2, . . . , n−1.
<Condition #32>
When i%β=j%β (i, j=0, 1, . . . , s−2, s−1; i≠j) holds true, the following equation holds true.
[108]
B
i(D)=Bj(D) (Equation 108)
Here, consider an LDPC-CC of a coding rate of (n−1)/n and an LDPC-CC of a coding rate of (m−1)/m which allows circuits to be shared between an encoder and a decoder. The i-th (i=0, 1, 2, . . . , z−2, z−1) parity check polynomial that satisfies 0 based on a parity check polynomial of a coding rate of (m−1)/m and a time varying period of z is represented as shown in the equation below.
At this time, conditions of the LDPC-CC based on the parity check polynomial of a coding rate of (n−1)/n represented by equation 106-i and the LDPC-CC of a coding rate of (m−1)/m that allows circuits to be shared between an encoder and a decoder are described below.
<Condition #33>
In the parity check polynomial that satisfies 0 of equation 109-i, when the time varying period of Xk(D) is αk (k=1, 2, . . . , n−1) and i%αk=j%αk (i=0, 1, . . . , s−2, s−1; j=0, 1, . . . , z−2, z−1) holds true, the following equation holds true.
[110]
A
Xk,i(D)=CXk,j(D) (Equation 110)
<Condition #34>
In the parity check polynomial that satisfies 0 of equation 109-i, when the time varying period of P(D) is β and i%β=j%β (i=0, 1, . . . , s−2, s−1; j=0, 1, . . . , z−2, z−1) holds true, the following equation holds true.
[111]
B
i(D)=Ej(D) (Equation 111)
In the parity check polynomial that satisfies 0 of equation 109-i, since the time varying period of Xh(D) may be set to αh (h=n, n+1, . . . , m−1), the following condition holds true.
<Condition #35>
When i%αh=j%αh (i, j=0, 1, . . . , z−2, z−1; i≠j) holds true, the following equation holds true.
[112]
C
Xh,i(D)=CXh,j(D) (Equation 112)
At this time, αh may be a natural number. If all α1, α2, . . . , αn-1, αn, . . . , αm-1, and β are natural numbers coprime to each other, there is a characteristic of enabling the time varying period to be efficiently increased. Furthermore, based on the description of Embodiment 6, α1, α2, . . . , αn-1, αn, . . . , αm-1, and β are preferably odd numbers. However, even when these are not odd numbers, high error correction capability may be likely to be achieved.
Time varying period z is LCM (α1, α2, . . . , αn-1, αn, . . . , αm-1, β), that is, a least common multiple of α1, α2, . . . , αn-1, αn, . . . , αm-1, β.
Next, a specific encoder/decoder configuration method for the aforementioned LDPC-CC supporting a plurality of coding rates which can configure an encoder/decoder with a small circuit scale will be described.
First, in the encoder/decoder according to the present invention, the highest coding rate among coding rates intended for the sharing of circuits is assumed to be (q−1)/q. When, for example, coding rates supported by the transmitting/receiving apparatus are assumed to be 1/2, 2/3, 3/4 and 5/6, it is assumed that the codes of coding rates of 1/2, 2/3 and 3/4 allow circuits to be shared between the encoder and decoder and a coding rate of 5/6 is not intended for the sharing of circuits between the encoder and decoder. At this time, the aforementioned highest coding rate of (q−1)/q is 3/4. Hereinafter, an encoder for creating an LDPC-CC of a time varying period of z (z is a natural number) will be described which can support a plurality of coding rates of (r−1)/r (r is an integer equal to or greater than 2 and equal to or smaller than q).
Information generating section 5801 sets information X1,k, information X2,k and information X3,k at point in time k according to a coding rate designated by coding rate setting section 5805. When, for example, coding rate setting section 5805 sets the coding rate to 1/2, information generating section 5801 sets input information data Sj in information X1,k at point in time k and sets 0 in information X2,k at point in time k and information X3,k at point in time k.
Furthermore, when the coding rate is 2/3, information generating section 5801 sets input information data Sj in information X1,k at point in time k, sets input information data Sj+1 in information X2,k at point in time k and sets 0 in information X3,k at point in time k.
Furthermore, when the coding rate is 3/4, information generating section 5801 sets input information data Sj in information X1,k at point in time k, sets input information data Sj+1 in information X2,k at point in time k and sets input information data Sj+2 in information X3,k at point in time k.
Thus, information generating section 5801 sets input information data in information X1,k, information X2,k and information X3,k at point in time k according to the coding rate set by coding rate setting section 5805, outputs set information X1,k to first information computing section 5802-1, outputs set information X2,k to second information computing section 5802-2 and outputs set information X3,k to third information computing section 5802-3.
First information computing section 5802-1 computes X1(D) according to AX1,i(D) of equation 106-i (also corresponds to equation 109-i because equation 110 holds true). Similarly, second information computing section 5802-2 computes X2(D) according to AX2,i(D) of equation 106-2 (also corresponds to equation 109-i because equation 110 holds true). Similarly, third information computing section 580-3 computes X3(D) according to CX3,i(D) of equation 109-i.
At this time, as described above, since equation 109-i satisfies <condition #33> and <condition #34>, even when the coding rate is changed, it is necessary to change neither the configuration of first information computing section 5802-1 nor the configuration of second information computing section 5802-2.
Therefore, when a plurality of coding rates are supported, by using the configuration of the encoder of the highest coding rate as a reference among coding rates for sharing encoder circuits, the other coding rates can be supported by the above operations. That is, the aforementioned LDPC-CC has an advantage of being able to share first information computing section 5802-1 and second information computing section 5802-2 which are main parts of the encoder regardless of the coding rate.
Shift registers 5901-1 to 5901-M are registers that store X1,i-t (t=0, . . . , M−1), respectively, send a stored value when the next input is entered to a shift register on the right side and store a value outputted from a shift register on the left side.
Weight multipliers 5902-0 to 5902-M switch the value of h1(t) to 0 or 1 according to a control signal outputted from weight control section 5904.
Adder 5903 performs an exclusive OR operation on the outputs of weight multipliers 5902-0 to 5902-M, computes computation result Y1,k and outputs computed Y1,k to adder 5804 in
Also, the configurations inside second information computing section 5802-2 and third information computing section 5802-3 are the same as first information computing section 5802-1, and therefore their explanation will be omitted. Second information computing section 5802-2 computes computation result Y2,k as in the case of first information computing section 5802-1 and outputs computed Y2,k to adder 5804 in
Parity computing section 5803 in
Shift registers 6001-1 to 6001-M are registers that store Pi-t (t=0, . . . , M−1), respectively, send a stored value when the next input is entered to a shift register on the right side and store a value outputted from a shift register on the left side.
Weight multipliers 6002-0 to 6002-M switch the value of h2(t) to 0 or 1 according to a control signal outputted from weight control section 6004.
Adder 6003 performs an exclusive OR operation on the outputs of weight multipliers 6002-0 to 6002-M, computes computation result Zk and outputs computed Zk to adder 5804 in
Returning to
Coding rate setting section 5805 sets the coding rate of encoder 5800 and outputs coding rate information to information generating section 5801.
Weight control section 5806 outputs the value of h1(m) at time k based on a parity check polynomial that satisfies 0 of equation 106-i and equation 109-i stored in weight control section 5806 to first information computing section 5802-1, second information computing section 5802-2, third information computing section 5802-3 and parity computing section 5803. Furthermore, weight control section 5806 outputs the value of h2(m) at the timing to 6002-0 to 6002-M based on a parity check polynomial that satisfies 0 corresponding to equation 106-i and equation 109-i stored in weight control section 5806.
Also,
Encoder 5800 in
When the coding rate is 1/2, second information computing section 5802-2 does not perform computation processing and outputs 0 to adder 5804 as computation result Y2,k. On the other hand, when the coding rate is 1/2 or 2/3, third information computing section 5802-3 does not perform computation processing and outputs 0 to adder 5804 as computation result Y3,k.
In encoder 5800 in
Thus, in encoder 5800 of
As shown in the specific example above, with regard to the codes of the LDPC-CC of a coding rate of (n−1)/n described using equation 106-i and equation 109-i and the LDPC-CC of a coding rate of (m−1)/m (n<m) which allows the circuits to be shared between the encoder and decoder, it is possible to share the encoder circuits by providing an encoder of an LDPC-CC of a large coding rate of (m−1)/m, setting the computation output relating to Xk(D) (where k=n, n+1, . . . , m−1) to 0 when the coding rate is (n−1)/n and calculating parity when the coding rate is (n−1)/n.
Next, the method of sharing decoder circuits of the LDPC-CC described in the present embodiment will be described in further detail.
Log likelihood ratio setting section 6101 receives as input a reception log likelihood ratio and coding rate calculated in a log likelihood ratio computing section (not shown), and inserts a known log likelihood ratio in the reception log likelihood ratio according to the coding rate.
When, for example, the coding rate is 1/2, this corresponds to encoder 5800 transmitting “0”s as X2,k and X3,k, and therefore log likelihood ratio setting section 6101 inserts a fixed log likelihood ratio corresponding to known bits “0”s as log likelihood ratios of X2,k and X3,k and outputs the log likelihood ratios inserted to matrix processing computing section 6102. This will be explained below using
As shown in
Furthermore, when the coding rate is 2/3, this corresponds to encoder 5800 transmitting “0” as X3,k, and therefore log likelihood ratio setting section 6101 inserts a fixed log likelihood ratio corresponding to known bit “0” as a log likelihood ratio of X3,k and outputs the inserted log likelihood ratio to matrix processing computing section 6102. This will be explained using
As shown in
Matrix processing computing section 6102 in
Storage section 6103 stores an log likelihood ratio, external value αmn obtained by row processing and a priori value βmn obtained by column processing.
Row processing computing section 6104 holds the row-direction weight pattern of LDPC-CC check matrix H of the maximum coding rate of 3/4 among coding rates supported by encoder 5800. Row processing computing section 6104 reads a necessary priori value βmn from storage section 6103, according to that row-direction weight pattern, and performs row processing computation.
In row processing computation, row processing computation section 6104 decodes a single parity check code using a priori value βmn, and finds external value αmn.
Processing of the m-th row will be explained.
Here, binary M×N matrix H={Hmn} is assumed to be a check matrix of an LDPC code to be decoded. Extrinsic value αmn is updated using the following update equation for all sets (m, n) that satisfy Hmn=1.
where Φ(x) is called a Gallager f function, and is defined by the following equation.
Column processing computing section 6105 holds the column-direction weight pattern of LDPC-CC check matrix H of the maximum coding rate of 3/4 among coding rates supported by encoder 5800. Column processing computing section 6105 reads a necessary external value αmn from storage section 321, according to that column-direction weight pattern, and finds a priori value βmn.
In column processing computation, column processing computing section 6105 performs iterative decoding using input log likelihood ratio λn and external value αmn, and finds a priori value βmn.
Processing of the m-th column will be explained.
βmn is updated using the following update equation for all sets (m, n) that satisfy Hmn=1. However, initial computation is performed assuming αmn=0.
Decoder 6100 obtains a posteriori log likelihood ratio by repeating the aforementioned row processing and column processing a predetermined number of times.
As described above, the present embodiment assumes the highest coding rate among coding rates that can be supported to be (m−1)/m, and when coding rate setting section 5805 sets the coding rate to (n−1)/n, information generating section 5801 sets information from information Xn,k to information Xm-1,k to 0.
When, for example, the supported coding rates are 1/2, 2/3 and 3/4 (m=4), first information computing section 5802-1 receives information X1,k at point in time k as input and computes the X1(D) term. Furthermore, second information computing section 5802-2 receives information X2,k at point in time k as input and computes the X2(D) term. Furthermore, third information computing section 5802-3 receives information X3,k at point in time k as input and computes the X3(D) term.
Furthermore, parity computing section 5803 receives parity Pk−1 at point in time k−1 as input and computes the P(D) term. Furthermore, adder 5804 obtains an exclusive OR of the computation results of first information computing section 5802-1, second information computing section 5802-2 and third information computing section 5802-3 and the computation result of parity computing section 5803 as parity Pk at time k.
With this configuration, upon creating an LDPC-CC supporting different coding rates, it is possible to share the configurations of information computing sections according to the above explanation, so that it is possible to provide an LDPC-CC encoder and decoder that can support a plurality of coding rates in a small computational complexity.
By adding log likelihood ratio setting section 6101 to the configuration of the decoder corresponding to the maximum coding rate from among coding rates supporting the sharing of the encoder/decoder circuits, it is possible to perform decoding supporting a plurality of coding rates. Log likelihood ratio setting section 6101 sets log likelihood ratios corresponding to information from information Xn,k to information Xm-1,k at point in time k to predetermined values according to the coding rate.
Although a case has been described above where a maximum coding rate supported by encoder 5800 is 3/4, the maximum coding rate supported is not limited to this, but a coding rate of (m−1)/m (m is an integer equal to or greater than 5) may also be supported (naturally a maximum coding rate may also be 2/3). In this case, encoder 5800 may be configured to include first to (m−1)-th information computing sections and adder 5804 may be configured to obtain an exclusive OR of the computation results of the first to (m−1)-th information computing sections and the computation result of parity computing section 5803 as parity Pk at time k.
Furthermore, when all the coding rates supported by the transmitting/receiving apparatus (encoder/decoder) are codes based on the aforementioned method, providing the encoder/decoder of the highest coding rate among the supported coding rates can support coding and decoding at a plurality of coding rates, and the effect of reducing the scale of computation at this time is considerably large.
Furthermore, although sum-product decoding has been described above as an example of decoding scheme, the decoding method is not limited to this, but the present invention can be likewise implemented by using a decoding method (BP decoding) using a message-passing algorithm such as min-sum decoding, normalized BP (Belief Propagation) decoding, shuffled BP decoding, offset BP decoding described in Non-Patent Literature 4 to Non-Patent Literature 6.
Next, a case will be explained where the present invention is applied to a communication apparatus that adaptively switches the coding rate according to the communication condition. Also, an example case will be explained where the present invention is applied to a radio communication apparatus, the present invention is not limited to this, but is equally applicable to a PLC (Power Line Communication) apparatus, a visible light communication apparatus or an optical communication apparatus.
Further, coding rate determining section 6203 outputs the determined coding rate and modulation scheme to encoder 6201 and modulating section 6202 as a control signal. However, the coding rate need not always be determined based on the feedback information from the communicating party.
Using, for example, the transmission format shown in
In this way, coding rate determining section 6203 receives a modulation signal transmitted from communication apparatus 6300 (see
Receiving section 6301 acquires a baseband signal by applying processing such as frequency conversion and quadrature demodulation to a received signal for a modulation signal transmitted from communication apparatus 6200, and outputs the baseband signal to log likelihood ratio generating section 6302. Also, using known signals included in the baseband signal, receiving section 6301 estimates channel variation in a channel (e.g., radio channel) between communication apparatus 6200 and communication apparatus 6300, and outputs an estimated channel estimation signal to log likelihood ratio generating section 6302.
Also, using known signals included in the baseband signal, receiving section 6301 estimates channel variation in a channel (e.g., radio channel) between communication apparatus 6200 and communication apparatus 6300, and generates and outputs feedback information (such as channel variation itself, which refers to channel state information, for example) for deciding the channel condition. This feedback information is transmitted to the communicating party (i.e., communication apparatus 6200) via a transmitting apparatus (not shown), as part of control information. Log likelihood ratio generating section 6302 calculates the log likelihood ratio of each transmission sequence using the baseband signal, and outputs the resulting log likelihood ratios to decoder 6303.
As described above, according to the coding rate of (s−1)/s designated by a control signal, decoder 6303 sets the log likelihood ratios for information from information Xs,k to information Xm-1,k at point in time k, to predetermined values, and performs BP decoding using the LDPC-CC check matrix based on the maximum coding rate among coding rates to share decoder 6303 circuits.
In this way, the coding rates of communication apparatus 6200 and communication apparatus 6300 of the communicating party to which the present invention is applied, are adaptively changed according to the communication condition.
Here, the method of changing the coding rate is not limited to the above, and communication apparatus 6300 of the communicating party can include coding rate determining section 6203 and designate a desired coding rate. Also, communication apparatus 6300 can estimate channel variation from a modulation signal transmitted from communication apparatus 6200 and determine the coding rate. In this case, the above feedback information is not necessary.
One aspect of the encoding method of the present invention is an encoding method that performs low density parity check convolutional coding (LDPC-CC: Low-Density Parity-Check Convolutional Code) of a time varying period of q using a parity check polynomial of a coding rate of (n−1)/n (where n is an integer equal to or greater than 2), the time varying period of q being a prime number greater than 3, the method receiving an information sequence as input and encoding the information sequence using equation 116 as the g-th (g=0, 1, . . . , q−1) parity check polynomial that satisfies 0.
[116]
(Da#g,1,1+Da#g,1,2+Da#g,1,3)X1(D)+(Da#g,2,1+Da#g,2,2+Da#g,2,3)X2(D)+ . . . +(Da#g,n-1,1+Da#g,n-1,2+Da#g,n-1,3)Xn-1(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 116)
In equation 116, “%” means “modulo” and coefficient satisfies the following with respect to k=1, 2, . . . , n−1:
“a#0,k,1%q=a#1,k,1%q=a#2,k,1%q=a#3,k,1%q= . . . =a#g,k,1%q= . . . =a#q-2,k,1%q=a#q-1,k,1%q=vp=k (vp=k: fixed-value)”
“b#0,1%q=b#1,1%q=b#2,1%q=b#3,1%q= . . . =b#g,1%q= . . . =b#q-2,1%q=b#q-1,1%q=w (w: fixed-value)”
“a#0,k,2%q=a#1,k,2%q=a#2,k,2%q=a#3,k,2%q= . . . =a#g,k,2%q= . . . =a#q-2,k,2%q=a#q-1,k,2%q=yp=k (yp=k: fixed-value)”
“b#0,2%q=b#1,2%q=b#2,2%q=b#3,2%q= . . . =b#g,2%q= . . . =b#q-2,2%q=b#q-1,2%q=z (z: fixed-value)”
“a#0,k,3%q=a#1,k,3%q=a#2,k,3%q=a#3,k,3%q= . . . =a#g,k,3%q= . . . =a#q-2,k,3%q=a#q-1,k,3%q=sp=k (sp=k: fixed-value)”
In equation 116, a#g,k,1, a#g,k,2, a#g,k,3 are natural numbers equal to or greater than 1, and a#g,k,1≠a#g,k,2, a#g,k,2≠a#g,k,3 hold. Also, b#g,1, b#g,2 are natural numbers equal to or greater than 1, and b#g,1≠b#g,2 hold.
Also, in equation 116, vp=k, yp=k are natural numbers equal to or greater than 1.
One aspect of the encoding method of the present invention is an encoding method of performing low density parity check convolutional coding (LDPC-CC: Low-Density Parity-Check Convolutional Code) of a time varying period of q using a parity check polynomial of a coding rate of (n−1)/n (where n is an integer equal to or greater than 2), the time varying period of q being a prime number greater than 3, the method receiving an information sequence as input and encoding the information sequence using a parity check polynomial that satisfies:
“a#0,k,1%q=a#1,k,1%q=a#2,k,1%q=a#3,k,1%q= . . . =a#g,k,1%q= . . . =a#q-2,k,1%q=a#q-1,k,1%q=vp=k (vp=k: fixed-value),”
“b#0,1%q=b#1,1%q=b#2,1%q=b#3,1%q= . . . =b#g,1%q= . . . =b#q-2,1%q=b#q-1,1%q=w (w: fixed-value),”
“a#0,k,2%q=a#1,k,2%q=a#2,k,2%q=a#3,k,2%q= . . . =a#g,k,2%q= . . . =a#q-2,k,2%q=a#q-1,k,2%q=yp=k (yp=k: fixed-value),”
“b#0,2%q=b#1,2%q=b#2,2%q=b#3,2%q= . . . =b#g,2%q= . . . =b#q-2,2%q=b#q-1,2%q=z (z: fixed-value),” and
“a#0,k,3%q=a#1,k,3%q=a#2,k,3%q=a#3,k,3%q= . . . =a#g,k,3%q= . . . =a#q-2,k,3%q=a#q-1,k,3%q=sp=k (sp=k: fixed-value)”
of a g-th (g=0, 1, . . . , q−1) parity check polynomial that satisfies 0 represented by equation 117 for k=1, 2, . . . , n−1.
[117]
(Da#g,1,1+Da#g,1,2+Da#g,1,3)X1(D)+(Da#g,2,1+Da#g,2,2+Da#g,2,3)X2(D)+ . . . +(Da#g,n-1,1+Da#g,n-1,2+Da#g,n-1,3)Xn-1(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 117)
One aspect of the encoder of the present invention is an encoder that performs low density parity check convolutional coding (LDPC-CC: Low-Density Parity-Check Convolutional Code) of a time varying period of q using a parity check polynomial of a coding rate of (n−1)/n (where n is an integer equal to or greater than 2), the time varying period of q being a prime number greater than 3, including a generating section that receives information bit Xr[i] (r=1, 2, . . . , n−1) at point in time i as input, designates an equation equivalent to the g-th (g=0, 1, . . . , q−1) parity check polynomial that satisfies 0 represented by equation 116 as equation 118 and generates parity bit P[i] at point in time i using an equation with k substituting for g in equation 118 when i%q=k and an output section that outputs parity bit P[i].
[118]
P[i]=X1[i]⊕X1[i−a#g,1,1]⊕X1[i−a#g,1,2]⊕X2[i]⊕X2[i−a#g,2,1]⊕X2[i−a#g,2,2]⊕ . . . ⊕Xn-1[i]⊕Xn-1[i−a#g,n-1,1]⊕Xn-1[i−a#g,n-1,2]⊕P[i−b#g,1]⊕P[i−b#g,2] (Equation 118)
One aspect of the decoding method of the present invention is a decoding method corresponding to the above-described encoding method for performing low density parity check convolutional coding (LDPC-CC: Low-Density Parity-Check Convolutional Code) of a time varying period of q (prime number greater than 3) using a parity check polynomial of a coding rate of (n−1)/n (where n is an integer equal to or greater than 2), for decoding an encoded information sequence encoded using equation 116 as the g-th (g=0, 1, . . . , q−1) parity check polynomial that satisfies 0, the method receiving the encoded information sequence as input and decoding the encoded information sequence using belief propagation (BP) based on a parity check matrix generated using equation 116 which is the g-th parity check polynomial that satisfies 0.
One aspect of the decoder of the present invention is a decoder corresponding to the above-described encoding method for performing low density parity check convolutional coding (LDPC-CC: Low-Density Parity-Check Convolutional Code) of a time varying period of q (prime number greater than 3) using a parity check polynomial of a coding rate of (n−1)/n (where n is an integer equal to or greater than 2), that performs decoding an encoded information sequence encoded using equation 116 as the g-th (g=0, 1, . . . , q−1) parity check polynomial that satisfies 0, including a decoding section that receives the encoded information sequence as input and decodes the encoded information sequence using belief propagation (BP) based on a parity check matrix generated using equation 116 which is the g-th parity check polynomial that satisfies 0.
One aspect of the encoding method of the present invention is an encoding method for a low density parity check convolutional code (LDPC-CC: Low-Density Parity-Check Convolutional Code) of a time varying period of s, including a step of supplying an i-th (i=0, 1, . . . , s−2, s−1) parity check polynomial represented by equation 98-i and a step of acquiring an LDPC-CC codeword through linear computation between the 0-th to (s−1)-th parity check polynomials and input data, wherein a time varying period of coefficient AXk,1 of Xk(D) is αk (αk is an integer greater than 1) (k=1, 2, . . . , n−2, n−1), a time varying period of coefficient BXk,1 of P(D) is β (β is an integer greater than 1), time varying period s is a least common multiple of α1, α2, . . . , αn-2, αn-1, and β, equation 97 holds true when i%αk=j%αk (i, j=0, 1, . . . , s−2, s−1; i≠j) holds true and equation 98 holds true when i%β=j%β (i, j=0, 1, . . . , s−2, s−1; i≠j) holds true.
One aspect of the encoding method of the present invention is the above-described encoding method, wherein time varying periods α1, α2, . . . , αn-1, and β are coprime to each other.
One aspect of the encoder of the present invention is an encoder for a low density parity check convolutional code (LDPC-CC: Low-Density Parity-Check Convolutional Code), including a parity computing section that computes a parity sequence using the above-described encoding method.
One aspect of the decoding method of the present invention is a decoding method for decoding an encoded information sequence encoded using equation 98-i as the i-th (i=0, 1, . . . , s−1) parity check polynomial that satisfies 0 in the above-described encoding method for performing low density parity check convolutional coding (LDPC-CC: Low-Density Parity-Check Convolutional Code) of a time varying period of s, the method receiving the encoded information sequence as input and decoding the encoded information sequence using belief propagation (BP) based on a parity check matrix generated using equation 98-i which is the i-th parity check polynomial that satisfies 0.
One aspect of the decoder of the present invention is a decoder that decodes a low density parity check convolutional code (LDPC-CC: Low-Density Parity-Check Convolutional Code) using belief propagation (BP), including a row processing computing section that performs row processing computation using a check matrix corresponding to the parity check polynomial used in the above-described encoder, a column processing computing section that performs column processing computation using the check matrix and a determining section that estimates a codeword using the computation results in the row processing computing section and the column processing computing section.
One aspect of the encoding method of the present invention is an encoding method for generating a low density parity check convolutional code of a coding rate of 1/3 and a time varying period of h from a low density parity check convolutional code (LDPC-CC: Low-Density Parity-Check Convolutional Code) defined based on a g-th (g=0, 1, . . . , h−1) parity check polynomial of a coding rate of 1/2 and a time varying period of h represented by equation 119, the method including a step of selecting Z-bit information Xj from a bit sequence of the information in a data sequence formed with information and parity bits which are encoded outputs using the low density parity check convolutional code of the coding rate of 1/2 and the time varying period of h (point in time j is a point in time included in point in time j1 to point in time j2, both j1 and j2 are even numbers or odd numbers and Z=(j2−j1)/2), a step of inserting known information in selected Z-bit information Xj and a step of obtaining the parity bit from the information including the known information, wherein in the selecting step, Z-bit information Xj is selected based on each of the number of h types of remainders obtained by dividing all j's included in j1 to j2 by h.
[119]
(Da#g,1,1+Da#g,1,2+1)X(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 119)
In equation 119, X(D) is a polynomial representation of information X and P(D) is a polynomial representation of parity. Also, a#g,1,1 and a#g,1,2 are natural numbers equal to or greater than 1, a#g,1,1≠a#g,1,2 hoods. Also, b#g,1 and b#g,2 are natural numbers equal to or greater than 1, b#g,1≠b#g,2 holds (g=0, 1, 2, . . . , h−2, h−1).
In equation 119, following <Condition #17> is fulfilled. Here, “c%d”i is a remainder after dividing c by d.
<Condition #17>
“a#0,1,1%h=a#1,1,1%h=a#2,1,1%h=a#3,1,1%h= . . . =a#g,1,1%h= . . . =a#h-2,1,1%h=a#h-1,1,1%h=vp=1 (vp=1: fixed-value)”
“b#0,1%h=b#1,1%h=b#2,1%h=b#3,1%h= . . . =b#g,1%h= . . . =b#h-2,1%h=b#h-1,1%h=w (w: fixed-value)”
“a#0,1,2%h=a#1,1,2%h=a#2,1,2%h=a#3,1,2%h= . . . =a#g,1,2%h= . . . =a#h-2,1,2%h=a#h-1,1,2%h=yp=1 (yp=1: fixed-value)”
“b#0,2%h=b#1,2%h=b#2,2%h=b#3,2%h= . . . =b#g,2%h= . . . =b#h-2,2%h=b#h-1,2%h=z (z: fixed-value)”
In one aspect of the encoding method of the present invention, point in time j1 is point in time 2hi, point in time j2 is point in time 2h(i+k−1)+2h−1, the Z bits are hk bits, and in the selecting step, Z-bit information Xi is selected from 2×h×k bits of information X2hi, X2hi+1, X2hi+2, . . . , X2hi+2h-1, . . . , X2h(i+k−1), X2h(i+k−1)+1, X2h(i+k−1)+2, . . . , X2h(i+k−1)+2h-1 such that among remainders after dividing all points in time j included in point in time j1 to point in time j2 by h, at least one γ is present that satisfies a condition under which the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (vp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less and the difference between “the number of remainders that become (vp=1+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=1+γ) mod h (where the number of remainders is non-zero)” is 1 or less.
In one aspect of the encoding method of the present invention, with γ that does not satisfy the condition, “the number of remainders that become (0+γ) mod h,” “the number of remainders that become (vp=1+γ) mod h” and “the number of remainders that become (yp=1+γ) mod h” are 0.
One aspect of the decoding method of the present invention is a decoding method for decoding an encoded information sequence encoded using equation 119 as the g-th (i=0, 1, . . . , h−1) parity check polynomial that satisfies 0 in the encoding method according to claim 1 for performing low density parity check convolutional coding (LDPC-CC: Low-Density Parity-Check Convolutional Code) of a time varying period of h, the method receiving the encoded information sequence as input and decoding the encoded information sequence using belief propagation (BP) based on a parity check matrix generated using equation 119 which is the g-th parity check polynomial that satisfies 0.
One aspect of the encoder of the present invention is an encoder that creates a low density parity check convolutional code (LDPC-CC: Low-Density Parity-Check Convolutional Code) from a convolutional code and includes a computing section that computes parity using the above-described encoding method.
One aspect of the decoder of the present invention is a decoder that decodes a low density parity check convolutional code (LDPC-CC: Low-Density Parity-Check Convolutional Code) using belief propagation (BP), including a row processing computing section that performs row processing computation using a check matrix corresponding to the parity check polynomial used in the above-described encoder, a column processing computing section that performs column processing computation using the check matrix, and a determining section that estimates a codeword using the computation results in the row processing computing section and the column processing computing section.
One aspect of the encoding method of the present invention is an encoding method for generating a low density parity check convolutional code of a lower coding rate than a coding rate of (n−1)/n and a time varying period of h from a low density parity check convolutional code (LDPC-CC: Low-Density Parity-Check Convolutional Code) defined based on a g-th (g=0, 1, . . . , h−1) parity check polynomial of a coding rate of (n−1)/n and a time varying period of h represented by equation 120-g, the method including a step of selecting Z-bit information Xf,j (f=1, 2, 3, . . . , n−1, j is a time) from a bit sequence of the information in a data sequence formed with information and parity bits which are encoded outputs using the low density parity check convolutional code of the coding rate of (n−1)/n and the time varying period of h, a step of inserting known information in selected information Xf,j and a step of obtaining the parity bit from the information including the known information, wherein in the selecting step, information Xf,j is selected based on a remainder after dividing all times j by h and the number of times j at which the remainder is calculated.
[120]
(Da#g,1,1+Da#g,1,2+1)X1(D)+(Da#g,2,1+Da#g,2,2+1)X2(D)+ . . . +(Da#g,n-1,1+Da#g,n-1,2+1)Xn-1(D)+(Db#g,1+Db#g,2+1)P(D)=0 (Equation 120-g)
In equation 120-g, Xp(D) is a polynomial representation of information X and P(D) is a polynomial representation of parity (p=1, 2, . . . , n−1). Also, a#g,p,1 and a#g,p,2 are natural numbers equal to or greater than 1, and a#g,p,1≠a#g,p,2 holds. Also, b#g,1 and b#g,2 are natural numbers equal to or greater than 1, and b#g,1≠b#g,2 holds (g=0, 1, 2, . . . , h−2, h−1; p=1, 2, . . . , n−1).
Also, in equation 120-g, following <condition #18-1> and <condition #18-2> are met. Here, “c%d” represents “remainder after dividing c by d.”
<Condition #18-1>
“a#0,k,1%h=a#1,k,1%h=a#2,k,1%h=a#3,k,1%h= . . . =a#g,k,1%h= . . . =a#h-2,k,1%h=a#h-1,k,1%h=vp=k (vp=k: fixed-value) (k=1, 2, . . . , n−1)” and
“b#0,1%h=b#1,1%h=b#2,1%h=b#3,1%h= . . . =b#g,1%h= . . . =b#h-2,1%h=b#h-1,1%h=w (w: fixed-value)”
<Condition #18-2>
“a#0,k,2%h=a#1,k,2%h=a#2,k,2%h=a#3,k,2%h= . . . =a#g,k,2%h= . . . =a#h-2,k,2%h=a#h-1,k,2%h=yp=k (yp=k: fixed-value) (k=1, 2, . . . , n−1)” and
“b#0,2%h=b#1,2%h=b#2,2%h=b#3,2%h= . . . =b#g,2%h= . . . =b#h-2,2%h=b#h-1,2%h=z (z: fixed-value)”
One aspect of the encoding method of the present invention is the above-described encoding method, wherein time j is a time that takes the value of one of hi to h(i+k−1)+h−1, and in the selecting step, Z-bit information Xf,j is selected from h×(n−1)×k bits of information X1,hi, X2,hi, . . . , , X1,h(i+k−1)+h-1, X2,h(i+k−1)+h-1, . . . , Xn-1,h(i+k−1)+h-1 and such information Xf,j is selected so that among remainders after dividing Z-bit information Xf,j by h for all times j, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (vp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less and the difference between “the number of remainders that become (vp=f+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less (f=1, 2, 3, . . . , n−1) and at least one such y is present.
In one aspect of the encoding method of the present invention is the above-described encoding method, wherein time j takes the value of one of 0 to v, and in the selecting step, Z-bit information Xf,j is selected from a bit sequence of information X1,0, X2,0, . . . , Xn-1,0, . . . , X1,v, X2,v, . . . , Xn-1,v, and such information Xf,j is selected so that among remainders after dividing Z-bit information Xf,j by h for all times j, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (vp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less, the difference between “the number of remainders that become (0+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less and the difference between “the number of remainders that become (vp=f+γ) mod h (where the number of remainders is non-zero)” and “the number of remainders that become (yp=f+γ) mod h (where the number of remainders is non-zero)” is 1 or less (f=1, 2, 3, . . . , n−1) and at least one such y is present.
One aspect of the decoding method of the present invention is a decoding method for decoding an encoded information sequence encoded using equation 120-g as the g-th (i=0, 1, . . . , h−1) parity check polynomial that satisfies 0 in the above-described encoding method for performing low density parity check convolutional coding (LDPC-CC: Low-Density Parity-Check Convolutional Code) of a time varying period of h, the method receiving the encoded information sequence as input and decoding the encoded information sequence using belief propagation (BP) based on a parity check matrix generated using equation 120-g which is the g-th parity check polynomial that satisfies 0.
One aspect of the encoder of the present invention is an encoder that creates a low density parity check convolutional code (LDPC-CC: Low-Density Parity-Check Convolutional Code) from a convolutional code, including a computing section that computes parity using the above-described encoding method.
One aspect of the decoder of the present invention is a decoder that decodes a low density parity check convolutional code (LDPC-CC: Low-Density Parity-Check Convolutional Code) using belief propagation (BP), including a row processing computing section that performs row processing computation using a check matrix corresponding to the parity check polynomial used in the above-described encoder, a column processing computing section that performs column processing computation using the check matrix and a determining section that estimates a codeword using the computation results in the row processing computing section and the column processing computing section.
The present invention is not limited to the above-described embodiments, and can be implemented with various changes. For example, although the above-described embodiments have mainly described a case where the present invention is applied to a case where an encoder is realized, the present invention is not limited to this, but is also applicable to a case where a communication apparatus is realized. (The present invention can also be configured by an LSI (Large Scale Integration).
It is also possible to implement the encoding method and decoding method as software. For example, provision may be made for a program that executes the above-described encoding method and communication method to be stored in ROM (Read Only Memory) beforehand, and for this program to be run by a CPU (Central Processing Unit).
Furthermore, a program that executes the above-described encoding method may be stored in a computer-readable storage medium, the program stored in the storage medium may be recorded in RAM (Random Access Memory) of the computer and the computer may be operated according to the program.
It goes without saying that the present invention is not limited to radio communication, and is also useful in power line communication (PLC), visible light communication, and optical communication.
The present specification describes “time varying period” and this is a period during which a time-varying LDPC-CC is formed.
The disclosures of Japanese Patent Application No. 2009-260503, filed on Nov. 13, 2009, Japanese Patent Application No. 2010-157991, filed on Jul. 12, 2010, Japanese Patent Application No. 2010-172577, filed on Jul. 30, 2010, and Japanese Patent Application No. 2010-231807, filed on Oct. 14, 2010, including the specifications, drawings and abstracts, are incorporated herein by reference in their entirety.
The encoding method and encoder or the like according to the present invention have high error correction capability, and can thereby secure high data receiving quality.
The various embodiments described above can be combined to provide further embodiments. All of the U.S. patents, U.S. patent application publications, U.S. patent applications, foreign patents, foreign patent applications and non-patent publications referred to in this specification and/or listed in the Application Data Sheet are incorporated herein by reference, in their entirety. Aspects of the embodiments can be modified, if necessary to employ concepts of the various patents, applications and publications to provide yet further embodiments.
These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.
Number | Date | Country | Kind |
---|---|---|---|
2009-260503 | Nov 2009 | JP | national |
2010-157991 | Jul 2010 | JP | national |
2010-172577 | Jul 2010 | JP | national |
2010-231807 | Oct 2010 | JP | national |
Number | Date | Country | |
---|---|---|---|
Parent | 16862239 | Apr 2020 | US |
Child | 17878660 | US | |
Parent | 16403758 | May 2019 | US |
Child | 16862239 | US | |
Parent | 16048949 | Jul 2018 | US |
Child | 16403758 | US | |
Parent | 15132971 | Apr 2016 | US |
Child | 16048949 | US | |
Parent | 14597810 | Jan 2015 | US |
Child | 15132971 | US | |
Parent | 14229551 | Mar 2014 | US |
Child | 14597810 | US | |
Parent | 14055617 | Oct 2013 | US |
Child | 14229551 | US | |
Parent | 13145018 | Jul 2011 | US |
Child | 14055617 | US |