This application claims the benefit of Taiwan application Serial No. 104123335, filed Jul. 17, 2015, the subject matter of which is incorporated herein by reference.
Field of the Invention
The invention relates in general to a communication system, and more particularly to a soft output decoder used in a receiver of convolutional communication.
Description of the Related Art
In the process of data transmission of a digital communication system, incorrect messages may be received at a receiver end frequently due to unpredictable interference. Without increasing the transmission power, channel coding, although effectively reduces the error rate, poses a setback of occupying the transmission bandwidth. In view of the increasing demand of data transmission and storage systems of the public, not only the transmission rate will get faster but also the quality of service (QoS) will get higher in the future. As channel coding ensures that an error of the transmission bit is controlled within a certain range, channel coding is a critical consideration in the system design.
Convolutional coding is often used in channel coding to prevent a receiver from receiving incorrect messages. At a transmitting end, a code vector or an information block transmitted may be described by a trellis diagram. The complexity of a trellis diagram is determined by a constraint length of an encoder. Although the operation complexity gets higher as the length of the constraint length gets longer, such coding relatively provides better robustness.
At a receiving end, a soft-decision decoder may be adopted to identify a maximum likelihood code vector through a Viterbi algorithm and trellis architecture to perform decoding. However, the operation complexity of the Viterbi algorithm exponentially increases as the constraint length gets longer. In other words, a Viterbi decoder may require a substantial amount of memory and consume significant power to decode the convolutional coding having a longer constraint length.
Turbo coding is proven to render better performance than common coding technologies. A turbo code is formed from processing two or more convolutional codes by a turbo interleaver. To decode turbo codes, convolutional codes are individually decoded by a soft-decision decoder using an iteration approach. A soft-decision decoder decodes a convolutional code to provide extrinsic information, which allows the soft-decision decoder to provide a more accurate result when the soft-decision decoder decodes another convolutional code. In the prior art, soft-decision decoding may adopt a maximum a-posterioriprobability (MAP) algorithm or a soft output Viterbi algorithm (SOVA), both of which requiring forward recursion and backward recursion for decoding to determine the soft output of one information block. In general, in an environment with a lower signal-to-noise ratio (SNR), turbo codes render better performance than other convolutional codes.
The computation amount of the MAP algorithm not only is huge and complicated, but also involves index calculation. Without special processing, decoding hardware requirement or time delay generated during the decoding process is often significantly increased.
According to an embodiment of the present invention, a decoding method applied to a convolutionally coded signal is provided. The method includes: adjusting first input information according to a first scaling factor to generate first a-priori information; b) decoding the convolutionally coded signal according to systematic information and the first a-priori information to generate first extrinsic information; c) adjusting second input information according to a second scaling factor to generate second a-priori information, wherein the second scaling factor is generated according to the first extrinsic information and the first a-priori information; and d) decoding the convolutionally coded signal according to the systematic information and the second a-priori information to generate second extrinsic information. One of step (b) and step (d) further generates a-posteriori information as a decoding result.
According to another embodiment of the present invention, a decoding apparatus applied to a convolutionally coded signal is provided. The decoding apparatus includes a first soft-in-soft-out (SISO) decoder, a second data converter, a second SISO decoder, a first data converter, a first scaling factor generator and a second scaling factor generator. The first SISO decoder decodes the convolutionally coded signal according to systematic information and first a-priori information to generate first extrinsic information. The second data converter converts the first extrinsic information to second a-priori information according to a second scaling factor. The second SISO decoder decodes the convolutionally coded signal according to the systematic information and the second a-priori information to generate second extrinsic information. The first scaling factor generator generates one of the first scaling factor and the second scaling factor according to the first a-priori information and the first extrinsic information. The second scaling factor generator generates the other of the first scaling factor and the second scaling factor according to the second a-priori information and the second extrinsic information. One of the first and second SISO decoders further generates a-posteriori information as a decoding result.
The above and other aspects of the invention will become better understood with regard to the following detailed description of the preferred but non-limiting embodiments. The following description is made with reference to the accompanying drawings.
The present invention is capable of improving the converging speed of a soft-decision decoder in an iteration process. In a decoder according to embodiments of the present invention, a scaling factor is introduced for adjusting a-priori information generated from interleaving or de-interleavinga extrinsic information. The scaling factor is not a constantly value, but dynamically changes along with a result generated from previous iteration decoding and a previous value of the scaling factor.
In general, convolutional codes and turbo codes may be represented by a trellis, as shown in
In
The turbo decoder in
Under the condition that the foregoing MAP algorithm calculates a received message Y, the probability of the message bit being digital 1 or 0 at a step k, or referred to as a-posteriori log-likelihood ratio L(uk|Y), is defined as below.
The MAP algorithm calculates L(uk|Y) of each step k through forward and backward recursive operations on the trellis. L(uk|Y) is organized and represented as:
In equation (1), the branch metric rk(n,m) represents the probability of becoming a state m at the step k under conditions that the state is n at the step k−1 and the received message is Y, the forward state metric αk−1(n) represents the probability that the state is n at the step k−1 under a condition that the received message is Y, the backward state metric βk(m) represents the probability that the state ism at the step k under a condition that the received message is Y. The alphabet zigma (Σ) of the numerator refers to a calculated total of all branches that possibly generate uk=1. Similarly, the alphabet zigma (Σ) of the denominator refers to a calculated total of all branches that possibly generate uk=−1. The forward state metric αk(m), the backward state metric βk(m) and the branch metric rk(n,m) may be respectively represented as:
In the above, Ak is a constant number, and i=+1 or −1. It is known from equation (2) that, to calculate the forward state metric αk(m), the forward state metric α prior to the step k needs to be first learned; it is known from equation (3) that, to calculate the backward state metric βk(m), the backward state metric β subsequent to the step k needs to be first learned. Thus, the forward state metric αk(m) and the backward state metric βk(m) are generally calculated and obtained through iteration, with however the directions of the iteration being opposite. It is known from equation (4) that, to calculate the branch metric rk(n,m) requires index and multiplication calculations, and consumes immense resources and costs regardless of whether it is implemented by hardware or software.
A Log-MAP algorithm simplifies the calculation process by using a logarithm quadrant operation. Further, the index and logarithm calculations may be simplified through the approximation method below.
max*(x,y)≡In(ex+ey)=max(x,y)+In(1+e−|y−x|) (5)
The last logarithm calculation may be obtained through a look-up table. A Max-Log-MAP algorithm further removes the last item in equation (5) to approximate the operator max*, as below:
max*(x,y)=In(ex+ey)≈max(x,y) (6)
The decoding calculation in the SISOs 20 and 22 adopts the maximum a-posteriori probability (MAP) algorithm for decoding. The MAP algorithm may be the Log-MAP or Max-Log-MAP algorithm.
When using the Log-MAP or Max-Log-MAP algorithm for processing, equation (4) may be organized as:
Γk(n,m)=In(γk(n,m))=2/N0*(yksxks(i)+ykpxkp(i,n,m))+In(P(m|n))+K (7)
In equation (7), K is a constant value, and P(min) is input information transmitted from a first half iteration, e.g., a-priori information. Components of the input information exchanged between two half iterations may be slightly adjusted, e.g., multiplying by a scaling factor sd to increase the converging speed of the iteration loop of the turbo decoder. Wherein, d is 1 or 2, which respectively correspond to the SISO 20 and 22, i.e., the first and second half iterations.
The scaling factor sd may be set as a fixed value, e.g., 0.7. However, it usually may be challenging to select a most appropriate fixed value.
In one embodiment of the present invention, for example, the scaling factor generators 38 and 34 generate s1 and s2 according to equations (8a) and (8b), respectively:
s1(I+1)=s1(I)+STEP*DIF1(I)/LEN (8a)
s2(I+1)=s2(I)+STEP*DIF2(I)/LEN (8b)
In the equations above, STEP represents a constant number and may be pre-set according to requirements, and s1(I) represents the scaling factor adopted in the 1st half iteration in the Ith iteration loop. The variance DIF1(I) is a sum of different numbers of bits between the extrinsic information Le1 generated by the first half iteration of the Ith iteration loop and the a-priori information La1 generated by the second half iteration of the (I−1)th iteration loop. That is, The variance DIF1(I) may be learned from the a-priori information La1 and the extrinsic information Le1 of the same half iteration. For example, after the first half iteration of the 2nd iteration loop, there is a difference of 3 bits between the extrinsic information Le1 and t the a-priori information La1, and so the variance DIF1(2) is 3. LEN is a constant number associated with the code block length K. In one embodiment, LEN is directly equal to the block code length K, e.g., 2080. In another embodiment, the relationship between LEN and the block code length K is LEN=K*bit/step, where bit is information bit, and bit/step is the possible number outputted in each step. In one embodiment K=2080, bit/step=2, and LEN=4160.
s2(I) and the variance DIF2(I) respectively represent the scaling factor adopted in the second half iteration of the Ith iteration loop, and the variance generated after the decoding of the second half iteration of the Ith iteration loop.
In some embodiments, initial values s1(0) and s2(0) of the scaling factors are both set to 0.25. In some embodiments, the scaling factors s1 and s2 are limited to a maximum value 1. In other words, if the scaling factors s1 and s2 obtained from equations (8a) and (8b) exceed 1, the scaling factors s1 and s2 are set to 1.
It is discovered from equations (8a) and (8b) that, the scaling factor adopted in the specific half iteration is determined by the scaling factor and the decoding result of the same specific half iteration of a previous iteration loop. Further, if the variance DIFd(I) generated by the previous iteration loop is not 0, the scaling factor adopted in the current iteration loop is then larger than the scaling factor adopted in the previous iteration loop. It is further discovered from equations (8a) and (8b) that, the scaling factors s1 and s2 used in each iteration loop are not smaller than the scaling factors s1 and s2 used in the previous iteration loop.
It is proven through computerized simulations that, the scaling factors adopting equations (8a) and (8b) are capable of causing the iteration loop to converge quickly, i.e., quickly reducing the variance DIFd(I). Thus, the decoding efficiency of the turbo decoder can be enhanced.
s2(I)=s1(I)+STEP*DIF1(I)/LEN (9a)
s1(I+1)=s2(I)+STEP*DIF2(I)/LEN (9b)
The scaling factors in
In
s1(I+1)=s2(I)+STEP*DIF1(I)/LEN (10a)
s2(I)=s1(I)+STEP*DIF2(I)/LEN (10b)
In
s2(I+1)=s2(I)+STEP*DIF1(I)/LEN (11a)
s1(I+1)=s1(I)+STEP*DIF2(I)/LEN (11b)
In simple, each time the scaling factor is adjusted, the scaling factor used by the same half iteration in the previous iteration loop or the scaling factor used by the previous half iteration may be referred. Each time the scaling factor is adjusted, the variance generated by the same half iteration in the previous iteration loop or the variance generated by the previous half iteration may be referred. Thus, there are at least four combinations, which are encompassed within the scope of the present invention.
After the iteration loop repetition is complete, a-posteriori information is generated by the SISO 22 in
While the invention has been described by way of example and in terms of the preferred embodiments, it is to be understood that the invention is not limited thereto. On the contrary, it is intended to cover various modifications and similar arrangements and procedures, and the scope of the appended claims therefore should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements and procedures.
Number | Date | Country | Kind |
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104123335 A | Jul 2015 | TW | national |
Number | Name | Date | Kind |
---|---|---|---|
6732327 | Heinila | May 2004 | B1 |
8799737 | Varnica | Aug 2014 | B1 |
20070067703 | Berkmann | Mar 2007 | A1 |
20070220394 | Kim | Sep 2007 | A1 |
20070286292 | Moelker | Dec 2007 | A1 |
20100208849 | Grosskinsky | Aug 2010 | A1 |
20120069936 | Shaver | Mar 2012 | A1 |
20160352361 | Fonseka | Dec 2016 | A1 |
Entry |
---|
Taiwan Intellectual Property Office, “Office Action”, issued on Jun. 27, 2016. |
Yi-Nan Lin; et al., “An Efficient Soft-Input Scaling Scheme for Turbo Decoding”, 2006, IEEE. |
Number | Date | Country | |
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20170019213 A1 | Jan 2017 | US |