Claims
- 1. A method of aligning a frame in a digital communication system, the method comprising:
comparing a portion of a received data sequence to a portion of a predetermined sequence; determining whether a total number of comparison errors exceeds a tolerance threshold that is greater than zero; and aligning the frame if the threshold is not exceeded.
- 2. The method of claim 1 wherein:
the portion of the received data sequence and the portion of the predetermined sequence are compared in a bit-wise fashion, and the total number of comparison errors comprises the number of bits that are not perfectly matched.
- 3. The method of claim 1 wherein:
the portion of the received data sequence and the portion of the predetermined sequence are compared in multi-bit symbols, and the total number of comparison errors comprises the number of symbols that are not perfectly matched.
- 4. The method of claim 1 further comprising determining the total number of comparison errors between the portion of the received data sequence and the portion of the predetermined sequence.
- 5. The method of claim 1 further comprising:
comparing a second portion of the received data sequence to a second portion of the predetermined sequence; determining a second total number of comparison errors based on the second comparison; and determining whether the second total number of comparison errors exceeds a second tolerance threshold.
- 6. The method of claim 5 wherein the second portion of the received data sequence equals the first portion of the received data sequence.
- 7. The method of claim 5 wherein the first comparison is performed before the second comparison.
- 8. The method of claim 5 wherein the second comparison is performed before the first comparison.
- 9. The method of claim 1 further comprising determining a length for the portion of the received data sequence and the portion of the predetermined sequence that are being compared.
- 10. The method of claim 1 further comprising determining the tolerance threshold.
- 11. The method of claim 1 further comprising using the method in a high-speed networking environment characterized by the existence of bit errors.
- 12. A method of aligning a frame containing a frame alignment sequence (“FAS”), the method comprising:
comparing a portion of a received sequence to a portion of the FAS; allowing a tolerance to bit errors in the received sequence by using a tolerance threshold greater than zero; and accepting an error in the comparison by aligning the frame if the tolerance threshold is no smaller than a total number of comparison errors.
- 13. The method of claim 12 wherein:
the comparison comprises performing a bit-wise comparison, and the total number of comparison errors comprises the number of bit errors in the comparison.
- 14. The method of claim 12 wherein:
the comparison comprises comparing in multi-bit symbols, and the total number of comparison errors comprises the number of symbols in error.
- 15. A computer program, residing on a computer-readable medium, for aligning a frame in a digital communication system, the computer program comprising instructions for causing a computer to perform the following operations:
compare a portion of a received sequence to a portion of a predetermined sequence; determine whether a total number of comparison errors exceeds a tolerance threshold that is greater than zero; and align the frame if the threshold is not exceeded.
- 16. The computer program of claim 15 wherein:
the instructions for causing the computer to compare comprise instructions for causing the computer to perform a bit-wise comparison, and the total number of comparison errors comprises the number of bit errors in the comparison.
- 17. A device for use in aligning a frame, the device comprising:
parallel compare circuits configured to receive data and a predetermined sequence, and to produce a comparison result; and a state machine configured to receive the comparison result from the parallel compare circuits and to produce a frame alignment determination.
- 18. The device of claim 17 wherein:
each of the parallel compare circuits is configured to produce a separate comparison result, and the state machine is configured to receive each of the separate comparison results.
- 19. The device of claim 17 further comprising an additional compare circuit, not in parallel with the parallel compare circuits, the additional compare circuit being configured to receive data and the predetermined sequence and to produce another comparison result which the state machine is further configured to receive.
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application claims priority from U.S. Provisional Application No. 60/334,116, filed Nov. 30, 2001, and titled A DEFRAMER.
Provisional Applications (1)
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Number |
Date |
Country |
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60334116 |
Nov 2001 |
US |