Claims
- 1. A demodulator for producing a received signal strength indicator (RSSI) value signal and a power control data signal comprising:an infinite-duration impulse response (IIR) filter with dynamic coefficient scaling having: an adder having an adder output; a coefficient selection block, coupled to the adder output, for selectively multiplying a signal at the adder output by either a first coefficient set or a second coefficient set; and a delay block, coupled to the coefficient selection block, for providing a negative feedback signal from the coefficient selection block to the adder.
- 2. A demodulator having an IIR filter with dynamic coefficient scaling according to claim 1 wherein the coefficient selection block comprises:a scaler block, coupled to the adder output, having a scaler block output; a switch, coupled to select either the adder output or the scaler block output, having a switch output; and a bit shift-and-add block, coupled to the switch output.
- 3. A demodulator having an IIR filter with dynamic coefficient scaling according to claim 2 wherein the switch is a multiplexer.
- 4. A demodulator having an IIR filter with dynamic coefficient scaling according to claim 1 wherein the coefficient selection block is controlled by a selection signal.
- 5. A demodulator having an infinite-duration impulse response (IIR) filter with dynamic coefficient scaling comprising:an adder; a delay block, coupled to the adder, having a delay block output; and a coefficient selection block, coupled to the delay block output, for selectively multiplying a signal from the delay block output by either a first coefficient set or a second coefficient set and providing a negative feedback signal to the adder.
- 6. A demodulator having an IIR filter with dynamic coefficient scaling according to claim 5 wherein the coefficient selection block comprises:a scaler block, coupled to the delay block output, having a scaler block output; a switch, coupled to select either the delay block output or the scaler block output, having a switch output; and a bit shift-and-add block, coupled to the switch output.
- 7. A demodulator having an IIR filter with dynamic coefficient scaling according to claim 6 wherein the switch is a multiplexer.
- 8. A demodulator having an IIR filter with dynamic coefficient scaling according to claim 5 wherein the coefficient selection block is controlled by a selection signal.
CROSS REFERENCE TO RELATED APPLICATIONS
This patent application is a division of U.S. patent application Ser. No. 08/808,331 filed Feb. 28, 1997 by Christopher P. LaRosa et al. and entitled “CDMA Power Control Channel Estimation Using Dynamic Coefficient Scaling,” now U.S. Pat. No. 5,799,011 which is a continuation-in-part of U.S. patent application Ser. No. 08/624,329 filed Mar. 29, 1996 by Fuyun Ling et al. and entitled “Method and Apparatus for Demodulation and Power Control Bit Detection in a Spread Spectrum Communication System,” now U.S. Pat. No. 5,737,327. These related applications are assigned to the assignee of the present application and are hereby incorporated herein in their entirety by this reference thereto and priority thereto for common subject matter is hereby claimed.
US Referenced Citations (7)
Foreign Referenced Citations (4)
Number |
Date |
Country |
0668665A1 |
Aug 1995 |
EP |
2280575 |
Feb 1995 |
GB |
2311445 |
Sep 1997 |
GB |
2311702 |
Oct 1997 |
GB |
Non-Patent Literature Citations (1)
Entry |
Andrew J. Viterbi, CDMA: Principles of Spread Spectrum Communication 86-93 (1995). |
Continuation in Parts (1)
|
Number |
Date |
Country |
Parent |
08/624329 |
Mar 1996 |
US |
Child |
08/808331 |
|
US |