Patent Application
20060233283
The present invention relates generally to digital communication systems and more particularly to digital communication systems employing M-phase shift keying (M-PSK) or M-quadrature amplitude modulation (M-QAM) modulation.
A digital communication system carries a stream of binary information, and the quality thereof is constantly changing due to changes in the communications channel medium, traffic profile changes, etc. As is known by those skilled in the art, this said binary information can be divided into manageable segments, known as packets, to facilitate error detection and to retransmit certain portions of the data stream. Packets can also be further subdivided into clusters of significant bits known as symbols. For example, a symbol used for the transmission of videoconferencing data might contain one bit designated as voice and three bits representing the video image. The relationship of bits m in a symbol and the number of 1 positions M in a signal constellation is M=2m.
One measure of a communication system's performance is its bit error rate (BER). The BER is the number of bit errors that have occurred during the transmission and is measured as the number of bit errors in a quantity of bits (such as 1 error in 1000 bits). The BER is inversely proportional to the system signal-to-noise ratio (SNR). As the SNR is increased, the BER decreases.
M-PSK and M-QAM modulation are modulation techniques commonly used in communication systems. In M-PSK modulation, the carrier changes between different phases as determined by the logic states of the input data bit stream. The M-QAM modulation is a composite modulator consisting of amplitude and phase modulation. The M in M-PSK signifies the number of phase positions that have been modulated. In a 4-PSK system, 4 phases are modulated, and in a 16-PSK system, 4 phases are modulated. Further as an example, in an 8-PSK modulator, 3 bits are processed to produce a single phase change. This means that each symbol in an 8-PSK system contains 3 bits.
In a typical 8-PSK communication system, the binary data digits are encoded, interleaved, and phase modulated onto a carrier signal. The carrier signal is then transmitted via various types of communications channels such as air, coaxial cable, fiber optic lines, etc. At the receiver, the carrier is demodulated, de-interleaved, and decoded to generate an estimate of the original binary data bits. These estimates are called “soft values”.
A signal constellation diagram is used to represent the different combinations of bits in a symbol (an 8-PSK system contains 3 bits). Each combination of bits map to a unique phase angle on the constellation. In an 8-PSK system with 8 phases, each of the 8 phases represents 45 degrees in the constellation (as shown in
Therefore, desirable in the art of M-PSK and M-QAM demodulators are improved demodulator designs that increase the demodulator SNR, and thereby lowering the demodulator BER and increasing decoder performance.
In view of the foregoing, this invention provides circuits and methods to improve demodulator/decoder performance and its bit error rate through the incorporation of an individual bit-weighting algorithm, and thereby increase the demodulator's signal-to-noise ratio (SNR). A method and system is disclosed for weighting soft values of a demodulated symbol. An incoming symbol is demodulated for obtaining a plurality of soft values associated with the incoming symbol based on a modulation constellation. An effective signal-to-noise ratio (SNR) of at least one soft value, which is to be a reference for decoding, is obtained, as well as effective SNRs of all other soft values. A set of weights are then calculated for the soft values based on a ratio between each SNR and the reference, wherein the weights are applied to the soft values based on the ratios for further decoding thereof.
In one embodiment, a fixed-point M-PSK demodulator incorporating an individual bit-weighting algorithm is implemented after or before a quantizer. The incorporation of the bit-weighting algorithm increases the demodulator SNR, which in turn decreases the demodulator BER, thus improving the demodulator decoder performance.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
The transmitter 102 comprises an encoder module 110 to be coupled to an interleaver module 112, which is further coupled to, and provides data inputs to a modulator module 114. The input signal of binary digits 108 to the encoder module 110 is a string of data bits arranged in any well-known format. Although the encoder module 110, the interleaver module 112, and the modulator module 114 are shown in
The encoder module 110 can be a bit processing device that adds bits to the incoming data stream of binary digits 108 to allow for error correction at the receiver. The interleaver module 112 is also a bit processing device that alters the time order of the bits from the encoder module 110 to produce a modified output stream. The interleaver module 112 introduces time diversity in the bit stream without adding additional bits in the data stream. Interleaving is used to distribute burst errors over many channel blocks, so that the number of errors in each block is limited.
The modulator module 114 is designed to digitally modulate signals with a well-known spectrally efficient modulation technique such as PSK or QAM. In this disclosure, the modulator module 114 is an M-PSK modulator, where M represents the total number of different groupings of bits that can be transmitted by the modulator. As an example, if M equals 8, there will be 8 phase signals. Each grouping of bits (symbol) contains 3 bits (N=log2 M). Where, each bit can carry a different bit energy level.
The modulation process maps the incoming bits into symbols. One well known mapping technique is called “gray mapping”. The symbols are simply digital signals modulated in conformance with a particular modulation scheme such as PSK and QAM. To further illustrate, if 3 bits are transmitted at a 10 Khz rate, the bit rate is then 30 Khz. The symbol rate, which is also known as the baud rate, will be calculated by the bit rate divided by the number of bits in a symbol. If there is 1 bit per symbol, the symbol rate is then 30 Khz. If there are 2 bits per symbol, the symbol rate is 15 Khz.
There are various types of communications channels 106, such as air, coaxial cable, fiber optic lines, etc that may be utilized. Each of these communication channel media has adverse effects that alter the characteristics of the original transmitted signal. As is well known in communication theory, data transmitted through the communication channel 106 are subject to multiplicative distortions such as phase jitter, amplitude degradation and frequency translation that directly affect the transmitted signals.
The receiver module 104 is comprised of a demodulator module 116, a de-interleaver module 118, and a decoder module 120. The receiver module 104 receives the transmitted signal 122 via the communications channel 106 and generates an output signal containing the estimate 124, which is error-corrected.
Although the demodulator module 116, the de-interleaver module 118, and the decoder module 120 are shown in
The demodulator module 116 receives the transmitted symbols 122 and calculates soft values corresponding to the bits of the symbols. In essence, the demodulator module 116 is the one to convert symbols to bits, or in other words, it inverts the bit-to-symbol mapping. The de-interleaver module 118 resets the demodulator data bit stream to the same data stream that was output from the encoder module 110. The output of the de-interleaver module 118 is fed to the decoder module 120. The decoder module 120 calculates a set of distance metrics for each bit. The decoder module 120 finally generates the bit decision 124.
One method of calculating the bit estimates (or soft values) in a typical digital communication system as shown in
In this example, an ad-hoc method is used to partition the signal space using the signal constellation symmetry:
(abs(I)−abs(Q))/√2
can be a bit 0 estimate for the 8-PSK signal constellation, where I is the in-phase component of the received signal X. The in-phase component I alone can be a bit 1 estimate. Q is the quadrature component of the received signal X. The quadrature component Q alone can be a bit 2 estimate.
The 8-PSK demodulation scheme generates a plurality of soft values associated with the incoming symbol based on the signal modulation constellation. The individual bit-weighting algorithm computes a set of weights for the soft values based on a ratio between each soft value's SNR and a reference SNR. The calculated weight is then applied to the soft values for further decoding.
This individual bit weighting method first calculates an effective SNR on one soft value, which will be used as a reference for decoding. Then, the effective SNR for all other soft values will be calculated. Next a set of weights for the soft values will be calculated based on a ratio between each soft value SNR and the reference SNR. Finally, the calculated weight set will be applied to the soft values based upon the ratios for further decoding. This individual bit weighting algorithm will increase the demodulator SNR, which in turn will decrease its BER, thus improving the decoder performance.
In this example, consider the same ad-hoc demodulation scheme that was used in
(abs(I)−abs(Q))/√2
where I, the in-phase component, and Q, the quadrature component, are used for the bit 0, bit 1, and bit 2 estimates.
Then, the effective SNR for bit 0 is:
SNRbit0=(c−s)2*a2/2=0.44Es/N0/2
where c=a cos(π/8), s=a sin(π/8), Es is the bit energy level of the signal and N0 is the energy level of the noise involved, a=√6 Es/N0.
Therefore, the effective SNR for bit 0 is:
SNRbit0=0.88 at Es/N0=0 dB
It is understood that Es is the bit energy before bit-to-symbol mapping, and after mapping (e.g., the modulation in this disclosure), the SNR changes between bits. The effective SNR is the SNR after mapping.
The effective SNRs for bits 1 and 2 are:
SNRbit1=SNRbit2=(c+s)2a2/4(1+a2/2−(c+s)2a2/4)=0.89Es/N0/2
Therefore,
SNRbit1=1.78 at Es/N0=0 dB; and
SNRbit2=1.78 at Es/N0=0 dB.
The effective SNR of one soft value will be used as a reference for decoding all other soft values. In this example, bit 1 will be used as the reference for the bit weighting algorithm. Therefore:
Bit 0 weighting=√SNRbit0/SNRbit1=√0.88/1.78=0.7;
Bit 1 weighting=√SNRbit1/SNRbit1=√1.78/1.78=1; and
Bit 2 weighting=√SNRbit2/SNRbit1=√1.78/1.78=1.
As illustrated in
The above illustration provides many different embodiments or embodiments for implementing different features of the invention. Specific embodiments of components and processes are described to help clarify the invention. These are, of course, merely embodiments and are not intended to limit the invention from that described in the claims.
Although the invention is illustrated and described herein as embodied in one or more specific examples, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims. Accordingly, it is appropriate that the appended claims be construed broadly and in a manner consistent with the scope of the invention, as set forth in the following claims.
