Patent Application
20220139328
The present disclosure relates to the field of a display technology, and particularly, to a detection circuit and a driving method thereof, a driving circuit, a driving apparatus and a display apparatus.
Organic light emitting diodes (OLED) are widely used in display panels because of its advantages of wide color gamut, wide viewing angle, low energy consumption, high contrast and the like. An OLED display panel generally includes a plurality of pixel units, wherein each pixel unit may include a pixel circuit and a light emitting element connected to the pixel circuit. Each pixel circuit may output a data signal to the light emitting element to which it is connected to drive the light emitting element to emit light.
In related arts, in order to avoid a relatively poor light emitting effect of the light emitting elements caused by the aging of the light emitting elements or transistors in the pixel circuits, the data signals may be compensated in a manner of external compensation. The method of external compensation may include: a detection circuit acquires characteristic parameters (e.g., a threshold voltage) of the transistors through sense lines; an analog-to-digital converter converts the characteristic parameters into digital signals and outputs them to an external compensation circuit; and the external compensation circuit compensates data signals according to the received characteristic parameters.
The present disclosure provides a detection circuit and a driving method, a driving circuit, a driving apparatus and a display apparatus.
In an aspect, there is provided a detection circuit, comprising a switching sub-circuit and an analog-to-digital conversion sub-circuit, wherein
the switching sub-circuit is connected to a sense line, an external compensation circuit, a reference power terminal, a reset power terminal, and the analog-to-digital conversion sub-circuit, respectively; the switching sub-circuit is used to control an on-off state between the sense line and the reference power terminal in response to a first control signal provided by the external compensation circuit, used to control an on-off state between the sense line and the reset power terminal in response to a second control signal provided by the external compensation circuit, and used to control an on-off state between the sense line and the analog-to-digital conversion sub-circuit in response to a third control signal provided by the external compensation circuit; and
the analog-to-digital conversion sub-circuit is also connected to the external compensation circuit, and used to convert a sense signal from the sense line into a digital signal when the analog-to-digital conversion sub-circuit is in conduction with the sense line and then output the digital signal to the external compensation circuit, such that the external compensation circuit compensates a data signal according to the sense signal.
Optionally, the switching sub-circuit includes a first switch assembly, a second switch assembly, and a third switch assembly;
the first switch assembly is connected to the external compensation circuit, the sense line and the reference power terminal, respectively, and used to control the on-off state between the sense line and the reference power terminal in response to the first control signal;
the second switch assembly is connected to the external compensation circuit, the sense line and the reset power terminal, respectively, and used to control the on-off state between the sense line and the reset power terminal in response to the second control signal; and
the third switch assembly is connected to the external compensation circuit, the sense line and the analog-to-digital conversion sub-circuit, respectively, and used to control the on-off state between the sense line and the analog-to-digital conversion sub-circuit in response to the third control signal.
Optionally, the first switch assembly includes a first switch, the second switch assembly includes a second switch, and the third switch assembly include a third switch;
a control end of the first switch is connected to the external compensation circuit, a first end of the first switch is connected to the reference power terminal, and a second end of the first switch is connected to the sense line;
a control end of the second switch is connected to the external compensation circuit, a first end of the second switch is connected to the reset power terminal, and a second end of the second switch is connected to the sense line;
a control end of the third switch is connected to the external compensation circuit, a first end of the third switch is connected to the analog-to-digital conversion sub-circuit, and a second end of the third switch is connected to the sense line.
Optionally, the reference power terminal includes a first sub reference power terminal and a second sub reference power terminal; a potential of a reference power signal provided by the first sub reference power terminal is different from a potential of a reference power signal provided by the second sub reference power terminal; the first switch assembly includes two of the first switches;
a first end of one of two of the first switches is connected to the first sub reference power terminal, and a first end of the other first switch is connected to the second sub reference power terminal.
Optionally, the analog-to-digital conversion sub-circuit includes an analog-to-digital converter;
one end of the analog-to-digital converter is connected to the switching sub-circuit, and the other end of the analog-to-digital converter is connected to the external compensation circuit.
Optionally, the detection circuit further includes a storage sub-circuit;
the storage sub-circuit is connected to the reset power terminal, the switching sub-circuit and the analog-to-digital conversion sub-circuit respectively, and used to store a sense signal output from the sense line to the analog-to-digital conversion sub-circuit through the switching sub-circuit when the sense line is in conduction with the analog-to-digital conversion sub-circuit.
Optionally, the storage sub-circuit includes a storage capacitor;
one end of the storage capacitor is connected to the switching sub-circuit and the analog-to-digital conversion sub-circuit, and the other end of the storage capacitor is connected to the reset power terminal.
Optionally, the switching sub-circuit includes one of the first switch, one of the second switch and one of the third switch;
the analog-to-digital conversion sub-circuit includes an analog-to-digital converter, wherein one end of the analog-to-digital converter is connected to the switching sub-circuit, and the other end of the analog-to-digital converter is connected to the external compensation circuit.
the detection circuit further includes a storage capacitor, wherein one end of the storage capacitor is connected to the switching sub-circuit and the analog-to-digital conversion sub-circuit, and the other end of the storage capacitor is connected to the reset power terminal.
In another aspect, there is provided a driving method for a detection circuit, which is used to drive the detection circuit as described in the above aspect, and the method includes:
in a charging phase, in which a potential of the first control signal provided by the external compensation circuit is a first potential, the switching sub-circuit controls the sense line to be in conduction with the reference power terminal in response to the first control signal;
in a resetting phase, in which a potential of the second control signal provided by the external compensation circuit is a first potential, the switching sub-circuit controls the sense line to be in conduction with the reset power terminal in response to the second control signal;
in a signal acquisition phase, in which the potential of the first control signal, the potential of the second control signal, and a potential of the third control signal provided by the external compensation circuit are all second potentials, the switching sub-circuit controls the sense line to be disconnected with the reference power terminal in response to the first control signal, controls the sense line to be disconnected with the reset power terminal in response to the second control signal, and controls the sense line to be disconnected with the analog-to-digital conversion sub-circuit in response to the third control signal; and
in a signal output phase, in which the potential of the third control signal is a first potential; the switching sub-circuit controls the sense line to be conducted with the analog-to-digital conversion sub-circuit in response to the third control signal, the analog-to-digital conversion sub-circuit converts a sense signal from the sense line into a digital signal and outputs the digital signal to the external compensation circuit, such that the external compensation circuit compensates a data signal according to the sense signal.
Optionally, the switching sub-circuit includes a first switch, a second switch, a third switch, and a storage capacitor; the analog-to-digital conversion sub-circuit includes an analog-to-digital converter;
in the charging phase, the potential of the second control signal and the potential of the third control signal are both second potentials, the first switch is turned on, and the second switch and the third switch are turned off; the reference power terminal outputs a reference power signal from the reference power terminal to the sense line through the first switch;
in the resetting phase, the potential of the first control signal and the potential of the third control signal are both second potentials, the second switch is turned on, and the first switch and the third switch are turned off; the reset power terminal outputs a reset power signal from the reset power terminal to the sense line through the second switch;
in the signal acquisition phase, the first switch, the second switch and the third switch are all turned off; the sense line is disconnected with the reference power terminal, the reset power terminal, and the analog-to-digital conversion sub-circuit; the sense line acquires a sense signal from each pixel unit to which it is connected;
in the signal output phase, the potential of the first control signal and the potential of the second control signal are both second potentials; the third switch is turned on, and the first switch and the second switch are both turned off; the sense line outputs the sense signal to the analog-to-digital converter through the third switch; and the storage capacitor stores the sense signal.
In yet another aspect, there is provided a source driving circuit comprising any of the detection circuits described in the above aspect.
Optionally, the source driving circuit includes: at least two of the plurality of detection circuits multiplex one analog-to-digital conversion sub-circuit.
In still another aspect, there is provided a driving apparatus for a display panel, the driving apparatus comprising an external compensation circuit, and the source driving circuit as described in the above aspect connected to the external compensation circuit;
the source driving circuit is used to output a sense signal acquired by a sense line to the external compensation circuit;
the external compensation circuit is used to compensate a data signal according to the sense signal, and output the compensated data signal to the source driving circuit; and
the source driving circuit is further used to output the compensated data signal to a pixel unit through a data line.
Optionally, the driving apparatus includes a plurality of the source driving circuits, and data lines and sense lines, which are connected to the respective source driving circuits, are different, respectively.
Optionally, the driving apparatus further includes a first storage circuit and a second storage circuit which are connected to the external compensation circuit respectively;
the first storage circuit is used to provide a data signal to the external compensation circuit, and the second storage circuit is used to provide a pixel compensation value to the external compensation circuit; and
the external compensation circuit is used to compensate the data signal according to the pixel compensation value and the sense signal.
In a still another aspect, there is provided a display apparatus, the display apparatus comprising a display panel, and the driving apparatus for the display panel as described in the above aspect, wherein a source driving circuit in the driving apparatus is connected to a pixel unit in the display panel through a data line and a sense line.
Optionally, the display panel includes a plurality of pixel units which is arranged in an array; and
the pixel units located in the same column are connected to one data line and one sense line, and the data lines and the sense lines, which are connected to the pixel units located in different columns are different, respectively.
Optionally, each of the pixel units includes a pixel circuit, and a light emitting element connected to the pixel circuit; and
each sense line is connected to corresponding pixel circuits and a corresponding detection circuit in the source driving circuit, respectively.
For clearer descriptions of the objects, technical solutions and advantages of the present disclosure, the present disclosure is described in detail below in combination with the accompanying drawings.
Transistors used in all the embodiments of the present disclosure may be thin film transistors or field effect transistors or other devices with the same characteristics. The transistors employed in the embodiments of the present disclosure are mainly switching transistors according to their roles in a circuit. Since a source electrode and a drain electrode of a switching transistor used here are symmetrical, and are thus interchangeable. In an embodiment of the present disclosure, the source electrode is referred to as a first pole, the drain electrode is referred to as a second pole; or the drain electrode is referred to as the first pole, and the source electrode is referred to as the second pole. According to the forms in the accompanying drawings, it is stipulated that an intermediate end of the transistor is a gate electrode, a signal input end is a source electrode, and a signal output end is a drain electrode. Moreover, the switching transistor used in the embodiments of the present disclosure may include any one of a P-type switching transistor and an N-type switching transistor, wherein the P-type switching transistor is turned on when a gate electrode is in a low level, and turned off when the gate electrode is in a high level; and the N-type switching transistor is turned on when a gate electrode is in a high level, and turned off when the gate electrode is in a low level. Furthermore, a plurality of signals in the embodiments of the present disclosure each correspondingly has a first potential and a second potential, which only represent, that the potential of the signal has two different state quantities, rather than that the first potential or the second potential has a specific value throughout the text.
A gate electrode of the switching transistor M1 may be connected to a gate line (GL) GL1, a first pole of the switching transistor M1 may be connected to a data line (DL), and a second pole of the switching transistor M1 may be connected to a gate electrode of the driving transistor T1. A first pole of the driving transistor T1 may be connected to a DC power terminal ELVDD, a second pole of the driving transistor T1 may be connected to one end of the light emitting element L1, and the other end of the light emitting element L1 may be connected to a DC power terminal ELVSS. One end of the storage capacitor C0 may be connected to the second pole of the driving transistor T1, and the other end of the storage capacitor C0 may be connected to the gate electrode of the driving transistor T1. A gate electrode of the detection transistor O1 may be connected to a gate line GL2, a first pole of the detection transistor O1 may be connected to the second pole of the driving transistor T1, and a second pole of the detection transistor O1 may be connected to a sense line (SL). The sense line SL may also be connected to an external compensation circuit (not shown in
In embodiments of the present disclosure, the switching transistor M1 may output a data signal from the data line DL to the gate electrode of the driving transistor T1 in response to a gate drive signal provided by the gate line GL1. The storage capacitor C0 may store the data signal. The driving transistor T1 may output a drive signal to the light emitting element L1 in response to the data signal and a DC power signal from the DC power terminal ELVDD to drive the light emitting element L1 to emit light. The detection transistor O1 may output a sense signal from the pixel circuit 00 to the sense line SL in response to a gate drive signal provided by a gate line GL2. This sense signal may include pixel characteristic values such as a threshold voltage and an offset ratio of the driving transistor T1. The sense line SL may output the acquired sense signal to the external compensation circuit, so that the external compensation circuit performs external compensation on a data signal according to the sense signal.
The switch sub-circuit 101 may be connected to the sense line SL, the external compensation circuit 01, a reference power terminal Vref, a reset power terminal RST, and an analog-to-digital conversion sub-circuit 102, respectively. The switching sub-circuit 101 may control an on-off state between the sense line SL and the reference power terminal Vref in response to a first control signal provided by the external compensation circuit 01; may control an on-off state between the sense line SL and the reset power terminal RST in response to a second control signal provided by the external compensation circuit 01; and may control an on-off state between the sense line SL and the analog-to-digital conversion sub-circuit 102 in response to a third control signal provided by the external compensation circuit 01.
The analog-to-digital conversion sub-circuit 102 may also be connected to the external compensation circuit 01. The analog-to-digital conversion sub-circuit 102 may convert a sense signal from the sense line SL into a digital signal and then output the digital signal to the external compensation circuit 01 when the analog-to-digital conversion sub-circuit 102 is in conduction with the sense line SL, so that the external compensation circuit 01 compensates a data signal according to the sense signal.
Exemplarily, the switching sub-circuit 101 may control the sense line SL to be in conduction with the reference power terminal Vref when a potential of the first control signal provided by the external compensation circuit 01 is a first potential. In this case, the reference power terminal Vref may output a reference power signal to the sense line SL through the switching sub-circuit 101, to charge the sense line SL, thereby achieving a charging function for the sense line SL. The potential of the reference power signal may be a fixed potential.
The switching sub-circuit 101 may control the sense line SL to be in conduction with the reset power terminal Vref when a potential of the second control signal provided by the external compensation circuit 01 is a first potential. In this case, the reset power terminal RST may output a reset power signal to the sense line SL through the switching sub-circuit 101, to reset the sense line SL, thereby achieving a reset function for the sense line SL.
The switching sub-circuit 101 may control the sense line SL to be in conduction with the analog-to-digital conversion sub-circuit 102 when a potential of the third control signal provided by the external compensation circuit 01 is a first potential. In this case, the sense line SL may output a sense signal to the analog-to-digital conversion sub-circuit 102 through the switching sub-circuit 101, thereby achieving an analog-to-digital conversion function for the sense signal. The analog-to-digital conversion sub-circuit 102 may convert the sense signal into a digital signal and then output the digital signal to the external compensation circuit 01, so that the external compensation circuit 01 reliably compensates a data signal according to the sense signal. The sense signal may include pixel characteristic values of a pixel unit.
The switch sub-circuit 101 may also control the sense line SL to be disconnected with the reference power terminal Vref, the reset power terminal RST and the analog-to-digital conversion sub-circuit 102 when the potential of the first control signal, the potential of the second control signal and the potential of the third control signal are all second potentials, thereby floating the sense line SL, i.e., achieving a floating function for the sense line SL.
In this case, under the control of the pixel unit, a current will flow through the sense line SL, so that the potential on the sense line SL rises, Since the pixel characteristic values of the pixel unit may change at different times, the potential on this sense line SL can reflect the changes in the pixel characteristic values, such that the external compensation circuit reliably compensates the data signal according to the sense signal from the sense line SL, thereby avoiding the problem of a relatively poor display effect caused by the changes in pixel characteristic values (such as the aging of a driving transistor).
It should be noted that, in embodiments of the present disclosure, the first potential may be a valid potential, the second potential may be an invalid potential, and the first potential may be a high potential relative to the second potential.
It should also be noted that when the switching sub-circuit 101 first controls the sense line SL to be in conduction with the reference power terminal Vref, and then directly controls the sense line SL to be in conduction with the analog-to-digital conversion sub-circuit 102, the sense line SL may output a reference power signal as the sense signal to the analog-to-digital conversion sub-circuit 102, and the analog-to-digital conversion sub-circuit 102 may then convert the sense signal into a digital signal and output the digital signal to the external compensation circuit 01. Since the potential of the reference power signal is a fixed potential, the external compensation circuit 01 may determine a conversion performance of the analog-to-digital conversion sub-circuit 102 according to a conversion result of the analog-to-digital conversion sub-circuit 102 to convert the reference power signal into the digital signal. Furthermore, the external compensation circuit 01 may reliably compensate the data signal according to the conversion performance of the analog-to-digital conversion sub-circuit 102, which may also be referred to as a correction function (i.e., ADC correction function) of the external compensation circuit 01 to the analog-to-digital conversion sub-circuit 102.
The charging function, the reset function and the floating function for the sense line SL, as well as the analog-to-digital conversion function for the sense signal can be achieved in sequence when the switching sub-circuit 101 first controls the sense line SL to be in conduction with the reference power terminal Vref, then controls the sense line SL to be in conduction with the reset power terminal RST, next controls the sense line SL to be disconnected with the reference power terminal Vref, the reset power terminal RST and the analog-to-digital conversion sub-circuit 102, and controls the sense line SL to be in conduction with the analog-to-digital conversion sub-circuits 102 at last. Furthermore, the function of acquiring the sense signal of the pixel unit to which the sense line SL is connected can be achieved, so that the external compensation circuit 01 can reliably compensate the data signal according to the sense signal acquired by the sense line SL.
The detection circuit 10 can achieve the charging, reset and floating functions for the sense line SL, and the analog-to-digital conversion function for the sense signal. Therefore, under the control of the external compensation circuit 01, the detection circuit 10 may provide the external compensation circuit 01 with a signal for correcting the analog-to-digital conversion sub-circuit 102 and with a signal for performing external compensation on the pixel characteristic values of the pixel unit. The detection circuit has relatively rich functions, meets the requirements of external compensation for most functions of the detection circuit, further improves the compensation effect and ensures the display quality.
In summary, embodiments of the present disclosure provides a detection circuit. The detection circuit includes the switching sub-circuit and the analog-to-digital conversion sub-circuit. Since the switch sub-circuit may control the on-off states between the sense line SL and the reference power terminal, the reset power terminal and the analog-to-digital conversion sub-circuit according to the control signals provided by the external compensation circuit, the detection circuit has relatively rich functions.
When the switching sub-circuit sequentially controls the sense line and the reference power terminal as well as the sense line to be in conduction with the analog-to-digital conversion sub-circuit, the sense line may output a reference power signal to the analog-to-digital conversion sub-circuit through the switching sub-circuit, and correspondingly, the sense signal received by the analog-to-digital conversion sub-circuit may be the reference power signal. In this case, after the analog-to-digital conversion sub-circuit converts the sense signal into a digital signal and outputs the digital signal to the external compensation circuit, the external compensation circuit determines a conversion performance of the analog-to-digital conversion sub-circuit according to the conversion result, and reliably compensates the data signal according to the conversion performance, thereby achieving reliable compensation for the conversion performance of the analog-to-digital conversion sub-circuit.
When the switching sub-circuit sequentially controls the sense line and the reference power terminal, the reset power terminal to be in conduction with the analog-to-digital conversion sub-circuit, the sense line may output the pixel characteristic values to the analog-to-digital conversion sub-circuit through the switching sub-circuit, and correspondingly, the sense signal received by the analog-to-digital conversion sub-circuit may include the pixel characteristic values. In this case, after the analog-to-digital conversion sub-circuit converts the sense signal into a digital signal and then output the digital signal to the external compensation circuit, the external compensation circuit reliably compensates a data signal output to the pixel unit according to the received sense signal, thereby achieving reliable compensation of the pixel characteristic values. The detection circuit has relatively rich functions and ensures that the external compensation circuit has a relatively high compensation accuracy.
Referring to
Exemplarily, the switching sub-circuit 1011 may control the sense line SL to be in conduction with the reference power terminal Vref when a potential of the first control signal is a first potential, such that the reference power terminal Vref outputs a reference power signal to the sense line SL through the first switch assembly 1011 to charge the sense line SL. In addition, the first switch assembly 1011 may control the sense line SL to be disconnected with the reference power terminal Vref when the potential of the first control signal is a second potential.
The second switch assembly 1012 may be connected to the external compensation circuit 01, the sense line SL, and a reset power terminal RST, respectively. The second switch assembly 1012 may control an on-off state between the sense line SL and the reset power terminal RST in response to a second control signal.
Exemplarily, the second switch assembly 1012 may control the sense line SL to be in conduction with the reset power terminal RST when a potential of the second control signal is a first potential, such that the reset power terminal RST outputs a reset power signal to the sense line SL through the second switch assembly 1012 to reset the sense line SL, thereby making a charging potential for the sense line SL more stable and ensuring the display quality. In addition, the second switch assembly 1012 may control the sense line SL to be disconnected with the reset power terminal Vref when the potential of the second control signal is the second potential.
Optionally, in embodiments of the present disclosure, the reset power terminal RST may be a ground terminal. Of course, the reset power terminal RST may also be a power signal terminal capable of providing a power signal of the second potential.
The third switch assembly 1013 may be connected to the external compensation circuit 01, the sense line SL, and the analog-to-digital conversion sub-circuit 102, respectively. The third switch assembly 1013 may control an on-off state between the sense line SL and the analog-to-digital conversion sub-circuit 102 in response to a third control signal.
Exemplarily, the third switch assembly 1013 may control the sense line SL to be in conduction with the analog-to-digital conversion sub-circuit 102 when a potential of the third control signal is a first potential, such that the sense line SL outputs a sense signal to the analog-to-digital conversion sub-circuit 102 through the third switch assembly 1013, the analog-to-digital conversion sub-circuit 102 further converts the sense signal into a digital signal and outputs the digital signal to the external compensation circuit 01, and the external compensation circuit 01 reliably compensates the data signal according to the received sense signal. In addition, the third switch assembly 1013 may control the sense line SL to be disconnected with the analog-to-digital conversion sub-circuit 102 when the potential of the third control signal is the second potential.
Optionally, referring to
By providing the storage sub-circuit 103 to store the sense signal, a potential of the sense signal can be kept stable, and thus the sense signal can be reliably output to the analog-to-digital conversion sub-circuit 102.
A control end of the first switch K1 may be connected to the external compensation circuit (not shown in
A control end of the second switch K2 may be connected to the external compensation circuit (not shown in
A control end of the third switch K3 may be connected to the external compensation circuit (not shown in
In two of the first switches K1 included in the first switch assembly 1011, a first end of one first switch K1 may be connected to the first sub reference power terminal Vref1, and a first end of the other first switch K1 may be connected to the second sub reference power terminal Vref2.
A potential of a reference power signal provided by the first sub reference power terminal Vref1 may be different from a potential of a reference power signal provided by the second sub reference power terminal Vref2. For example, the potential of the reference power signal provided by the first sub reference power terminal Vref1 is 1V, and the potential of the reference power signal provided by the second sub reference power terminal Vref2 is 2V.
Of course, the potential of the reference power signal provided by the first sub reference power terminal Vref1 may be the same as the potential of the reference power signal provided by the second sub reference power terminal Vref2. For example, the potential of the reference power signal provided by the first sub reference power terminal Vref1 and the potential of the reference power signal provided by the second sub reference power terminal Vref2 are both 1V.
Optionally, referring to
Optionally, referring to
One end of the storage capacitor C1 may be connected to the switching sub-circuit 101 and the analog-to-digital conversion sub-circuit 102, and the other end of the storage capacitor C1 may be connected to the reset power terminal RST.
It should be noted that a capacitance value of the storage capacitor C1 may be smaller than a capacitance value of a parasitic capacitor Cs1 of the sense line SL. By setting the capacitance value of the storage capacitor C1 to be relatively small, it can be ensured that a potential of the sense signal output from the sense line SL to the analog-to-digital conversion sub-circuit 102 can remain unchanged.
Optionally, referring to
Optionally, referring to
In summary, embodiments of the present disclosure provides a detection circuit. The detection circuit includes the switching sub-circuit and the analog-to-digital conversion sub-circuit. Since the switch sub-circuit can control the on-off states between the sense line SL and the reference power terminal, the reset power terminal and the analog-to-digital conversion sub-circuit according to the control signals provided by the external compensation circuit, the detection circuit has relatively rich functions.
When the switching sub-circuit sequentially controls the sense line and the reference power terminal as well as the sense line to be in conduction with the analog-to-digital conversion sub-circuit, the sense line may output the reference power signal to the analog-to-digital conversion sub-circuit through the switching sub-circuit, and correspondingly, the sense signal received by the analog-to-digital conversion sub-circuit may be the reference power signal. In this case, after the analog-to-digital conversion sub-circuit converts the sense signal into a digital signal and outputs the digital signal to the external compensation circuit, the external compensation circuit determines a conversion performance of the analog-to-digital conversion sub-circuit according to the conversion result, and reliably compensates the data signal according to the conversion performance, thereby achieving reliable compensation for the conversion performance of the analog-to-digital conversion sub-circuit.
When the switching sub-circuit sequentially controls the sense line and the reference power terminal, the reset power terminal to be in conduction with the analog-to-digital conversion sub-circuit, the sense line may output pixel characteristic values to the analog-to-digital conversion sub-circuit through the switching sub-circuit, and correspondingly, the sense signal received by the analog-to-digital conversion sub-circuit may include the pixel characteristic values. In this case, after the analog-to-digital conversion sub-circuit converts the sense signal into a digital signal and then output the digital signal to the external compensation circuit, the external compensation circuit reliably compensates the data signal output to the pixel unit according to the received sense signal, thereby achieving reliable compensation of the pixel characteristic values. The detection circuit has rich functions and ensures that the external compensation circuit has a relatively high compensation accuracy.
In step 601, in a charging phase, in which a potential of the first control signal provided by the external compensation circuit is a first potential, the switching sub-circuit controls the sense line to be in conduction with the reference power terminal in response to the first control signal.
Exemplarily, in the charging phase, the potential of the first control signal provided by the external compensation circuit may be a first potential, and the switching sub-circuit may control the sense line to be in conduction with the reference power terminal under the control of the first control signal, such that the reference power terminal outputs a reference power signal to the sense line to charge the sense line, that is, achieving a charging function for the sense line. In addition, in the charging phase, a potential of a second control signal and a potential of the third control signal provided by the external compensation circuit may both be second potentials; and the switching sub-circuit may control the sense line to be disconnected with a reset power terminal under the control of the second control signal, and may control the sense line to be disconnected with an analog-to-digital conversion sub-circuit under the control of the third control signal. It should be noted that, in order to ensure sufficient charging of the sense line, the duration of the charging phase may be relatively long.
In step 602, in a resetting phase, in which the potential of the second control signal provided by the external compensation circuit is a first potential, the switching sub-circuit controls the sense line to be in conduction with the reset power terminal in response to the second control signal.
Exemplarily, in the resetting phase, the potential of the second control signal provided by the external compensation circuit may be the first potential, and the switching sub-circuit may control the sense line to be in conduction with the reference power terminal under the control of the second control signal, such that the reset power terminal outputs a reset power signal to the sense line to reset the sense line, that is, achieving a reset function for the sense line. In addition, in the resetting phase, the potential of the first control signal and the potential of the third control signal provided by the external compensation circuit may both be second potentials; and the switching sub-circuit may control the sense line to be disconnected with the reference power terminal under the control of the first control signal, and may control the sense line to be disconnected with the analog-to-digital conversion sub-circuit under the control of the third control signal.
In step 603, in a signal acquisition phase, in which the potential of the first control signal, the potential of the second control signal, and the potential of the third control signal provided by the external compensation circuit are all second potentials, the switching sub-circuit controls the sense line to be disconnected with the reference power terminal in response to the first control signal, controls the sense line to be disconnected with the reset power terminal in response to the second control signal, and controls the sense line to be disconnected with the analog-to-digital conversion sub-circuit in response to the third control signal.
Exemplarily, in the signal acquisition phase, the potential of the first control signal, the potential of the second control signal, and the potential of the third control signal provided by the external compensation circuit may all be the second potentials. The switching sub-circuit may respectively control the sense line to be disconnected with the reference power terminal, the reset power terminal, and the analog-to-digital conversion sub-circuit under the control of the first control signal, the second control signal, and the third control signal, such that the sense line is not connected to any end of the detection circuit, so as to achieve a floating function for the sense line.
In this case, under the control of the pixel unit, a current will flow through the sense line SL, so that the potential on the sense line SL rises. Since the pixel characteristic values of the pixel unit may change at different times, the potential on this sense line SL can reflect the changes in pixel characteristic values, such that the external compensation circuit reliably compensates a data signal according to the sense signal from the sense line SL, thereby avoiding the problem of a relatively poor display effect caused by the changes in pixel characteristic values (such as the aging of a driving transistor).
In step 604, in a signal output phase, in which the potential of the third control signal is a first potential; the switching sub-circuit controls the sense line to be conducted with the analog-to-digital conversion sub-circuit in response to the third control signal, the analog-to-digital conversion sub-circuit converts a sense signal from the sense line into a digital signal and outputs the digital signal to the external compensation circuit, such that the external compensation circuit compensates a data signal according to the sense signal.
Exemplarily, in the signal output phase, the potential of the third control signal provided by the external compensation circuit may be the first potential, and the switching sub-circuit may control the sense line to be in conduction with the analog-to-digital conversion sub-circuit under the control of the third control signal, such that the sense line outputs a sense signal to the analog-to-digital conversion sub-circuit through the switching sub-circuit. The sense signal may include pixel characteristic values of the pixel unit. The analog-to-digital conversion sub-circuit may convert the received sense signal into a digital signal and then output the digital signal to the external compensation circuit, such that the external compensation circuit reliably compensates a data signal according to the received sense signal. In addition, in the signal output phase, the potential of the first control signal and the potential of the second control signal provided by the external compensation circuit may both be the second potentials; and the switching sub-circuit may control the sense line to be disconnected with the reference power terminal under the control of the first control signal, and may control the sense line to be disconnected with the reference power terminal under the control of the second control signal.
It should be noted that after step 601 is executed, step 604 is executed directly. The sense signal output by the sense line to the analog-to-digital conversion sub-circuit through the switching sub-circuit may be a reference power signal. In this case, when the analog-to-digital conversion sub-circuit converts the reference power signal into a digital signal and outputs the digital signal to the external compensation circuit, such that the external compensation circuit determines a conversion performance of the analog-to-digital conversion sub-circuit according to the received sense signal, and further reliably compensates the data signal according to the conversion performance of the analog-to-digital conversion sub-circuit. This function may also be referred to as a correction function for the analog-to-digital conversion sub-circuit.
In summary, embodiments of the present disclosure provides a driving method of the detection circuit. Since the switch sub-circuit can control on-off states between the sense line and the reference power terminal, the reset power terminal and the analog-to-digital conversion sub-circuit according to the control signals provided by the external compensation circuit, the detection circuit has relatively rich functions.
When the switching sub-circuit sequentially controls the sense line and the reference power terminal as well as the sense line to be in conduction with the analog-to-digital conversion sub-circuit, the sense line may output the reference power signal to the analog-to-digital conversion sub-circuit through the switching sub-circuit, and correspondingly, the sense signal received by the analog-to-digital conversion sub-circuit may be the reference power signal. In this case, after the analog-to-digital conversion sub-circuit converts the sense signal into a digital signal and outputs the digital signal to the external compensation circuit, the external compensation circuit determines a conversion performance of the analog-to-digital conversion sub-circuit according to the conversion result, and reliably compensates the data signal according to the conversion performance, thereby achieving reliable compensation for the conversion performance of the analog-to-digital conversion sub-circuit.
When the switching sub-circuit sequentially controls the sense line and the reference power terminal, the reset power terminal to be in conduction with the analog-to-digital conversion sub-circuit, the sense line may output pixel characteristic values to the analog-to-digital conversion sub-circuit through the switching sub-circuit, and correspondingly, the sense signal received by the analog-to-digital conversion sub-circuit may include the pixel characteristic values. In this case, after the analog-to-digital conversion sub-circuit converts the sense signal into a digital signal and then output the digital signal to the external compensation circuit, the external compensation circuit reliably compensates a data signal output to the pixel unit according to the received sense signal, thereby achieving reliable compensation for the pixel characteristic values. The detection circuit has relatively rich functions and ensures that external compensation circuit has a relatively high compensation accuracy.
As an optional implementation, a driving principle of the detection circuit provided by this embodiment of the present disclosure will be described in detail by taking a pixel unit shown in
In addition, as can be seen from
In a resetting phase t2, the potential of the first control signal Con1 and the potential of the third control signal Con3 are both the second potentials, the potential of the second control signal Con2 is a first potential, the second switch K2 is turned on, and the first switch K1 and the third switch K3 are turned off. A reset power terminal RST outputs a reset power signal from the reset power terminal RST to the sense line SL through the second switch K2. A potential of the reset power signal may be the second potential, so as to realize the reset of the sense line SL, release charges stored on the sense line SL, and prepare for the next phase of signal acquisition.
In a signal acquisition phase t3, the potential of the first control signal Con1, the potential of the second control signal Con2, and the potential of the third control signal Con3 are all the second potentials, and the first switch K1, the second switch K2, and the third switch K3 are all turned off. The sense line SL is disconnected with the reference power terminal Vref, the reset power terminal RST, and the analog-to-digital conversion sub-circuit 102, such that the detection circuit 10 achieves a floating function for the sense line SL.
In this case, under the control of a pixel unit, a current will flow through the sense line SL, so that the potential on the sense line SL gradually rises. For example, referring to
In a signal output phase t4, the potential of the first control signal Con1 and the potential of the second control signal Con2 are both the second potentials, and the potential of the third control signal Con3 is a first potential. The third switch K3 is turned on, and the first switch K1 and the second switch K2 are turned off. The sense line SL may output a sense signal to the analog-to-digital converter ADC through the third switch K3, and a storage capacitor C1 may store the sense signal. In addition, C1 may be much smaller than a parasitic capacitance Cs1 of the sense line SL, thereby ensuring that the sense signal may be kept basically unchanged when it is transmitted to the analog-to-digital converter ADC. Next, the analog-to-digital converter ADC may convert the acquired sense signal into a digital signal and then output the digital signal to the external compensation circuit 01, so that the external compensation circuit 01 reliably compensates a data signal according to the sense signal.
Optionally, referring to
It should be noted that, referring to
Referring to
Optionally,
After the signal output phase t4 is performed, the sense line SL may output a reference power signal as a sense signal to the analog-to-digital converter. The analog-to-digital converter may convert the reference power signal into a digital signal and output the digital signal to the external compensation circuit. Therefore, the external compensation circuit determines a conversion performance of the analog-to-digital converter according to the conversion result of the analog-to-digital converter, and performs targeted and reliable compensation on a data signal according to the determined conversion performance of the analog-to-digital converter, thereby achieving a correction function for the analog-to-digital converter.
It should be noted that, for the timing diagrams of
As another optional implementation, a driving principle of the detection circuit provided by this embodiment of the present disclosure will be described in detail by taking a pixel unit shown in
In a resetting phase t2, the potential of the first control signal and the potential of the third control signal are both the second potentials, the potential of the second control signal is a first potential, the second switch K2 is turned on, and the first switch K1 and the third switch K3 are turned off. A reset power terminal RST outputs a reset power signal from the reset power terminal RST to the sense line SL through the second switch K2, so as to realize the reset of the sense line SL.
In a signal acquisition phase t3, the potential of the first control signal, the potential of the second control signal, and the potential of the third control signal are all the second potentials, and the first switch K1, the second switch K2, and the third switch K3 are all turned off. The sense line SL is disconnected with the first sub reference power terminal Vref1, the second sub reference power terminal Vref2, the reset power terminal RST, and the analog-to-digital conversion sub-circuit 102. That is, the detection circuit 10 may enter the floating function. In this case, under the control of the pixel units, a current will flow through the sense line SL. Referring to
In a signal output phase t4, the potential of the first control signal and the potential of the second control signal are both the second potentials, and the potential of the third control signal is a first potential. The third switch K3 is turned on, and two of the first switches K1 and the second switch K2 are turned off. The sense line SL may output a sense signal to the analog-to-digital converter ADC through the third switch K3, and a storage capacitor C1 may store the sense signal. In addition, C1 may be smaller than Cs1. Next, the analog-to-digital converter ADC may convert the acquired sense signal into a digital signal and then output the digital signal to the external compensation circuit 01, so that the external compensation circuit reliably compensates a data signal according to the sense signal.
Optionally,
It should be noted that when the correction function is achieved for the analog-to-digital converter, referring to
In summary, embodiments of the present disclosure provides a driving method of the detection circuit. Since the switch sub-circuit can control the on-off states between the sense line SL and the reference power terminal, the reset power terminal and the analog-to-digital conversion sub-circuit according to the control signals provided by the external compensation circuit, the detection circuit has relatively rich functions.
When the switching sub-circuit sequentially controls the sense line and the reference power terminal as well as the sense line to be in conduction with the analog-to-digital conversion sub-circuit, the sense line may output a reference power signal to the analog-to-digital conversion sub-circuit through the switching sub-circuit, and correspondingly, the sense signal received by the analog-to-digital conversion sub-circuit may be the reference power signal. In this case, after the analog-to-digital conversion sub-circuit converts the sense signal into a digital signal and outputs the digital signal to the external compensation circuit, the external compensation circuit determines a conversion performance of the analog-to-digital conversion sub-circuit according to the conversion result, and reliably compensates the data signal according to the conversion performance, thereby achieving reliable compensation for the conversion performance of the analog-to-digital conversion sub-circuit.
When the switching sub-circuit sequentially controls the sense line and the reference power terminal, the reset power terminal to be in conduction with the analog-to-digital conversion sub-circuit, the sense line may output pixel characteristic values to the analog-to-digital conversion sub-circuit through the switching sub-circuit, and correspondingly, the sense signal received by the analog-to-digital conversion sub-circuit may include the pixel characteristic values. In this case, after the analog-to-digital conversion sub-circuit converts the sense signal into a digital signal and then output the digital signal to the external compensation circuit, the external compensation circuit reliably compensates a data signal output to the pixel unit according to the received sense signal, thereby achieving reliable compensation for the pixel characteristic values. The detection circuit has relatively rich functions and ensures that the external compensation circuit has a relatively high compensation accuracy.
Optionally, the source driving circuit may include a plurality of detection circuits 10, wherein at least two of the plurality of detection circuits 10 may multiplex one analog-to-digital conversion sub-circuit 102.
Exemplarily, referring to
It should be noted that, it is assumed that the plurality of detection circuits 10 is divided into a plurality of groups, each group including at least two detection circuits 10. Each group of detection circuits may multiplex the same analog-to-digital conversion sub-circuit 102, and the detection circuits in different groups may multiplex different analog-to-digital conversion sub-circuits 102. Alternatively, the detection circuits in different groups may multiplex the same analog-to-digital conversion sub-circuit 102.
Since the analog-to-digital conversion sub-circuit 102 is only used to achieve the function of converting an analog signal into a digital signal, and each switch sub-circuit 101 may be controlled independently, the structure of the source driving circuit can be simplified in the case of ensuring the compensation effect by multiplexing one analog-to-digital conversion sub-circuit 102.
It should be noted that the detection circuit 10 may be integrated in the source driving circuit, or may be provided independently of the source driving circuit, and connected to the source driving circuit through a signal line.
The source driving circuit 02 may output a sense signal (Sdata) sensed through a sense line to an external compensation circuit 01. The external compensation circuit 01 may compensate a data signal according to the sense signal, and may output the compensated data signal DATA to the source driving circuit 02. The source driving circuit 02 may further be used to output the compensated data signal to a pixel unit through a data line.
Optionally,
Optionally, referring to
The first storage circuit 03 may be used to provide a data signal to the external compensation circuit 01, and the second storage circuit 04 may be used to provide pixel compensation values to the external compensation circuit 01.
The pixel compensation values refer to pixel characteristic values (such as a threshold voltage and an offset rate of a driving transistor) of a pixel unit most recently acquired through the sense line SL. Optionally, if each pixel unit includes three sub-pixel units of red, green, and blue, as shown in
Optionally, referring to
Referring to
Referring to
Optionally, as can be seen with reference to
Optionally, referring to
Optionally,
In the embodiment of the present invention, referring to
Optionally, the display apparatus may be any product or component having a display function, such as a liquid crystal display panel, an electronic paper, an OLED panel, an AMOLED panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, or the like.
A person skilled in the art may clearly understand that, for the convenience and brevity of the description, as to the specific working process of the foregoing detection circuit, sub-circuits, assemblies, source driving circuit, driving apparatus and display apparatus, please refer to the corresponding process in the foregoing method embodiment, and details are not described herein again.
The foregoing descriptions are merely optional embodiments of the present disclosure, and are not intended to limit the present disclosure. Within the spirit and principles of the present disclosure, any modifications, equivalent substitutions, improvements, etc., are within the protection scope of the present disclosure.
This application is a 371 of PCT Application No. PCT/CN2019/102908 filed on Aug. 27, 2019, the entire contents of which are incorporated herein by reference.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/CN2019/102908 | 8/27/2019 | WO | 00 |
