Determining storage device connection information for serial and parallel computer interfaces to storage devices

Information

  • Patent Application
  • 20070234027
  • Publication Number
    20070234027
  • Date Filed
    February 02, 2007
    17 years ago
  • Date Published
    October 04, 2007
    16 years ago
Abstract
Computer systems and related methods are provided for managing connections to storage devices. The computer system includes a connector and a register. The connector includes a plurality of pins configured to be removably connected to a first storage device and to a second storage device. A first pin of the connector carries a signal that indicates when the connector is connected to the first storage device, and a second pin carries a signal that indicates when the connector is connected to the second storage device. The register stores connection information that indicates whether the first storage device and/or the second storage device are connected to the connector.
Description

BRIEF DESCRIPTION OF THE FIGURES

The accompanying figures are included to provide a further understanding of the present invention, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present invention and, together with the description, serve to explain principles of the present invention. In the figures:



FIG. 1 is a block diagram of a computer system according to some embodiments of the present invention;



FIG. 2 is a flowchart illustrating methods for starting a computer system using a BIOS code stored in a BIOS ROM; and



FIG. 3 is a flowchart illustrating methods for starting a computer system using a BIOS code when the BIOS code stored in a BIOS ROM includes a boot file search code.


Claims
  • 1. A computer system comprising: at least one connector comprising a plurality of pins configured to be removably connected to a first storage device and to a second storage device, wherein a first pin of the connector carries a signal that indicates when the connector is connected to the first storage device, and a second pin of the connector carries a signal that indicates when the connector is connected to the second storage device; anda register that stores connection information that indicates whether the first storage device and/or the second storage device are connected to the connector.
  • 2. The computer system of claim 1, further comprising: a basic input/output system (BIOS) ROM storing a BIOS code;a complementary metal oxide semiconductor (CMOS) RAM storing user-definable device information that indicates whether the first storage device and/or the second storage device are connected to the connector; anda processor configured to carry out a power-on self-test (POST) according to the BIOS code in the BIOS ROM, and to store the connection information, indicating whether the first storage device and/or the second storage device are connected to the connector, from the register into the CMOS RAM when the user-definable connection information for the first storage device and/or the second storage device is different from the connection information in the register.
  • 3. The computer system of claim 2, wherein the connector is configured to connect to a parallel-advanced technology attachment (ATA) first storage device, and the connector is configured to connect to a serial-ATA second storage device.
  • 4. The computer system of claim 3, further comprising: a south bridge including a parallel-ATA controller configured to connect to the parallel-ATA first storage device through the connector, and a serial-ATA controller configured to connect to the serial-ATA second storage device through the connector; anda north bridge that interconnects the south bridge to the processor.
  • 5. The computer system of claim 4, wherein the register is disposed in the south bridge.
  • 6. The computer system of claim 4, further comprising a clock generator that generates a first clock supplied to the parallel-ATA controller and a second clock supplied to the serial-ATA controller.
  • 7. The computer system of claim 6, wherein the processor controls the clock generator to selectively provide the first clock to the parallel-ATA controller in response to whether the connection information in the register indicates that the parallel-ATA storage device is connected to the connector, and controls the clock generator to selectively provide the second clock to the serial-ATA controller in response to whether the connection information in the register indicates that the serial-ATA storage device is connected to the connector.
  • 8. The computer system of claim 3, wherein the connection information in the register indicates that one of the parallel-ATA storage device and the serial-ATA storage device, which are connected to the connector, is a master device and the other one is a slave device.
  • 9. The computer system of claim 8, wherein the BIOS ROM further comprises a boot file search program, and the processor executes the boot file search program to search the parallel-ATA storage device and/or the serial-ATA storage device for a boot file, and identifies as the master device in the user-definable connection information in the CMOS RAM one of the parallel-ATA storage device and the serial-ATA storage device that is found to contain the boot file.
  • 10. A method for operating a computer system having a CMOS RAM and at least one connector that is connectable to a first storage device and to a second storage device, the method comprising: determining whether the first storage device and/or the second storage device are connected to the connector and generating first connection information indicative thereof;performing a power-on-self-test (POST) to determine whether user-definable connection information in the CMOS RAM, which indicates whether the first storage device and/or the second storage device is connected to the connector, agrees with the determined first connection information for the first and second storage devices; andwriting the determined first connection information for the first storage device and/or the second storage device to the CMOS RAM when the determined first connection information does not agree with the user-definable connection information in the CMOS RAM.
  • 11. The method of claim 10, wherein the computer system comprises: a first controller configured to connect to the first storage device through the connector;a second controller configured to connect to the second storage device through the connector; anda clock generator that generates a first clock supplied to the first controller and a second clock supplied to the second controller, and the method further comprising:controlling the clock generator to selectively provide the first clock to the first controller in response to whether the connection information in the CMOS RAM indicates that the first storage device is connected to the connector; andcontrolling the clock generator to selectively provide the second clock to the second controller in response to whether the connection information in the CMOS RAM indicates that the second storage device is connected to the connector.
  • 12. The method of claim 10, further comprising initializing the first storage device when the connection information in the CMOS RAM indicates that the first storage device is connected to the connector, and initializing the second storage device when the connection information in the CMOS RAM indicates that the second storage device is connected to the connector.
  • 13. The method of claim 10, further comprising: searching for a boot file in the first and second storage devices when the connection information in the CMOS RAM indicates that the first and second storage devices are connected to the connector; andwriting information into the CMOS RAM that indicates which of the first and second storage devices is a master device in response to which of the first and second storage devices is found to contain the boot file.
  • 14. The method of claim 13, further comprising writing information in the CMOS RAM that indicates that one of the first and second storage devices which is found to not contain the boot file is a slave device.
  • 15. The method of claim 10, further comprising, when the determined first connection information indicates that only one of the first and second storage devices is connected to the connector, writing information into the CMOS RAM that indicates that the connected one of the first and second storage devices is a master device.
  • 16. The method of claim 10, further comprising initiating at least a portion of an operation system by calling boot sector code in a boot file located in a connected one of the first and second storage devices.
Priority Claims (1)
Number Date Country Kind
2006-15823 Feb 2006 KR national