1. Field of the Invention
The present invention relates to a display device using a light emitting element and belongs to a technical field of a large-sized display device having high resolution.
2. Description of the Related Art
Recently, a display device for displaying an image has been more and more important. At present, a liquid crystal display device that displays an image using a liquid crystal element is widely used, taking advantages of high-definition, thinness and lightness in weight. Further, a display device (a light emitting device) using a light emitting element such as organic light emitting diode (OLED) has being developed as another display device. The light emitting device using OLED (OLED display device) draws keen attention because the light emitting device has advantages such as a high response speed, superior moving image display and a wide viewing characteristic in addition to the advantages of existing liquid crystal display devices. An OLED adopted in the light emitting device as a typical light emitting element has a structure which includes a single thin film or a laminated thin film between a conductive anode and a conductive cathode. Organic materials are included in a part of or all layers of the thin film. It is usual that the luminance of the organic light emitting diode is in directly proportion to the current value thereof.
Hereinafter, a light emitting device has a light emitting element (e.g. OLED) and a plurality of pixels having at least two transistors arranged in a matrix pattern. A transistor that serially connects to a light emitting element and controls the luminance thereof in pixels is referred to as a driving transistor. A video signal of current or voltage value type is used to control pixels. When the video signal of voltage value type is used, a signal voltage is generally input to a gate electrode of a driving transistor to control the luminance of a light emitting element using the driving transistor. When the video signal of current value type is used, a light emitting device is provided with a current equivalent to a predetermined current value type from a driving transistor to control the luminance of the light emitting element. Whether the video signal is of current value type or voltage value type, there are two cases: a case where an analog value signal is used (hereinafter, referred to as an analog driving) and a case where a digital value signal is used (hereinafter, referred to as a digital driving). When the digital driving is performed, the digital driving can be combined with a time-division driving by which intermediate gray scale is displayed using a time ratio (e.g. Japanese Patent Laid-Open No. 2001-5426) or an area-division driving by which intermediate gray scale is displayed using an area ratio (e.g. Japanese Patent Laid-Open No. 2002-278478). The response speed of OLED is higher than that of a liquid crystal or the like, therefore OLED is suitable for the time-division driving in case of the digital driving.
Here are described schematically a pixel portion and a driver circuit of a display device operating conventional matrix display with reference to
When the frequency of a frame is constant, one horizontal scanning period become shorter with raising resolution of a pixel portion. For example, when the frequency of a frame is 60 Hz and the number of pixels is SXGA standard (1280×1024), one horizontal scanning period is about 16 μsec. At this time, it is difficult to obtain the period to write a video signal in a pixel. In particular, this trend is noticeable for a large-sized display whose parasitic capacitance is large.
Here are specific examples described. Firstly, a digital time-division gray scale is described, whether a video signal is of current value type or voltage value type. When one frame is divided to about 15 sub frames to perform the time-division driving, one horizontal scanning period in case that the number of pixels is SXGA standard (1280×1024) is typically 1 μsec. or less, therefore the period to write in is insufficient.
Next, an analog driving using a video signal of current value type is described here. In displaying low luminescent gray scale whose video signal current applied to an light emitting element is low, the speed to write in is sluggish and therefore the period to write in is insufficient in practical.
The present invention has been made in view of the above problems. It is an object of the present invention to provide a display device and its driving method free from lack of writing time, which usually accompanies an increase in size of a display device and enhancement in definition. More particularly, a further object of the present invention is to provide a display device and its driving method free from lack of writing time, which is prominent when a current value type signal is used in digital time-division driving or in analog driving.
In order to attain the above object, the present invention provides a display device and its driving method in which x (x is a natural number equal to or larger than 4) data lines are placed in each column to simultaneously supply video signals to x pixels through the x data lines. The present invention makes it possible to supply video signals to x pixels simultaneously as opposed to conventional dot sequential driving where a signal is supplied to one pixel at a time. Furthermore, a display device of the present invention and its driving method make it possible to supply video signals to (x×n) pixels at once as opposed to conventional linear sequential driving where only n pixels in the first to last (here, the last column is the n-th column) columns receive signals simultaneously. Thus the present invention can make the speed of writing video signals in pixels x times faster than prior art.
According to the present invention, there is provided a display device including:
a plurality of data lines in a column direction;
a plurality of scanning lines in a row direction; and
a plurality of pixels arranged into a matrix pattern, the pixels each having a light emitting element (typically, an organic light emitting diode (OLED)),
in which x data lines (x is a natural number equal to or larger than 4) out of the plural data lines are placed in each column.
The present invention is also applicable to the case where an upper data driver and a lower data driver are provided to write video signals in pixels while operating pixels in the upper half of the screen and pixels in the lower half of the screen separately (hereinafter referred to as horizontally-split driving). With the upper half and the lower half combined, the number of data lines in each column can be set to (2×x) (x is a natural number equal to or larger than 2).
Having the above structure, the present invention provides a display device and its driving method free from lack of writing time, which usually accompanies an increase in size of a display device and enhancement in definition. Specifically, the present invention provides a display device and its driving method free from lack of writing time, which is prominent when a current value type signal is used in digital time-division driving or in analog driving.
In the accompanying drawings:
The present invention is described with reference to
The description given first with reference to
This mode is premised on horizontally-split driving but it is not a requisite in carrying out the present invention. However, combined with horizontally-split driving, the present invention can provide more time for writing video signals in pixels.
The data drivers A to D and the scanning drivers F1 to I1 and F2 to I2 receive external signals through FPCs 12. These drivers may be formed on the substrate 11 or may be external to the substrate 11 and formed in a separate IC. The number of the drivers is not particularly limited and can be set in accordance with the pixel structure and the like. Preferably, the number of data drivers matches the number of data lines per column. Although the pixel portion E here is divided into four regions, E-1 to E-4, the present invention is not limited thereto. The pixel portion can be divided into any number of regions.
Note that the term display device includes a panel in which a pixel portion having light emitting elements and driver circuits are sealed between a substrate and a cover member, a module obtained by mounting an IC or the like to the panel, a display used as a monitor for a personal computer, etc. In short, ‘display device’ is a generic term for such panels, modules, displays, and the like.
Four structural examples of the pixel portion E are given here, and a first structure is described with reference to
The scanning drivers F1 to I1 are placed to the left of the screen whereas the scanning drivers F2 to I2 are placed to the right of the screen. The pixel E-1 is selected by the scanning drivers F1 and F2 from both the left and right sides of the screen. The rest of the pixels, E-2 to E-4, are selected in a similar way.
It is not always necessary to place a scanning driver on each side of the screen. However, putting a scanning driver on each side of the screen increases the pixel selecting speed, compared with the case where a scanning driver is placed on only one side of the screen. It is therefore preferable to place a scanning driver on each side of the screen in particular in a display device that has great load because of its large screen and high resolution.
Having the above structure, the present invention can solve the problem of lack of writing time due to large parasitic capacitance of a wire, which is prominent in a large screen display device.
Now, assume that (i×j) pixels are arranged in the upper half of the pixel portion E while the lower half of the pixel portion E has (n×m) pixels. Then the four pixels E-1 to E-4 are arranged to have coordinates (i, j−1), (i, j), (n, m−1), and (n, m), respectively, and their structure is described with reference to
The four pixels in
In
A second structure is described with reference to
The four pixels E-1 to E-4 are arranged to have coordinates (i, j), to (i, j+3) respectively, and an example of their structure is described with reference to
A third structure is described with reference to
The data line controlled by the data driver A is denoted by SA. The data line controlled by the data driver B is denoted by SB. The data line controlled by the data driver C is denoted by SC. The data line controlled by the data driver D is denoted by SD. In the same manner as in the first and second modes, the pixel connected to the data line SA is denoted by E-1. The pixel connected to the data line SB is denoted by E-2. The pixel connected to the data line SC is denoted by E-3. The pixel connected to the data line SD is denoted by E-4. This means that the pixel E-1, the pixel E-2, the pixel E-3, and the pixel E-4 are controlled by the data driver A, the data driver B, the data driver C, and the data driver D, respectively.
The structure of the pixels E-1 to E-4 is described with reference to
A fourth structure is described with reference to
The structure of the pixels E-1 to E-4 is described with reference to
The descriptions given next with reference to
In the first structure shown in
In the second and fourth structures shown in
In the third structure shown in
Next, an example of the structure of the data drivers will be described. The description takes the data driver A as an example and reference is made to
For dot sequential driving, the data drivers A-1 to A-8 are each provided with shift registers SR1 to SR40 and sampling circuits SMP1 to SMP40. For linear sequential driving, the data drivers A-1 to A-8 are each provided with shift registers SR1 to SR40, first latches L1-1 to L1-40, and second latches L2-1 to L2-40. When the number of pixels is on the SXGA level, (4×RGB) data lines are connected to each of SMP1 to SMP40.
Now, the operation of the data driver in
Next, a brief description is given on the operation of the data driver of
When the pixel number is on the SXGA level and 15 sub-frames are provided in time-division driving as in this embodiment mode, one horizontal scanning period can be 4 μsec or longer with the data driver clock frequency set to 5 MHz and it is fully fit for practical use.
The description given next with reference to
Having the above structure, the present invention provides a display device and its driving method free from lack of writing time, which usually accompanies an increase in size of a display device and enhancement in definition. Specifically, the present invention provides a display device and its driving method free from lack of writing time, which is prominent when a current value type signal is used in digital time-division driving or in analog driving.
Referring to
In
In
In
In
In
In each of the pixels shown in
Described next is a pixel that has a current supply 312 therein, so that a given amount of current is supplied to the light emitting element 308 from the current supply 312 as shown in
In
In
In
The transistors placed in the pixel can have, in addition to a single gate structure which has one gate electrode, a multi-gate structure such as a double gate structure with two gate electrodes or a triple gate structure with three gate electrodes. In addition, the transistors can either have a top gate structure in which a gate electrode is placed above a semiconductor or a bottom gate structure in which a gate electrode is placed below a semiconductor. In the pixels of
The power supply line Vi may be shared by adjacent pixels: there is no need to provide a power supply line in each column, and adjacent columns can share one power supply line. Since plural signals lines are placed in one column in the present invention, sharing a power supply line between adjacent columns is effective in improving the aperture ratio.
However, in a display device conducting color display, respective pixels corresponding to respective colors of RGB may differ in their luminances, even if the same voltage is applied to them, because of differences in current densities among the respective RGB materials or differences in transmittances among color filters. Therefore, in this case, power supply lines corresponding to the respective colors are provided so that the electric potentials for the respective colors can be set separately. It should be note that, in the present invention, a set of RGB is not called one pixel, but each of the R, G, and B is called one pixel.
Next, a description of the operation when time-division driving is applied to a display device of the present invention is given with reference to
In time-division driving, one frame period is divided into plural sub-frame periods SF. Each of the sub-frame periods SF has a writing period Ta and a display period Ts, or a writing period Ta, a display period Ts, and an erasure period Te.
Only some of the sub-frame periods SF where a display period Ts is shorter than a writing period Ta can have an erasure period Te. This is to prevent the next writing period Ta from starting immediately after the display period Ts is ended. If the next writing period Ta is started immediately after completion of the display period Ts, two scanning lines are simultaneously selected, which makes it impossible to input a correct signal to a pixel from a signal line.
In time-division driving, the sub-frame periods SF are different from one another in length of light emission period, and gray scale display is obtained by choosing light emission or non-light emission for each of the sub-frame periods SF and by varying the combination. In the example shown in
A description is given on a pixel operation in the above writing period Ta, display period Ts, and erasure period Te taking the pixel of
First, in the writing period Ta, a pulse is inputted to the scanning line Gj to set the scanning line Gj to the H level and turn the switching transistor 306 ON. This enables the gate electrode of the driving transistor 307 to receive a digital video signal that has been outputted to the signal line Si.
Next, in the display period Ts, the driving transistor 307 is turned ON and the electric potential difference between the power supply line Vi and the power supply line Cj causes a current to flow into the light emitting element 308. Receiving the current, the light emitting element 308 emits light. If the driving transistor 307 remains turned OFF during the display period Ts, no current flows into the light emitting element 308 and the light emitting element 308 does not emit light.
Then, in the following erasure period Te, a pulse is inputted to the scanning line Rj to set the scanning line Rj to the H level and turn the erasing transistor 309 ON. As the erasing transistor 309 is turned ON, the gate-source voltage of the driving transistor 307 is set to zero to turn the driving transistor 307 OFF. This cuts the current supply to the light emitting element 308 and the light emitting element 308 stops emitting light. The erasure period Te is provided in the sub-frame period SF5 alone. This is because the sub-frame period SF5 has the display period Ts5, which is shorter than the writing period Ta5, and it is necessary to prevent the next writing period from starting immediately after completion of the display period Ts5.
The sub-frame periods SF1 to SF5 are started in this order in the timing charts of
Having the above structure, the present invention provides a display device and its driving method free from lack of writing time, which usually accompanies an increase in size of a display device and enhancement in definition. Specifically, the present invention provides a display device and its driving method free from lack of writing time, which is prominent when a current value type signal is used in digital time-division driving or in analog driving.
This embodiment mode can be combined with Embodiment Mode 1 arbitrarily.
This embodiment mode gives a description on a top view in
In
The switching TFT serves as a double gate transistor. However, the present invention is not limited thereto and the switching TFT may be a single gate transistor or a multi-gate transistor having three or more gate electrodes. In the drawing, the capacitor as a measure to hold the gate-source voltage of the driving TFT is formed from a power supply line, a metal body formed from the same film as the gate electrode, and an insulator placed between the supply line and the metal body. It is unnecessary to provide another capacitor therein when the gate-source voltage of the driving TFT can be held by the gate capacitance and channel capacitance of the driving TFT itself, or by parasitic capacitance of a wire or others.
This embodiment mode can be combined with Embodiment Mode 1 or 2 arbitrarily.
Electronic appliances to which the present invention is applied include, for example, video cameras, digital cameras, goggle type displays (head mount displays), navigation systems, audio reproducing devices (such as car audio and audio components), laptop personal computers, game machines, mobile information terminals (such as mobile computers, mobile phones, portable game machines, and electronic books), and image reproducing devices provided with a recording medium (specifically, devices for reproducing a recording medium such as a digital versatile disc (DVD), which includes a display capable of displaying images). Practical examples thereof are shown in
Here,
When light emission with the high luminance can be realized in the future due to the development of light emitting materials, the light emitting device will be able to be applied to a front or rear type projector for magnifying and projecting outputted light containing image information by a lens or the like.
Cases are increasing in which the above-described electronic appliances display information distributed via electronic communication lines such as the Internet and CATVs (cable TVs). Particularly, cases where moving picture information is displayed are increasing. Since the response speed of the light emitting materials is very high, the light emitting device is preferably used for moving picture display.
Since the light emitting device consumes power in a light emitting portion, information is desirably displayed so that the light emitting portions are reduced as much as possible. Thus, in the case where the light emitting device is used for a display portion of a mobile information terminal, particularly, a mobile phone, an audio playback device, or the like, which primarily displays character information, it is preferable that the character information be formed in the light emitting portions with the non-light emitting portions being used as the background.
As described above, the application range of the present invention is very wide, so that the invention can be used for electronic appliances in all of fields. The electronic appliances according to this embodiment mode may use the structure of the light emitting device according to any one of Embodiment Modes 1 to 3.
The electronic appliances shown in Embodiment Mode 4 have a module, mounting an IC including a controller, a power supply circuit and the like, mounted on a panel in a state sealed with the light emitting elements. Both the module and the panel correspond to one mode of a display device. Here, explanation is made on a concrete configuration of the module.
Meanwhile, a printed board 806 is provided with a controller 801 and a power supply circuit 802. The various signals and power supply voltage outputted from the controller 801 or power supply circuit 802 are supplied to the pixel portion 803, the scanning-line driver circuit 804 and the signal-line driver circuit 805 in the panel 800 through an FPC 807.
The power supply voltage and various signals to the printed board 806 are supplied through an interface (I/F) section 808 arranged with a plurality of input terminals.
Incidentally, although, in this embodiment mode, the printed board 806 is mounted on the panel 800 by the use of the FPC, the present invention is not limited to this structure. The COG (chip on glass) method may be used to directly mount the controller 801 and power supply circuit 802 on the panel 800.
Also, on the printed board 806, there is a case that noise be involved in the power supply voltage or signal, or signal rise be blunted, due to the capacitances formed between the lead wirings and the resistances possessed by the wirings themselves. Consequently, various elements such as capacitors and buffers may be provided on the printed board 806, to prevent noise from being involved in the power supply voltage or signal or to prevent signal rise from being blunted.
The controller 801 has an analog interface circuit 809, a phase-locked loop (PLL) 810, a control-signal generating portion 811 and SRAMs (static random access memories) 812, 813. Although SRAMs are used in this embodiment mode, it is possible to use SDRAMs or, DRAMs (dynamic random access memories) if it is possible to write in data or read out data at high speed, in place of the SRAMs.
The analog video signal supplied through the interface 808 is A/D-converted and parallel-serial converted in the analog interface circuit 809, thus being inputted as a digital video signal corresponding to the colors of R, G and B to the control-signal generating portion 811. Also, on the basis of the various signals supplied through the interface 808, an Hsync signal, a Vsync signal, a clock signal CLK and the like are generated in the analog interface circuit 809 and inputted to the control signal generating circuit 811. When the digital video signal is directly inputted to the interface 808, there is no need to arrange the analog interface circuit 809.
The phase-locked loop 810 has a function to synchronize the phase of the frequency of various signals supplied through the interface 808 with the phase of the operating frequency of the control-signal generating portion 811. The operating frequency of the control-signal generating portion 811 is not necessarily the same as the frequency of the various signals supplied through the interface 808, but adjust, in the phase-locked loop 810, the operating frequency of the control-signal generating portion 811 in a manner of synchronization with one another.
The video signal inputted to the control-signal generating portion 811 is once written into and held on the SRAM 812, 813. The control-signal generating portion 811 reads out, bit by bit, the video signals corresponding to all the pixels from among all the bits of video signals held on the SRAM 812, and supplies them to the signal-line driver circuit 805 in the panel 800.
The control-signal generating portion 811 supplies the information concerning a period during which the light emitting element of each bit causes light emission, to the scanning-line driver circuit 804 in the panel 800.
The power supply circuit 802 supplies a predetermined power supply voltage to the signal-line driver circuit 805, scanning-line driver circuit 804 and pixel portion 803 in the panel.
Explanation is now made on the configuration of the power supply circuit 802 with reference to
Generally, the switching regulator, small in size and light in weight as compared to the series regulator, can raise voltage and invert polarities besides voltage reduction. On the other hand, the series regulator, used only in voltage reduction, has a well output voltage accuracy as compared to the switching regulator, hardly causing ripples or noises. The power supply circuit 802 of this embodiment mode uses a combination of the both.
The switching regulator 854 shown in
When a voltage of an external Li-ion battery (3.6 V) or the like is transformed in the switching regulator 854, generated are a power supply voltage to be supplied to a cathode and a power supply voltage to be supplied to the switching regulator 854.
The series regulator 855 has a band-gap circuit (BG) 870, an amplifier 871, operational amplifiers 872, a current source 873, a varistor 874 and a bipolar transistor 875, and is supplied with a power supply voltage generated at the switching regulator 854.
In the series regulator 855, a power supply voltage generated by the switching regulator 854 is used to generate a direct current power supply voltage to be supplied to a wiring (current supply line) for supplying current to the anodes of various-color of light emitting elements depending upon a constant voltage generated by the band-gap circuit 870.
Incidentally, the current source 873 is used for a driving method to write video signal current to the pixel. In this case, the current generated by the current source 873 is supplied to the signal-line driver circuit 805 in the panel 800. In the case of a driving method to write the video signal voltage to the pixel, the current source 873 need not necessarily be provided.
The present invention provides a display device and its driving method in which x (x is a natural number equal to or larger than 4) data lines are arranged in each column to simultaneously supply signals to x pixels through each of the x data lines. Further, the present invention makes it possible to simultaneously supply signals to x pixels by arranging a plurality of data drivers that select a data line, as opposed to conventional dot sequential driving where a signal is supplied to one pixel at one time. Furthermore, the present invention makes it possible to supply signals to (x×n) pixels simultaneously, as opposed to conventional linear sequential driving where signals are supplied to n pixels of the first column to the last column.
Having the above structure, the present invention provides a display device and its driving method free from lack of writing time, which usually accompanies an increase in size of a display device and enhancement in definition. Specifically, the present invention provides a display device and its driving method free from lack of writing time, which is prominent when a current value type signal is used in digital time-division driving or in analog driving.
Number | Date | Country | Kind |
---|---|---|---|
2002-234216 | Aug 2002 | JP | national |
Number | Name | Date | Kind |
---|---|---|---|
5805128 | Kim et al. | Sep 1998 | A |
5952789 | Stewart et al. | Sep 1999 | A |
5999154 | Yoshioka | Dec 1999 | A |
6219022 | Yamazaki et al. | Apr 2001 | B1 |
6246399 | Yamane et al. | Jun 2001 | B1 |
6528950 | Kimura | Mar 2003 | B2 |
6545655 | Fujikawa | Apr 2003 | B1 |
6548960 | Inukai | Apr 2003 | B2 |
6730966 | Koyama | May 2004 | B2 |
6825820 | Yamazaki et al. | Nov 2004 | B2 |
6825834 | Miyajima | Nov 2004 | B2 |
6867761 | Matsueda | Mar 2005 | B2 |
6930447 | Kim | Aug 2005 | B2 |
6982462 | Koyana | Jan 2006 | B2 |
7045369 | Yamazaki et al. | May 2006 | B2 |
7071911 | Inukai | Jul 2006 | B2 |
7184014 | Koyama et al. | Feb 2007 | B2 |
20010035863 | Kimura | Nov 2001 | A1 |
20020044124 | Yamazaki et al. | Apr 2002 | A1 |
20020153844 | Koyama | Oct 2002 | A1 |
20030006997 | Ogawa et al. | Jan 2003 | A1 |
20040207578 | Koyama | Oct 2004 | A1 |
20050093802 | Yamazaki et al. | May 2005 | A1 |
20060033161 | Koyama | Feb 2006 | A1 |
20060183254 | Yamazaki et al. | Aug 2006 | A1 |
20060220942 | Choi et al. | Oct 2006 | A1 |
20070109247 | Koyama et al. | May 2007 | A1 |
Number | Date | Country |
---|---|---|
1 063 630 | Dec 2000 | EP |
1 107 220 | Jun 2001 | EP |
1 193 675 | Apr 2002 | EP |
1 198 017 | Apr 2002 | EP |
1 204 089 | May 2002 | EP |
1 575 024 | Sep 2005 | EP |
S52-19960 | May 1977 | JP |
63-18331 | Jan 1988 | JP |
63-92928 | Apr 1988 | JP |
2-214818 | Aug 1990 | JP |
11-102172 | Apr 1999 | JP |
2000-29432 | Jan 2000 | JP |
2001-005426 | Jan 2001 | JP |
2001-33756 | Feb 2001 | JP |
2001-034237 | Feb 2001 | JP |
2002-108243 | Apr 2002 | JP |
2002-149112 | May 2002 | JP |
2002-151276 | May 2002 | JP |
2002-175045 | Jun 2002 | JP |
2002-190390 | Jul 2002 | JP |
2002-196306 | Jul 2002 | JP |
2002-196721 | Jul 2002 | JP |
2002-207442 | Jul 2002 | JP |
2002-214645 | Jul 2002 | JP |
2002-278478 | Sep 2002 | JP |
2003-087562 | Mar 2003 | JP |
Number | Date | Country | |
---|---|---|---|
20040041754 A1 | Mar 2004 | US |