Patent Application
20090067200
The invention relates to a device and method for equalizing the charges of individual cells of an energy storage device disposed in series, in particular of capacitors of a double-layer capacitor connected in series, as used for example in vehicle electrical systems.
Double-layer capacitors have proved to be the most practical technical solution for storing and supplying short bursts of high power in a vehicle electrical system, for example during acceleration assistance (boost) for the internal combustion engine by an integrated starter-generator operating as an electric motor or during the conversion of motive energy to electrical energy by the integrated starter-generator operating as a generator during the regenerative braking process (recuperation).
The maximum voltage of an individual cell of a double-layer capacitor is limited to around 2.5V to 3.0 V, such that for a voltage of 60V for example—a typical voltage value for a double-layer capacitor used in a 42V vehicle electrical system—around 20 to 26 individual capacitors have to be connected in series to form a capacitor stack.
The varying self-discharge rates of the individual cells mean that a charge inequality develops over time in the capacitor stack, ultimately making the double-layer capacitor unusable, if the charges are not equalized.
If the discharge curve is extrapolated to periods of weeks to months, as are relevant for the motor vehicle, the existing problem becomes clear.
A simple charge equalizing operation, for example by slightly overcharging the capacitor stack, as with a lead-acid battery, is however not possible with a double-layer capacitor.
One option known internally within the company is to monitor the voltage of each individual cell by means of a separate electronics system (operational amplifier and voltage divider R1/R2) and, when a predetermined maximum value Uref is reached or exceeded, to bring about a partial discharge by means of a connectable parallel resistance Rbyp (
In the passive state such a circuit uses little energy but charge equalizing is achieved by charge release (energy loss in the parallel resistance Rbyp). This variant should be used expediently where a capacitor stack is mainly operated close to the maximum voltage, for example in the case of the power supply to emergency generating units.
The concept is however restricted in that the charging current into the capacitor stack must be smaller than the discharging current of the charge equalizing circuit, as otherwise it would not be possible to prevent the overcharging of individual capacitors when charging the module. Also the equalizing system cannot be switched on externally, but is only activated when the predetermined voltage threshold is exceeded. During operation in a motor vehicle however this precise state is not achieved over quite a long period. Such a charge equalizing operation results in the long term in a lack of symmetry in the capacitor stack. It has already been possible to demonstrate this by taking measurements in a test vehicle.
To summarize, such a circuit arrangement has the following disadvantages:
It is known from EP 0 432 639 B2 that where there are a number of batteries connected in series a charge equalizing operation can be brought about between a weakly charged battery and the set of other batteries, in that a comparison circuit and a charge circuit (having a rectangle function generator) as well as a diode, transformer and interrupter are provided for each individual battery of the battery stack.
With such a device, operating as a flyback converter according to the isolating transformer principle (
This outlay may be justified for two or three batteries but it is definitely too high for a stack of twenty or more batteries/capacitor cells.
Alternatively another energy source—perhaps an additional battery—can also be used here, with the result that the circuit can also be used to charge the capacitor stack slowly—see also DE 102 56 704 B3.
This form of charge equalizing can also be implemented at any time, regardless of whether the individual capacitor has reached a maximum voltage, such that a dangerous charge inequality cannot develop in the capacitor stack.
In this process charges are simply displaced. In the long term no energy is tapped from the stack or converted to heat. This makes the concept particularly attractive for motor vehicle applications, as sufficient energy must still be present in the vehicle electrical system, even after quite a long vehicle stoppage, to ensure that the vehicle starts successfully in a reliable manner.
One disadvantage of this embodiment is however that the secondary side of the flyback transformer requires a large number of terminals. In the case of a capacitor stack with for example 25 individual cells, as required for the 42V vehicle electrical system, this means 50 terminals. For the purposes of technical implementation this would require a special winding body, which is not commercially available. Also any change in the number of cells in the stack requires adjustment of the transformer. This is to be expected however, as the further technical development of double-layer capacitors has led to an increase in the permitted maximum voltage from generation to generation and correspondingly fewer individual capacitors are required for a given module voltage.
The wiring arrangement from the transformer to the capacitor cells is also complex, as every contact in the stack has to be connected separately. In the example above this means 26 lines, in so far as the rectifier diodes are disposed on the transformer; otherwise it would mean 50 lines. These lines are also subject to high-frequency voltage pulses from the switching processes of the flyback converter and require special EMV suppression measures.
A further aspect is the method for operating the flyback converter. Commercially available control circuits (switching controller ICs) operate almost exclusively with a fixed switching frequency. The charging of the magnetic store (storage inductivity or transformer) takes place in the one phase, while the discharge or energy transfer to the output circuit takes place in the other phase of the clock pulse. This is particularly expedient when a direct current element also has to be transferred as well as the switched current (continuous operation). Generally every effort is made to avoid a switching gap—in other words the time period during which the magnetic storage element remains fully discharged—as oscillations then tend to occur more frequently and the storage characteristics of the magnet core are not used optimally. The oscillations have their origin in the resonant circuit, which comprises storage inductivity and winding capacitance, and the fact that the resonant circuit is stimulated at the start of the switching gap and is not damped by any ohmic load.
In the present application continuous operation is however not possible, as when the magnetic store is continuously recharged, before completely discharging in each instance, saturation of the core material cannot be avoided.
The object of the invention is to create a device with a simplified structure which can be used to achieve automatically controlled operation for equalizing the charges between the individual cells connected in series with little technical outlay.
The object of the invention is also to create a method for operating this device.
According to the invention this object is achieved by a device according to the features of claim 1 and a method for operating said device according to the features of claim 11.
Where at least two energy storage devices (cells) are connected in series, the energy required to equalize the stored charges is fed by way of an alternating current bus (AC bus) to the cell with the lowest cell voltage in each instance.
Advantageous developments of the invention will emerge from the subclaims.
The interfacing and isolation of the cells is effected by way of capacitors according to the invention.
Installation is simple due to the bus system. The individual cells are supplied by way of one or two AC bus lines. Only a few, low-cost components are required for the circuit and these are essentially standard components.
The equalizing process can be activated at any time. Such activation can for example be effected by a control device, which determines the activation time based on operating parameters of a motor vehicle, in particular of an internal combustion engine and/or a starter-generator.
The capacitor stack can be recharged by way of the equalizing circuit. It is thus possible to charge up a series circuit of empty cells again from a further energy source, for example rendering a motor vehicle that has been stopped for a long time once again capable of starting.
The system as a whole can be easily expanded and is therefore readily scalable.
The circuit arrangement is particularly suitable for integration into the stack of cells of an energy storage device connected in series and/or into the housing of the individual cells or the energy storage device as a whole.
Particularly suitable energy storage devices in this instance are double-layer capacitors, also referred to as super-caps or ultra-caps.
Exemplary embodiments according to the invention are described in more detail below with reference to a schematic drawing, in which:
A block circuit diagram of an outline circuit for equalizing the charges of cells of an energy storage device according to the invention is shown in
The cells Z1 to Zn of the double-layer capacitor DLC connected in circuit are connected to this bus 4 by way of a coupling capacitor and a rectifier 3 respectively. The coupling capacitors CK are used for isolation purposes and their charge is partially reversed by the alternating voltage.
The DC/DC voltage converter 1 is in turn connected electrically to an input of a DC/AC converter 2, which in this exemplary embodiment has an intermediate circuit capacitor CZ and two transistors T1 and T2 connected as a half-bridge. The intermediate circuit capacitor CZ can either be charged by the double-layer capacitor DLC by way of the switch S1 or by the battery B by way of the switch S2. The output of this DC/AC voltage converter 2 between the two transistors T1 and T2 is connected to an AC bus 4, which in turn has a coupling capacitor CK1 to CKn for the cell Z1 to Zn assigned to it.
A rectifier 3, in this instance comprising two diodes Dxa, Dxb respectively, is disposed between each coupling capacitor CKx (x=1 . . . n) and the cell Zx assigned to it. The diodes—Dxa—connect the terminal of the coupling capacitor CKx with the terminal having the higher potential (hereafter referred to as the “positive terminal”) of the assigned cell Zx in each instance, said terminal of the coupling capacitor CKx facing away from the AC bus, and the diodes Dxb connect said terminal to the terminal having the lower potential (hereafter referred to as the “negative terminal”) of said assigned cell Zx.
The diode Dxa is hereby poled from the coupling capacitor CKx toward the positive terminal of the cell Zx in the through-flow direction, while the diode Dxb is poled from the negative terminal of the cell Zx toward the coupling capacitor CKx.
The DC/AC voltage converter 2, in this exemplary embodiment comprising a half-bridge T1, T2, supplies a rectangular alternating voltage at its output between the two transistors T1 and T2, it being possible for the coupling capacitors CK1 to CKn to transfer said rectangular alternating voltage to the individual cells Z1 to Zn.
Different capacitor types can be used for the coupling capacitors. However the capacity, frequency and internal loss resistance of the capacitor must be aligned. Incorrect alignment would result in too great a charge reversal in the coupling capacitors, thereby having an adverse affect on the selectivity of the equalizing circuit in the long term.
The current is rectified again by way of the connected rectifier 3 (diodes D1a, D1b to Dna, Dnb) and fed to the cells Z1 to Zn as a charging current.
To be able to achieve the equalizing of charges at the capacitor cells Z1 to Zn of a double-layer capacitor DLC connected in series, energy must be tapped from those cells Z1 to Zn having the highest voltage and be fed back to the cells at which the lowest voltage is present, such that these cells are charged.
The circuit can be sub-divided into three sub-circuits. The first part is a current source, which is advantageously in the form of a DC/DC switching controller 1. During a charge equalizing operation energy comes from the double-layer capacitor DLC itself or—during a charging process—from a second energy source, for example a battery B. This energy is fed to an intermediate circuit capacitor Cz of the second sub-circuit. All known variants of the DC/DC switching controller 1 are possible; it is advantageously configured as a step-down switching controller comprising transistors, inductor and freewheeling diode (not shown).
In addition to the intermediate circuit capacitor Cz the second sub-circuit 2 has a bridge circuit, in this instance a half-bridge, comprising the two transistors T1 and T2, which is supplied from the intermediate circuit capacitor CK, and the output of which is conducted by way of the AC bus 4 to all coupling capacitors CK1 to CKn. It generates an alternating voltage, in relation to reference potential GND (ground).
The third sub-circuit, the rectifier 3, is present once for each cell Z1 to Zn. It converts the alternating current to a pulsing direct current flowing through the cells.
The charge equalizing process is described by way of example for a cell Zx (where x=1 to n), which is to have the lowest cell voltage UZx in this exemplary embodiment.
The coupling capacitor CKx is charged in the negative phase of the alternating voltage signal (transistor T2 conducting current) by the lower diode Dxb to the lower potential (at the negative terminal of the cell) of the cell Zx—minus the conducting-state voltage of the diode Dxb.
If the alternating voltage signal then increases the potential to a sufficient degree (transistor T1 conducting current), current flows from the intermediate circuit capacitor CZ by way of transistor T1, the AC bus 4, the coupling capacitor CKz and the diode Dxa through the cell Zx and through all the cells, whose positive terminal has a smaller potential to reference potential GND than the positive terminal of the cell Zx to be charged, in this instance the cells Zx+1 to Zn, and from there back to the intermediate circuit capacitor CZ.
In the next negative phase of the alternating voltage signal (transistor T1 conducting current again) the current flows in the reverse direction through the cells, whose positive terminals have a smaller potential to reference potential GND than the positive terminal of the cell Zx to be charged, in other words the cells Zn to Zx+1, and now through diode Dxb and the intermediate circuit capacitor CKx. The current circuit is closed by way of the AC bus 4 and the current-conducting transistor T2.
A pulsing direct charging current therefore results in the cell Zx, while all the cells Zx+1 to Zn, whose positive terminal has a smaller potential to reference potential GND, experience an alternating current.
The pulsing direct current can only flow into the cell Zx with the smallest cell voltage UZx and charges this cell first, until said cell reaches the next highest cell voltage of a further cell. The pulsing direct current is then distributed to these two cells, until it reaches the cell with what is then the next highest cell voltage, etc. The charges of the entire capacitor stack, in other words all the cells of the double-layer capacitor DLC, are thus equalized.
The energy, with which the respective cell Zx of the double-layer capacitor DLC is charged, comes from the intermediate circuit capacitor Cz, which sets itself automatically to an appropriate voltage Ucz, due to this load on the one hand and the constant recharging on the other hand. This automatically means that the cell, at which the smallest voltage drops, receives the most energy, while cells (in this instance Z1 to Zx−1 and Zx+1 to Zn), at which a higher cell voltage currently drops, receive no energy.
Top-quality high-capacitance coupling capacitors and diodes with low conducting-state voltages are particularly suitable here.
The inventive circuit has the following function groups:
Parts with identical functions have the same reference characters here as in
The circuit of the exemplary embodiment with two phases operates in a similar manner to the circuit of the exemplary embodiment described above and shown in
The exemplary embodiment according to
The bus line 4.1 is connected to the cells Z1 to Zn connected in series, in each instance by way of a coupling capacitor CK1a to CKna and a rectifier circuit comprising two diodes D1a, D1b to Dna, Dnb respectively.
The bus line 4.2 is connected to the cells Z1 to Zn connected in series, in each instance by way of a coupling capacitor CK1b to CKnb and a rectifier circuit 3 comprising two diodes D1c, D1d to Dnc, Dnd respectively.
For the cell Zx for example this means: the bus line 4.1 connected to the half-bridge T1-T2 is connected by way of the coupling capacitor CKxa on the one hand by way of the diode Dxa conducting current toward the cell to the positive terminal of the cell Zx and on the other hand by way of the diode Dxb conducting current toward the coupling capacitor to the negative terminal of the cell Zx.
The bus line 4.2 connected to the half-bridge T3-T4 is also connected by way of the coupling capacitor CKxb on the one hand by way of the diode Dxc conducting current toward the cell to the positive terminal of the cell Zx and on the other hand by way of the diode Dxd conducting current toward the coupling capacitor to the negative terminal of the cell Zx.
The two rectifiers Dxa, Dxb and Dxc, Dxd therefore operate parallel to the cell Zx. The circuit for all the other cells Z1 to Zx−1 and Zx+1 to Zn looks similar.
A significant advantage with two phases is that there is no alternating current through the cells that are not actually involved, which are currently not charged, in other words all the cells, whose positive terminal has a smaller potential to reference potential GND but higher cell voltages UZ than the cell Zx (in other words through the cells Zx+1 to Zn here).
In this exemplary embodiment the two half-bridges operate in phase opposition, in other words when the transistors T1 and T4 conduct current in the first phase, the transistors T2 and T3 are non-conducting; this is reversed in the second phase: here the transistors T2 and T3 conduct current, while the transistors T1 and T4 are non-conducting.
In the first phase a current flows from the intermediate circuit capacitor CZ by way of transistor T1 into the bus 4.1, by way of coupling capacitor CKxa and diode Dxa through the cell Zx and back by way of diode Dxd, coupling capacitor CKxb, the bus 4.2 and transistor T4 to the intermediate circuit capacitor CZ.
In the second phase a current flows from the intermediate circuit capacitor Cz by way of transistor T3 into the bus 4.2, by way of coupling capacitor CKxb and diode Dxc through the cell Zx and back by way of diode Dxb, coupling capacitor CKxa, the bus 4.1 and transistor T2 to the intermediate circuit capacitor Cz.
The recharging current of the one coupling capacitor CKxa and the discharging current of the other coupling capacitor CKxb compensate for each other.
The step-down converter 1 taps the energy from the entire capacitor stack, comprising the individual cells Z connected in series, in other words the double-layer capacitor DLC. Energy can optionally be fed to the system by way of an additional switch S2.
The voltage at the respective AC bus increases until it corresponds to the lowest cell voltage plus one (exemplary embodiment according to
The circuit as a whole does not require any complex or expensive individual components.
The structure of the AC bus 4 or 4.1 or 4.2 means that the system can easily be expanded. Additional energy storage devices Zn+1 can easily be connected to the bus and superfluous ones can easily be removed.
The charge equalizing circuit can also be used to equalize the charges of other energy storage devices, for example batteries connected in series.
These circuit arrangements (DLC, rectifier diodes, coupling capacitors and bus line(s)) can be integrated both in the housing, which encloses the individual cells, or in a common housing. This provides a compact unit, which only has three or four terminals.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10 2004 031 216.8 | Jun 2004 | DE | national |
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/EP05/51386 | 3/24/2005 | WO | 00 | 12/28/2006 |
