The invention relates to a device and a method for evaluating signals from load cells with strain gauges.
Most modern electromechanical scales work either according to the principle of electromagnetic force compensation or with load cells, which in turn work with strain gauges (SG). The electrical resistance in strain gauges changes even with very small displacements. They are stuck with special adhesive to components that undergo minimal deformation under load. Strain gauges can be used to manufacture scales of all sizes, from domestic scales to crane scales. For example, DE 3538178 A1 describes a bathroom scales for measuring bodyweight. DE 10135238 A1 describes scales for food, and DE 102008014838 B3 relates to a dispensing monitoring device for coffee machines. This device functions according to the same principle as the scales described in DE 19838371 C2 with one or more load cells. When multiple load cells are used, the signals therefrom are added together in a signal processing device. The load cells are constructed as leaf springs, to which the SG are glued.
DE 20023524 U1 describes a force measuring element for a scales that consists of a bar with two recesses. The reduced cross sections create two bending points, between which a parallel guide is formed when a load is applied to the ends of the bar. The measurement signal from the force measuring element is derived from an SG that is glued to the upper side of the bar. Four of these force measuring elements, which are connected to form a Wheatstone bridge, make up the load cells of the scales.
Under load, the SG are extended or compressed, causing a change in the electrical resistance thereof. This in turn alters the voltage state in the zero branch of the bridge circuit, which is amplified and displayed with a needle instrument, for example. Besides this purely analogue display, the amplified voltage state is also digitised in an analogue/digital converter (ADC), conditioned with a digital signal processor and displayed with a signal output, as described in DE 102008014838 B3, for example.
A disadvantage of the scales described is that, since the output signal of the load cells is so small, typically in the order of 2 mV per Volt input terminal voltage, high-performance and thus also expensive amplifier circuits must be used. Alternatively, ADCs with very high resolution may also be used when the signal is digitised. But these are also not available at the low end of the market.
The object underlying the invention is therefore to enable high-resolution load cell evaluation with inexpensive components.
This object is solved with a device having the features of claim 1 and a method having the features of claim 9, wherein two different operating points of the SG are set for two consecutive measurements. The voltage in the zero branch of the bridge circuit of the SG is amplified in a differential amplifier and digitised using an ADC. In this context, the same voltage references are used for the ADC and to set the operating point of the SG. The digitised offset and the initial value of the load cell are calculated from the two measurement values in an arithmetic logic unit.
The advantages gained with the invention consist particularly in that the temperature-dependent offset voltages are compensated by simple operation amplifiers. One or more load cells may be used in order to increase flexibility.
Further details regarding the invention will be described with reference to the figures:
Voltage ΔU in the zero branch of the bridge circuit is amplified by a factor A in differential amplifier 4 and digitised by means of an analogue/digital converter (ADC) 5. The same voltage reference 6 and 7 is used for ADC 5 and power source 3. Consequently, current I is determined by reference resistance RI and voltage reference Uref.
Besides signal ΔU, which is modified by expansion, however, offset voltages Uoffset are also amplified in differential amplifier 4 due to imbalances in differential amplifier 4 or for example caused by thermoelectric voltages at joints. Consequently, the input voltage at ADC 5 is given by the following:
UADC=A·(ΔU+Uoffset) (3)
In turn, digitised value N at the output from ADC 5 thus results from:
In this context, Nmax is the maximum output value from ADC 5 and Uref is the reference voltage. Equations (1) and (2) yield:
First voltage reference 6 may be substituted with a second voltage reference 7 by the use of switches. Thus, power source 3 may be operated according to equation (2) at two different operating points I1 and I2. The offset voltage can be calculated from two measurements N1 and N2, each with the first and second voltage references, by applying:
This returns elongation ε from these two measurements with:
The values of the reference voltages may be correlated via a factor B as follows:
Uref,2=B·Uref,1 (8)
In this way, equation (7) is simplified to:
By suitable selection of B, for example B=¾, the expression may be further simplified to:
The measured weight is obtained from the elongation via a calibration, so that the quotient in equation (10) may be replaced with a calibration factor. Accordingly, the operation and switch setting at voltage references 6, 7 may be carried out with a simple arithmetic logic unit 8 and displayed as required.
If non-precision differential amplifiers are used, the offset voltage may be significantly greater than the voltage in the zero branch of the bridge circuit. Accordingly, it may be necessary to select a substantially higher resolution for ADC 5 than the desired resolution of the scales would require. In an advantageous refinement of the invention, shown diagrammatically in
For this, the current is modulated in the direction of flow thereof through SG 2 with an H bridge consisting of electronic switches 9a to 9d. The AC voltage differential signal, of which the amplitude is modulated by the SG bridge deflection, is amplified in differential amplifier 4 and demodulated in a demodulator 10. Demodulation functions like a narrow band pass filter that only allows the excitation frequency to pass. This is then filtered out by a low pass filter 11, so that a DC voltage proportional to the SG deflection is present at the output. However, offset voltages in demodulator 10, ADC 5 or within power source 3 cannot be reduced in this way. These are reduced by varying the operating point of power source 3 and subsequent evaluation in arithmetic logic unit 8.
A simple microcontroller is well suited to creating the arithmetic logic unit 8. Even simple microcontrollers often include an ADC 5. However, such integrated analogue-to-digital converters usually do not have the resolution necessary for the application. It is usually possible to increase the resolution sufficiently at the expense of the measurement frequency with oversampling techniques. In most scales applications, the reduced measurement frequency is not an insurmountable problem.
In a modification of the invention, reference voltages 6 and 7 may also be applied directly to SG 2, as shown in
The embodiments of the invention described in the preceding do not make direct used of the correlation between elongation 8 and the relative change in resistance AR/R described in equation (1). Instead, they require an ohmic behaviour of SG 2 and make use of the form ΔU/U derived via Ohm's law. For SG 2 with resistance wire, this hypothesis is certainly correct in the linear region of SG 2. Most SG 2 do not exhibit ohmic behaviour in thick film technology. The refinement of the invention refinement shown diagrammatically in
Number | Date | Country | Kind |
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10 2011 010 945 | Feb 2011 | DE | national |
10 2011 013 658 | Mar 2011 | DE | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/DE2012/200006 | 2/9/2012 | WO | 00 | 8/8/2013 |
Publishing Document | Publishing Date | Country | Kind |
---|---|---|---|
WO2012/107040 | 8/16/2012 | WO | A |
Number | Name | Date | Kind |
---|---|---|---|
3960010 | Gustafsson | Jun 1976 | A |
4763739 | Kasinoff | Aug 1988 | A |
4765422 | Hoffmann | Aug 1988 | A |
4909340 | Kazais et al. | Mar 1990 | A |
7361867 | Von Steuben et al. | Apr 2008 | B2 |
7756680 | Hammerschmidt | Jul 2010 | B2 |
7928328 | Suzuki et al. | Apr 2011 | B2 |
20020104690 | Schurr | Aug 2002 | A1 |
Number | Date | Country |
---|---|---|
2450111 | Apr 1975 | DE |
3538178 | Apr 1987 | DE |
19838371 | Mar 2000 | DE |
10135238 | Feb 2003 | DE |
20023524 | Sep 2004 | DE |
102008014838 | Sep 2009 | DE |
1478156 | Jun 1977 | GB |
Entry |
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International Preliminary Report on Patentablity dated Aug. 13, 2013. |
English language translation of German Office Action dated Dec. 1, 2011. |
Number | Date | Country | |
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20140182387 A1 | Jul 2014 | US |