Device for determining a measure for a signal change and a method of phase control

The invention relates to a device for determining a measure for a signal change according to the features indicated in the preamble of Claim 9, and to a method according to the features of the preamble of Claim 1, in particular, to effect phase control by using a circuit of this type.

PRIOR ART

Heretofore, gradient detection for phase control was implemented using a continuous measuring circuit, for example, an operational amplifier which is wired as a differentiator. A gain adjustment may be implemented following the differentiator, following finally by an AD converter (AD: analog-to-digital) which digitizes the gradient information at a given point in time.

The signal path here is, however, continuously under load by a frequency-dependent current flow. In addition, a chip to implement this operation becomes expensive due to an increased surface-area and power requirement. The phase response of a corresponding sensor circuit must be known and must accordingly be taken into account during the phase control.

The phase control is typically effected as follows:

In a first approach, a multiple sampling per pixel period is implemented. The disadvantage here is that, particularly in the case of fast sampling in the signal path, an additional increase in the sampling rate can result in a significant reduction in the resolution of the analog-to-digital converters, and can excessively increase the power drain of these converters.

In a second approach, a transmission is effected of an additional reference signal with a known curve or a known pixel frequency. However, an additional reference signal with a known curve or a known pixel frequency is not available for all applications and may entail a significant additional technical cost

In a third approach, phase control is effected using statistical techniques, for example, by maximizing the average difference between two successive sampling values. It is possible here for large latency times to occur which are critical specifically in regard to moving images. In addition, it may not be possible to correct a phase drift quickly enough.

In a fourth approach according to subsequently published DE 10 2004 027 093, a method is described in which digitized gradient values and sampling values are utilized to estimate the phase position of a steady-state signal segment. In this approach, the quality of the control algorithm is a function of the signal curve. If this signal curve deviates from a sinusoidal shape, the control algorithm may at times no longer operate efficiently.

The goal of the invention is to improve both a device to determine a measure for a signal change and a method to effect phase control using a circuit of this type.

This goal is achieved by a method for determining gradients as indicated in the features of Claim 1, and by a device for determining a measure for a signal change as indicated in the features of Claim 9. Advantageous embodiments of the invention are discussed in the subordinate claims.

What is preferred is a method for determining gradients in which a change in the signal level of an input signal is determined between two instants and compared with reference values, wherein a measure for the gradient of the input signal is determined as a function of the comparison.

What is preferred in particular is a method in which a phase of the clock for processing a signal is set relative to a measurement clock. What is advantageous is a method in which, starting with a sequence of multiple gradients, a measure is determined for the gradient curve and/or a curvature of the input signal. What is additionally preferred is a method in which, starting with a sequential evaluation of the values of the curvature, a direction of the phase drift of the input signal is determined and is employed to control a phase of a clock for a signal processing operation. The described method is in particular advantageous if an exact number of signal periods between synchronization signals is not known and/or a transfer rate fluctuates over time. What is additionally preferred is a method in which signal curves are controlled based on values for the determined gradients of the input signal.

What is accordingly preferred is a device for determining gradients which is designed to compare the change in a signal level of an input signal between two instants with reference values, and to determine a measure for the signal gradients as a function of the comparison.

What is preferred in particular is a device of this type having a sample & track stage and a comparison circuit following this stage to compare the change in the signal level with the reference values. What is additionally preferred is a device with a sample & hold stage and a comparison circuit following this stage to compare the change in the signal level with the reference values. Also advantageous is a device with a stage to effect differential and/or single-ended gradient measurement. This type of device is preferably designed accordingly to implement a method of this type.

According to a core concept of the invention, in many technical applications signal sequences having a time-discrete and value-discrete curve must be processed in a receiver circuit. In this regard, the following problems can result which can be avoided using a gradient detection during a phase control in a time-discrete manner.

If a sufficiently precise clock reconstruction relating to the received signal sequence is effected, for example, by synchronization signals during the signal processing—for an analog-to-digital conversion, for example—it should be ensured that this does not occur during the transition phase between two value-discrete signal states, as is evident in the time-discrete and value-discrete pixel sequence with phase drift relative to the sampling clock shown in FIG. 1, since signal contrasts can be significantly reduce as a result. The preferred circuits compare the particularly amplified change in the signal level between two instants with reference values, then determine therefrom a rough measure for the given signal gradient so as to be able to adjust the phase of the clock for the signal processing relative to the measurement clock.

In this regard, FIG. 1 shows a signal voltage V_signal over time t. In regard to the time duration or period, sampling instants T_pixel for the pixels are different from actual sampling instants T_abtast¹, which condition results in contrast aliasing.

If clock reconstruction is no longer possible with the required precision because the number of signal periods between two synchronization signals is unknown, or because the transfer rate fluctuates over time, it is possible preferably to determine a rough measure for the curvature of the signal from the immediate time sequence of multiple gradients. Based on the sequential evaluation of the curvature values, it is possible to determine the direction of the phase drift of the signal and to utilize this to effect control, as is shown in FIG. 7.

The goal is to reconstruct the signal curve. In other words, a measure for the signal values between sampling points is determined from the sampled signal values and gradient values, to which end, in particular, an interpolation is implemented.

The above-described disadvantages can be avoided by the circuit according to the invention and the method according to the invention.

The preferred circuits according to the invention of a generally particularly preferred concept for gradient detection impose only a moderate capacitive load, typically less than 100F, on the signal path. In order to minimize the surface area requirement, the resolution of the gradient is limited to a few bits in the implementations according to the invention, for example one bit, as is shown in FIG. 4. In many applications, however, this abstraction of the gradient does not represent a fundamental limitation for the functioning of the control algorithm. The comparison with the reference voltages can also be implemented in a space-saving manner by means of an inverter structure, as is shown in FIG. 5. As a result, the circuits indicated are quite compact.

If the signal in the application is measured, for example, directly on the input side of an analog-to-digital converter, then the phase relationship between the detected gradient and the sampled signal value is provided in good approximation by the phase difference between the respective digital control signals; the phase shift along the measurement path can typically be ignored.

The method according to the invention has the following advantages in regard to phase control:

First, an increase in the sampling rate in the signal path is no longer required. Based on the position of the maximum gradients or the change in the gradient curve, the optimum sampling instant can be set precisely.

Second, no additional reference signal is required. All that are required are the normal synchronization pulses and indication of the frequency of the transmitted signal pixels at a sufficient level of precision. The greatest tolerable frequency deviation depends on the precision of the phasing, or possibly the ratio of the PLL frequency (PLL: phase-locked loop) to the pixel frequency, as well as on the critical frequency of the signal path and contrasts in the signal.

Third, large latency times can be avoided. Only a single sensor value need be utilized for the phase correction. As a result, phase control “in real time” or nearly in real time is made possible.

Fourth, the control quality is largely independent of the signal shape. If, on the one hand, the signal curve has a certain minimum value for the gradients in the transition phase, and if on the other hand there are steady-state signal segments in which the gradient lies below this minimum value, then an optimum phase control is possible.

DETAILED DESCRIPTION OF THE INVENTION

The following discussion explains the invention in more detail based on the drawing:

FIG. 1 shows a time-discrete and value-discrete pixel sequence with phase drift relative to the sampling clock;

FIG. 2 provides block diagrams for gradient measurement with sampling and tracking (sample & track) (a) or sampling and holding (sample & hold) (b);

FIG. 3 shows a circuit for 1.5 bits of the sample & track topology given differential measurement (a) and typical signals (b);

FIG. 4 shows a circuit for 1.5 bits of the sample & hold topology given two single-ended measurements (a) and typical signals (b);

FIG. 5 shows a compact implementation of the sample & hold topology; FIG. 6 shows various sensor arrangements, and;

FIG. 7 shows a gradient measurement and sensor values as a function of the phase.

The following discussion presents two sensor circuits which differ fundamentally in regard to the type of measured value acquisition.

The variant of such a sensor circuit shown in FIG. 2a has an amplifier 1 as an input stage to acquire the gradient, the amplifier operating by the sample & track method. A sample & track stage connected on the input side of amplifier 1 or integrated into the input section of the amplifier has two input signals as known per se, sigp, sign, applied to it. Two signals outputted by amplifier 1 or the amplifier circuit are applied to an analog-to-digital converter 2. A reference circuit 3 has applied to it two reference signals refp, refn, wherein two outputs of the reference circuit are applied to the inputs of analog-to-digital converter 2. One output of analog-to-digital converter 2 for the purpose of outputting a digital signal or data current is applied to encoder 4, the output signal of which corresponds to a sensor signal “sensor.”

The variant in FIG. 2b, on the other hand, detects the gradient in single-ended fashion through two sample & hold stages 5 which are driven in a time-shifted manner. The sampled and amplified gradient is essentially AD-converted in both cases in analog-to-digital converter 2. The converter result can then also be appropriately encoded in encoder 4. The circuit of FIG. 2b thus differs from the circuit of FIG. 2a in that in FIG. 2b sample & hold stages 5 are connected on the input side of an amplifier 1* at its inputs, while a common input signal sig is applied to both sample & hold stages 5.

FIG. 3 shows a circuit for 1.5 bits of the sample & track topology given a differential measurement (1) and typical signals (b) for this circuit.

The first circuit variant, and analogously the circuit in FIG. 3a as well in the 1.5-bit implementation, detects in the sample phase the differential signal to be measured and then switches to track mode. In this track mode, the initial value of the differential signal remains stored, and the change in the signal relative to the stored initial level is tracked further and amplified for a certain, preferably adjustable, time. This amplified difference between the sampled and the tracked signal value is in turn again detected at a sampling instant and compared with an appropriate number of reference values reflh, refl as a function of the desired resolution of the gradient. The result of this comparison is recorded and appropriately encoded in encoder 4 as required by the application.

Examples of typical control signals for this method are shown in FIG. 3a. As is the case in the remaining figures, identical reference notations or reference notations identified with a * are used for components and functions in the circuits that are identical or of identical effect, whereby in regard to the description reference is made as required to other embodiments from the other figures.

In terms of the fundamental concept, the circuit of FIG. 3a corresponds to the circuit of FIG. 2a for purposes of implementation. However, in contrast to the circuit of FIG. 2a, a more complex circuit is shown which replaces a standardized analog-to-digital converter 2.

Coming from amplifier 1 or the amplifier circuit, the output lines are fed to a circuit 6. In addition, the reference signals outputted by circuit 3, refh, refl, are also fed to circuit 6. To implement a comparison by means of circuit 6 as a function of a comparison switching signal compare, two inputs each from two sample & compare stages can be selectively switched to the two outputs of the amplifier arrangement including amplifier 1, or to the two outputs of reference circuit 3. Two outputs each from the sample & compare stages 7 are applied to a delay module 8, wherein a delay signal latch can be applied to delay modules 8. From the two delay modules 8, one signal each up, down, is applied to two inputs of an encoder 4. FIG. 3b shows signal states for the sampling signal sample, or the inverted tracking signal track, and for the comparison switching signal compare and for the delay signal latch. The delay signal latch acts slightly before the sampling signal. The sampling signal, in turn, acts slightly before the comparison switching signal.

The coding employed below is simply an exemplary statement regarding a 1.5-bit resolution of the gradient. If the amplified difference is positive and exceeds a positive reference value, then the system decides in favor of a positive gradient and sets a first variable sensor=01. Conversely, if the amplified difference falls below a negative reference value, then the system decides in favor of a negative gradient and the first variable sensor=10 is set. If the amplified difference remains within the two reference values, then the system decides in favor of negligible gradients or steady-state phase, and the first variable sensor=00 is set. The reference-dependent threshold values are selected such that interfering effects such as amplifier offset and incomplete settling do not have any effect on the control.

The second circuit variant of FIGS. 2b and 4a involves a sample & hold architecture. The two measured values for determining the gradient are each detected in single-ended mode at two different times and held. A time interval dt_grad between the two measured values is preferably adjustable. During the sample & hold phase, the difference between the two measured values dV_grad is amplified (amp-factor), compared with reference values refp, refh, and then encoded as required by the application.

The circuit indicated in FIG. 4a is designed to measure two successive gradients. FIG. 4a is constructed based on FIG. 2b analogously to the way FIG. 3a is constructed based on FIG. 2a. In FIG. 4a, a circuit 6* which is switchable with a comparison switching signal compare, two sample & compare stages 7, and two delay modules 8 are all connected through a circuit 6*, analogously to FIG. 3a, between amplifier 1* and reference circuit 3, on the one hand, and encoder 4, on the other hand. Delay modules 8 are switched by a preferably common hold signal or delay signal latch. A first input signal sigp is applied as the input signal to sample & hold stage 5 (identifier is absent in FIGS. 3a and 4a).

Another system comprising analogously designed components is connected in parallel to this system of components, that is, comprising a sample & hold stage 5, another amplifier 1*, another circuit 6*, or an appropriately extended circuit 6*, two sample & compare stages 7, and two delay modules 8, the output signals of which up, down in encoder 4, are applied to two further inputs. When this circuit is used, encoder 4 outputs values of a curvature curvature at its digital output.

One difference indicated in the top half of the circuit consists in the fact that the lower half of the circuit does not need to have a reference circuit 3. As reference signals reth, refl, the output values of reference circuit 3 from the top half of the circuit are applied to the lower half of common circuit 6* or to a separate lower circuit 6*.

The purpose of delay module 9 is to indicate the time offset dt_pn between the two gradient measurements. Examples of a few relevant control signals for this method are shown in FIG. 4b. What is shown is a sampling signal sample_p as the switching signal for first sample & hold stage 5 to which first input signal sigp is applied, and a second sampling signal sample_n which is applied as the switching signal to second sample & hold stage 5, wherein a second input signal sign is applied to second sample & hold stage 5 as the input signal. The two sampling signals sample_p and sample_n, and also analogously the comparison signal compare, and the delay or hold signal latch, can be coupled in a time-offset manner through appropriate coupling elements 9 from the top half of the circuit to the lower half of the circuit. The two sampling signals sample_p, sample_n, are offset in time relative to each other by the time offset dt_pn. Extending the edges results in an edge of the amplification signal amplify, as can be seen in the middle signal curve in FIG. 4b. Shown below this are the comparison switching signal latch which is controlled as a function of time offset dt_pn in connection with the rising edge of the amplification signal amplify.

The delay modules are preferably designed to be adjustable, for example, with 3 bits. In many applications, a typical adjustment range for time offset dt_pn varies between 5-40% of the sampling period. A space-saving implementation thereof appears as follows: delay circuits 8 are preferably composed of an input driver, for example, an inverter, a variable RC element, a Schmitt trigger, and possibly an output driver. Adjustment of the delay occurs through multiple series-connected, for example, binary stepped resistances, which are each individually turned on or turned off through parallel-connected npmos transistor gates, in particular, with a symmetrical npmos admittance characteristic through the channel voltage. The capacitance of the RC element can be implemented by two gate oxide capacitances which are preferably connected to a base voltage or a supply voltage.

In the compact implementation of FIG. 5, comparison with the reference occurs through asymmetrically dimensioned inverters. The first and second signal input for input signals sigp, sign are shown which are switchable to the respective two amplifier inputs of two amplifiers 1° by switching devices s1_p, s2_p, s1_n, s2_n. The given negative output of the two amplifiers 1° is fed to an inverter circuit 11 through interconnected capacitors. The inverter circuits are each composed of one first inverter Inv_m which is returned through another switch s_o to the input point of first inverter Inv_m. This input point is also connected to inputs of a second and third inverter Inv_h, Inv_l, the outputs of which are applied to the four inputs of encoder 4.

The curvature curvature is determined by this circuit or switching matrix as the output signal of encoder 4, wherein the signal curves indicated in FIG. 5b correspond to the signals at the appropriately identified switches—the amplification signal amplify of amplifier 1° and the delay signal latch. Also shown is the time offset dt_pn between signal states for the two switching signals from the top half of the circuit as time offset dt_pn, and also the additional time offset dt_grad between the corresponding switching signals from the top half of the circuit and the lower half of the circuit.

During an offset phase here, the difference between the operating point of the amplifier output of an amplifier 1° and a switching point Vs_inv_m of a symmetrically designed first inverter Inv_m is stored in the capacitance Coffset (reference notation missing in FIG. 5a). The second and third inverters Inv_h and Inv_1 dimensioned asymmetrically relative to first inverter Inv_m possess second and third inverter switching points Vs_inv_h and Vs_inv_l which lie respectively above and below the switching threshold of first inverter Inv_m. The switching thresholds of these two second and third inverters Inv_h and Inv_l are preferably adjustable, for example by deactivating/activating parallel-connected transistors. During the amplification stage (amplify=1), switch s_o is opened, and depending on the correction of the amplifier stages with amplifiers 1°, the following switching matrix is produced by the inverters which function as comparators:

dV_grad*amp>2*(Vs_inv_h−Vs_inv_m)
→(Inv_h_o, Inv_l_o)=11
2*(Vs_inv_h−Vs_inv_m)>=dV_grad*amp>=2*(Vs_inv_l−Vs_inv_m)→(Inv_h_o, Inv_l_o)=01
2*(Vs_inv_l−Vs_inv_m)>dV_grad*amp
→(Inv_h_o, Inv_l_o)=00

A corresponding switching matrix is produced for the second gradient. The two 2-bit results (Inv_h1_o, Inv_l1_o) and (Inv_h2_o, Inv_l2_o) can be encoded, for example, in such a way as to produce a measure for the signal steepness and the change therein specifically as curvature curvature:

grad1<=Inv_h1_o XNOR Inv_l1_o;
grad2<=Inv_h2_o XNOR Inv_l2_o;
curvature<=[grad1, grad2];

In the example, the information about the sign of the gradients is not utilized further; only the absolute values of the gradients have any effect. Thus the result for the curvature curvature during sampling of a transition phase between two levels for a rising edge is as follows, as shown in FIG. 7:

steady state 00,
concave rising 01,
linear rising 11,
convex flattening 10,
steady state 00

and for a falling edge
steady state 00,
convex falling 01,
linear falling 11,
concave flattening 10,
steady state 00.

FIG. 7 presents a signal voltage V_signal over time t for input signals sigp, sign, in the region of the transition edges. Shown here are the different variables which are important to the method or device arrangement. In addition to the sampling clock t_abtast, a time mean value t_mid between the individual differential variables is shown. The two time offsets dt_grad, dt_pn and the difference dv_grad of the voltage of the gradient are outlined as a differential variable. FIG. 7b shows the signal voltage V_signal as a function of the time mean value t_mid, where again the two corresponding input signal curves are outlined. Located centrally is a dynamic region which is assigned the curvature values 11, as is also evident in the above listing analogous to a table.

The reason for this coding will become evident in the description of the control method.

The gradient measurement is effected in particular for short delay times or very high pixel frequencies, preferably, using the hold & amplify method, since here the delay of the amplifier stage does not have a negative effect on determination of the gradient. In addition, for a differential signal path the two measurement processes for two successive gradients interfere with each other less if they are implemented in single-ended mode instead of differentially.

The subsequent discussion describes an example of a control method which operates using the above coding. Typically, the edges here of the following clocks are significant, as is evident in FIG. 1:

The signal or pixel frequency is a frequency at which the signal level may change; the measuring clock is a frequency at which the gradient measurement is repeated; the sampling clock is a clock for signal processing having a constant offset relative to the measurement clock and an a priori unknown offset to the pixel clock; and the PLL clock specifies the step size of the, in particular, digital phase control

The control method according to the invention entails the following procedural steps:

Initially, the control is situated in the search mode. The measurement clock is shifted, for example, in time intervals of half the PLL period, in control-specific intervals in a certain direction until a gradient is detected, for example, by the sensors according to the invention. Subsequently, the measurement clock is controlled relative to the sensor values into the region of maximum signal dynamics, corresponding to a curvature →curvature=11, that is, the average value of the curvature curvature is maximized. If the measurement instant is located at the center of the transition region with a curvature curvature=11, then there is no further need for a change with respect to the phase.

If the pixel frequency now drifts relative to the measurement clock, then over time the curvature curvature will change from 11 to 10 or 01. For the phase readjustment, the following procedure is effected, for example, for a digital clock control:

If the sum of the 10-events within a certain, preferably, adjustable number of measurement clocks exceeds a predetermined, preferably, adjustable threshold value, then the measurement clock is shortened on a one-time basis and thus shifted to the left relative to the signal curve. The sampling clock preferably has a constant phase offset to the measurement clock, which offset is adjustable depending on the application, and thus follows this shift. Analogously to the above, if the sum of the (01) events within a certain time exceeds a predetermined threshold value, the measurement clock is extended on a one-time basis and is thus shifted to the right relative to the signal curve. If both the (01) events as well as the (10) events exceed their threshold values, the phase is shifted in accordance with the more frequently occurring event. The absolute value of the phase shift can be variable and depend, for example, on the ratio of (11) to (01/10) events, and may possibly be set by the PLL frequency.

In the event a constant control is required in one given direction, the frequency of the measurement clock and sampling clock can be set permanently in response to a condition in which a preferably adjustable threshold value is exceeded. If, conversely, short-term frequency fluctuations must be readjusted, this can typically be implemented by one-time phase shifts.

If the result is a curvature curvature=00, the signal has either not completed a sufficient large level change, or the measurements were implemented within the steady-state region. In both cases, no assertion can be made about the optimal phase position and no phase change is effected. If over a certain, preferably, adjustable time period, no gradient has been detected, the control circuit can be reset to the search mode.

The sampling clock preferably has a constant phase offset dPhi relative to the measurement clock, which offset is adjustable depending on the application and is thus shifted together with the measurement clock relative to the pixel clock. The phase offset is typically 40-90% of the clock period, so as to ensure that sampling occurs in the steady-state phase and is not disturbed by the measurement process. With an adjustable phase shift, it is also possible to take into account the phase shift of the measurement path.

Other Approaches to Implementing the Concept According to the Invention are also Possible

In the previous section, two sensor implementations were described for differential and single-ended gradient measurement. In FIG. 6, examples of two systems for detecting and processing multiple gradient measurements are outlined. These are a system with differentially-fed sensors and one with single-ended-fed sensors. In general, appropriate combinations of these systems are also possible. In the top circuit, two differential elements 20, 21 are connected between the two signal inputs to apply the input signals sigp, sign, which are controlled by a clock generator 23 with a clock signal. The clock signal is delayed between the clock inputs of the two differential elements 20, 21 by the time offset dt_pn by means of an appropriate delay element 24. Two outputs each of the differentiating elements 20, 21 are applied to an encoder 4*, the outputs of which are applied at clock generator 23. The clock signal of clock generator 23 is also delayed by a constant phase offset dPhi by another delay element 25 (reference notation is missing in FIG. 6) and applied to analog-to-digital converter 2. The two input signals sigp, sign are applied to this converter at appropriate inputs. The curve for the two input signals sigp, sign is shown in the curve for signal voltage V_signal as a function of time t. The two time offsets dt_pn, dt_grad are also outlined here specifically.

In the circuit presented below this one, elements 20*, 21* for single-ended gradient measurement are illustrated, replacing differential elements 20, 21. Again shown at right is the curve for signal voltage V_Signal as a function of time for the two input signals which are active alternately over time.

The sample & track principle can also be employed for single-ended signals.

Another control method can consist in the fact that the measurement clock is controlled out of the dynamic region and into a steady-state region. This would have the disadvantage, however, that the control with respect to the phase drift has a “blind corner” and correction could be effected too late.

The control method according to the invention also functions with an analog clock control loop. Here no one-time variations of the clock period are effected for the phase shift; instead, a continuous clock adjustment is implemented. This continuous fine adjustment has the advantage over the digital clock reconstruction that no abrupt change in the sampling edges occurs. This latter occurrence results in a distortion of the sampling values analogously to a strong clock jitter.

Possible applications may be found in various circuits, for example, as a sensor for gradient measurement in analog signal curves. These sensors are required, for example, for phase adjustment to effect optimal processing of a time-discrete signal sequence—for example, to sample this sequence during steady-state phases. The sensor results can also function for the purpose of reconstructing sampled signal sequences. The circuits according to the invention can also be used to detect and correct frequency fluctuations or phase drift, possibly in connection with the control algorithm indicated. Fast adjustment control is very advantageous in particular in the case of high-speed interfaces since the ratio of phase changes to signal period becomes critical here.

There are additional advantages to this invention beyond the advantages already described.

No disturbance of the signal path occurs as long as the measurement takes place within a sufficient time interval relative to the sampling. If the gradient measurement is adjusted to the transition phase, the sampling in the signal path can be effected with appropriate phase offset. This offset is preferably adjustable on an applications-specific basis.

FIG. 7 shows signal voltages V_signal for the two input signals sigp, sign (FIG. 7a) and the determined curvature values (FIG. 7b). The corresponding curves for a gradient measurement and sensor values as a function of the phase are shown, in addition to the individual described offset values and other variables, including switching variables. To sum up, the invention relates to a device to effect a gradient determination which is designed to compare the change in a signal level between two instants with reference values, and as a function of the comparison to determine a measure for the signal gradient. This device functions to effect signal reconstruction, wherein, for example, the phase of the signal processing clock relative to the gradient measurement clock can be adjusted, or a measure for the signal values between multiple sampling points can be determined.

The invention also relates to a method for controlling signal curves based on gradient values, wherein a measure for the gradient curve or the curvature of the signal is determined from the immediate time sequence of multiple gradients. Based on a sequential evaluation of these measures, it is possible to determine the direction of the phase drift of the signal and, for example, to utilize this for synchronization or phase control.

Device for determining a measure for a signal change and a method of phase control

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