Claims
- 1. A virtual field programmable gate array device comprising:
- a plurality of processors operable to communicate within a network array, each of said plurality of processors operable to emulate a plurality of logic gates of a plurality of field programmable gate arrays as an algorithms;
- each of said plurality of processors including a network interface connected to a predetermined number of adjacent processors and operable to receive network information from and to send network information to said predetermined number of adjacent processors, said network interface of each of said plurality of processors transferring network information by a plurality of delivery units, each of said plurality of delivery units including a transfer delivery unit specifying a direction corresponding to one of said predetermined number of adjacent processors and a distance to a specific processor to which said network information is to be transferred within said network array.
- 2. The virtual field programmable gate array device of claim 1, wherein each of said plurality of processors includes:
- a central processing unit operable to emulate said plurality of logic gates of said plurality of field programmable gate arrays in response to said network information; and
- a memory coupled to said network interface and said central processing unit, said memory operable to store and update said network information for emulating said plurality of logic gates of said plurality of field programmable gate arrays.
- 3. The virtual field programmable gate array device of claim 2, wherein each of said plurality of processors further includes:
- an instruction cache coupled to said central processing unit and operable to store most recently used programming instructions of said network information stored in said memory;
- a data cache coupled to said central processing unit and operable to store most recently used data of said network information stored in said memory, said central processing unit operable to access said instruction cache and said data cache without directly accessing said memory, said instruction and data caches having deterministic time behaviors for real time scheduling capability;
- a network buffer coupled to said network interface and operable to provide network information to said memory, said instruction cache, and said data cache for processing by said central processing unit.
- 4. The virtual field programmable gate array device of claim 1, wherein each of said plurality of delivery units includes a node delivery unit, said node delivery unit specifying how information is to be loaded into said specific processor.
- 5. The virtual field programmable gate array device of claim 4, wherein:
- each of said processors further includes a memory operable to store and update said network information for emulating said plurality of logic gates of said plurality of field programmable gate arrays; and
- wherein said network interface of each of said processors is responsive to said node delivery unit indicating a load to memory to load information into said memory of said specific processor.
- 6. The virtual field programmable gate array device of claim 4, wherein:
- each of said processors further includes a central processing unit operable to emulate said plurality of logic gates of said plurality of field programmable gate arrays in response to said network information; and
- wherein said network interface of each of said processors is responsive to said node delivery unit indicating a load to central processing unit to load information into said central processing unit of said specific processor.
- 7. The virtual field programmable gate array device of claim 1, wherein said transfer delivery unit is operable to specify a one of six orthogonal three dimensional directions within said network array.
- 8. The virtual field programmable gate array device of claim 1, wherein said transfer delivery unit is operable to specify one of a plurality of programmable direction paths within said network array.
- 9. The virtual field programmable gate array device of claim 1, wherein said transfer delivery unit is operable to specify all processors within said network array.
- 10. A virtual field programmable gate array device, comprising:
- a plurality of processors operable to communicate within a network array, each of said plurality of processors operable to emulate a plurality of logic gates of a plurality of field programmable gate arrays;
- a plurality of transfer delivery units for transferring network information to each processor, said plurality of transfer delivery units including transfer delivery information specifying a direction and distance to a specific processor of which information is to be transferred to within said network array; wherein each processor is operable to deactivate during periods of inactivity, said transfer delivery unit being operable to reactivate each processor for subsequent operations.
- 11. The virtual field programmable gate array device of claim 1, wherein:
- said network interface of each of said plurality of processors is further operable to
- decrement said distance of said transfer delivery unit of a received network information,
- determine if said decremented distance of said transfer delivery unit is zero, and
- transfer said received network information to one of said predetermined number of adjacent processors corresponding to said direction of said transfer delivery unit if said decremented distance of said transfer delivery unit is nonzero.
- 12. The virtual field programmable gate array device of claim 1, wherein:
- said network interface of each of said plurality of processors is further operable to load said received network information into said processor if said decremented distance of said transfer delivery unit is zero.
- 13. The virtual field programmable gate array device of claim 11, wherein:
- at least one of said network information includes a plurality of transfer delivery units;
- said network interface of each of said plurality of processors is further operable to
- determine if a next unit following said transfer delivery unit is another transfer delivery unit if said decremented distance of said transfer delivery unit is zero,
- transfer said received network information to one of said predetermined number of adjacent processors corresponding to said direction of said next transfer delivery unit if said next unit following said transfer delivery unit is a following transfer delivery unit and said decremented distance of said transfer delivery unit is zero, and
- load said received network information into said processor load said received network information into said processor if said next unit following said transfer delivery unit is not a following transfer delivery unit and said decremented distance of said transfer delivery unit is zero.
Parent Case Info
This application is a division of application Ser. No. 08/338,936, filed Nov. 14, 1994, now abandoned.
US Referenced Citations (18)
Non-Patent Literature Citations (2)
Entry |
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Continuations (1)
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Number |
Date |
Country |
Parent |
338936 |
Nov 1994 |
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