Differential Amplifier and Method

Abstract

A method of forming a differential amplifier on a substrate which has a greater tolerance for applied voltages and a chip so formed. The differential amplifier circuit on a substrate has additional transistors connected with resistors which form a voltage divider, thereby sharing the voltage stress which may be applied and accommodating enhanced capabilities for the differential amplifier.

Description

BRIEF DESCRIPTION OF DRAWINGS

Some of the purposes of the invention having been stated, others will appear as the description proceeds, when taken in connection with the accompanying drawing, in which the differential amplifier circuit of this invention is shown in FIG. 1.

DETAILED DESCRIPTION OF INVENTION

While the present invention will be described more fully hereinafter with reference to the accompanying drawings, in which a preferred embodiment of the present invention is shown, it is to be understood at the outset of the description which follows that persons of skill in the appropriate arts may modify the invention here described while still achieving the favorable results of the invention. Accordingly, the description which follows is to be understood as being a broad, teaching disclosure directed to persons of skill in the appropriate arts, and not as limiting upon the present invention.

Referring now to FIG. 1. The differential amplifier of this invention is there shown. The elements shown are formed on a substrate (not shown) as is conventional and well known in semiconductor manufacturing. It is the presence of this general knowledge on which reliance is placed for the absence of a specific illustration of the substrate.

The differential amplifier has a plurality of transistors, conductive traces coupling those transistors, and resistors. One transistor, T₁ serves to supply a bias to the other elements of the amplifier. A pair of transistors, T₂ and T₃, serve as points for input of voltage signals into the amplifier, buffering an input differential voltage, input positive (INP) and input negative (INN).

Two pairs of low V_t transistors (LVT), T₄ and T₅ and T₆ and T₇, are connected between the input point transistors and an output pair of transistors T₈ and T₉. These LVT elements are those which may be vulnerable to voltage stress during operation at higher V_in and V_cc operation.

In order to provide protection for the LVT elements during such operation, the present invention contemplates the inclusion of a set of resistors, R₁, R₂, R₃, R₄ arranged to function as a voltage divider and connected with the two pairs of LVT transistors. Preferably, the resistors have a common value, resulting in the buffered input voltages being divided by a factor of two, sharing the voltage stress among the four LVT transistors. This operation is essentially present in both low and high common mode bias.

In the manufacture of a chip incorporating a differential amplifier as here described, the method which is implemented proceeds by forming on a suitable substrate a complex of electrical circuit components including transistors and resistors; with the forming including forming a pattern of transistors into a differential amplifier. The differential amplifier thus produced is formed to have a first pair of transistors receiving input voltages; two pairs of low V_t (LVT) transistors coupled to the first pair of transistors, each pair having one transistor coupled in series with one transistor of the other pair; and four resistors coupled to the two pairs of LVT transistors in voltage dividing array. In this arrangement, the voltage dividing array of resistors protect the LVT transistors against excessive voltage stress during operation of the differential amplifier. As has been described hereinabove.

In the drawings and specifications there has been set forth a preferred embodiment of the invention and, although specific terms are used, the description thus given uses terminology in a generic and descriptive sense only and not for purposes of limitation.

Claims

1. Method comprising: forming on a suitable substrate a complex of electrical circuit components including transistors and resistors;the forming including forming a pattern of transistors into a differential amplifier having: a first pair of transistors receiving input voltages;two pairs of low Vt (LVT) transistors coupled to the first pair of transistors, each pair having one transistor coupled in series with one transistor of the other pair; andfour resistors coupled to the two pairs of LVT transistors in voltage dividing array;the voltage dividing array of resistors protecting the LVT transistors against excessive voltage stress during operation of the differential amplifier.

2. Method according to claim 1 wherein the forming of the resistors provides a resistance value common among the four resistors.

3. Method according to claim 1 wherein the forming of the complex of electrical components provides a sharing of voltage stress among the LVT transistors during operation at higher Vin and Vcc operating points.

4. Apparatus comprising: a substrate;a complex of electrical circuit components formed on said substrate and defining a differential amplifier, said components including: a first pair of transistors receiving input voltages;two pairs of low Vt (LVT) transistors coupled to the first pair of transistors, each pair having one transistor coupled in series with one transistor of the other pair; andfour resistors coupled to the two pairs of LVT transistors in voltage dividing array;the voltage dividing array of resistors protecting the LVT transistors against excessive voltage stress during operation of the differential amplifier.

5. Apparatus according to claim 4 wherein said four resistors have a common resistance value.

6. Apparatus according to claim 4 wherein said LVT transistors share voltage stress during higher Vin and Vcc operating points.