Claims
- 1. A circuit for processing an AC signal having a peak to peak envelope associated therewith, the envelope having an upper edge, a lower edge, and an intermediate edge therebetween, said circuit comprising:
- an input for receiving the AC signal;
- a first detector coupled to said input, said first detector for detecting the upper edge of the peak to peak envelope of the AC signal, said first detector including a plurality of comparators and a logic gate electrically coupled with at least one of said plurality of comparators;
- a second detector coupled to said input, said second detector for detecting the lower edge of the peak to peak envelope of the AC signal;
- a first sampler circuit coupled to said first detector, said first sampler circuit for sampling the AC signal at a first point between the intermediate edge and the upper edge of the peak to peak envelope, said first sampler circuit including a first output; and
- a second sampler circuit coupled to said second detector, said second detector for sampling the AC signal at a second point between the intermediate edge and the lower edge of the peak to peak envelope, said second sampler circuit including a second output.
- 2. The circuit as recited in claim 1, and further comprising at least one voltage divider electrically coupled to said first detector.
- 3. The circuit as recited in claim 1, and further comprising at least one voltage divider electrically connected to said second detector.
- 4. The circuit as recited in claim 1, wherein said logic gate is a NOR gate.
- 5. The circuit as recited in claim 1, wherein said second detector comprises:
- a plurality of comparators; and
- a logic gate electrically coupled with at least one of said plurality of comparators.
- 6. The circuit as recited in claim 5, wherein said logic gate is an OR gate.
- 7. The circuit as recited in claim 1, wherein said second sampler includes:
- a comparator; and
- a voltage divider electrically coupled to said comparator.
- 8. A circuit for processing an AC signal having a peak to peak envelope associated therewith, the envelope having an upper edge, a lower edge, and an intermediate edge therebetween, said circuit comprising:
- an input for receiving the AC signal;
- a first detector coupled to said input, said first detector for detecting the upper edge of the peak to peak envelope of the AC signal;
- a second detector coupled to said input, said second detector for detecting the lower edge of the peak to peak envelope of the AC signal, said second detector including a plurality of comparators and a logic gate electrically coupled with at least one of said plurality of comparators;
- a first sampler circuit coupled to said first detector, said first sampler circuit for sampling the AC signal at a first point between the intermediate edge and the upper edge of the peak to peak envelope, said first sampler circuit including a first output; and
- a second sampler circuit coupled to said second detector, said second detector for sampling the AC signal at a second point between the intermediate edge and the lower edge of the peak to peak envelope, said second sampler circuit including a second output.
- 9. The circuit as recited in claim 8, and further comprising at least one voltage divider electrically coupled to said first detector.
- 10. The circuit as recited in claim 8, and further comprising at least one voltage divider electrically connected to said second detector.
- 11. The circuit as recited in claim 8, wherein said first detector includes a plurality of comparators and a logic gate electrically coupled with at least one of said plurality of comparators.
- 12. The circuit as recited in claim 11, wherein said logic gate is a NOR gate.
- 13. The circuit as recited in claim 8, wherein said second sampler circuit includes a comparator and a voltage divider electrically coupled to said comparator.
- 14. A circuit for processing an AC signal having a peak to peak envelope associated therewith, the envelope having an upper edge, a lower edge, and an intermediate edge therebetween, said circuit comprising:
- an input for receiving the AC signal;
- a first detector coupled to said input, said first detector for detecting the upper edge of the peak to peak envelope of the AC signal, said first detector including a plurality of comparators and a logic gate electrically coupled with at least one of said plurality of comparators;
- a second detector coupled to said input, said second detector for detecting the lower edge of the peak to peak envelope of the AC signal, said second detector including a plurality of comparators and a logic gate electrically coupled with at least one of said plurality of comparators of said second detector;
- a first sampler circuit coupled to said first detector, said first sampler circuit for sampling the AC signal at a first point between the intermediate edge and the upper edge of the peak to peak envelope, said first sampler circuit including a first output; and
- a second sampler circuit coupled to said second detector, said second detector for sampling the AC signal at a second point between the intermediate edge and the lower edge of the peak to peak envelope, said second sampler circuit including a second output.
- 15. The circuit as recited in claim 14, and further comprising a first voltage divider electrically coupled to said first detector.
- 16. The circuit as recited in claim 15, and further comprising a second voltage divider electrically coupled to said second detector.
Parent Case Info
This application is a continuation of application Ser. No. 08/537,214, filed Sep. 29, 1995 now U.S. Pat. No. 5,631,584.
US Referenced Citations (5)
Continuations (1)
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Number |
Date |
Country |
Parent |
537214 |
Sep 1995 |
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