Claims
- 1. An apparatus for preventing coating on the edge and backside of a substrate during processing in a processing volume comprising:
- support means for supporting the substrate during processing;
- purge cavity means for forming a slot with the front surface of the substrate around the periphery thereof, forming a purge cavity isolated from said processing volume except for said slot; and
- purge gas means for supplying purge gas to said purge cavity to flow through said slot opposing diffusion of processing gas from said processing volume to the edge and backside of said substrate.
- 2. An apparatus as in claim 1 wherein said substrate comprises a semiconductor wafer.
- 3. An apparatus as in claim 1 wherein said processing volume comprises a CVD processing chamber.
- 4. An apparatus as in claim 1 wherein said substrate comprises a semiconductor wafer and said processing volume comprises a CVD processing chamber.
- 5. An apparatus as in claim 1 wherein said purge cavity means comprises a clamp ring movable to engage said substrate on said support means forming said slot.
- 6. A system for performing a surface process on a substrate comprising:
- a processing volume for performing said process therein;
- processing gas delivery means for delivering processing gases to said processing volume;
- heating means for heating said substrate during said process;
- support means for supporting the substrate during processing;
- purge cavity means for forming a slot with the frontside of the substrate around the periphery thereof, forming a purge cavity isolated from said processing volume except for said slot; and
- purge gas means for supplying purge gas to said purge cavity to flow through said slot opposing diffusion of processing gas from said processing volume to the edge and backside of said substrate.
- 7. A system as in claims 6 comprising a plurality of said support means and purge cavity means, providing for processing of a plurality of substrates in a single processing cycle.
- 8. A system as in claim 7 comprising load-lock means for loading and removing substrates without venting said processing volume.
- 9. A system as in claim 6 wherein said substrate comprises a semiconductor wafer.
- 10. A system as in claim 6 wherein said processing volume comprises a CVD processing chamber.
- 11. A system as in claim 6 wherein said substrate comprises a semiconductor wafer and said processing volume comprises CVD process chamber.
- 12. A system as in claim 6 wherein said purge cavity means comprises a clamp ring movable to engage said substrate on said support means forming said slot.
Parent Case Info
This is a continuation of application Ser. No. 07/596,512 filed on Oct. 12, 1990, now U.S. Pat. No. 5,094,885.
US Referenced Citations (8)
Foreign Referenced Citations (2)
Number |
Date |
Country |
3633386-A |
Apr 1988 |
DEX |
60-136314 |
Jul 1985 |
JPX |
Non-Patent Literature Citations (1)
Entry |
Solid State Technology, "Tungsten exclusion ring controls deposition area", p. 26, Aug. 1991. |
Continuations (1)
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Number |
Date |
Country |
Parent |
596512 |
Oct 1990 |
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