Differential signal receiver

Abstract
A differential signal receiver according to the present invention includes a waveform shaping circuit selectively outputting an upper limit value having a first potential difference from a first power supply potential, and a lower limit value having a second potential difference from the upper limit value, from a first and a second output terminals according to a differential signal input, and an amplifier comparing voltages of the first and the second output terminals and outputting one of a voltage almost the same as the first power supply potential or a voltage almost the same as a second power supply potential.
Description

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other objects, advantages and features of the present invention will be more apparent from the following description taken in conjunction with the accompanying drawings, in which:



FIG. 1 is a circuit diagram showing a differential signal amplifier according to a first embodiment of the present invention;



FIG. 2A is a view showing a waveform of an input signal according to the first embodiment of the present invention;



FIG. 2B is a view showing a waveform of an internal output signal according to the first embodiment of the present invention;



FIG. 3 is a circuit diagram showing a differential signal amplifier according to a second embodiment;



FIG. 4 is a circuit diagram showing a differential signal amplifier according to a third embodiment of the present invention;



FIG. 5 is a block diagram showing a general liquid crystal panel;



FIG. 6 is a block diagram showing a general source driver;



FIG. 7 is a block diagram showing a differential signal amplifier according to a first conventional technique;



FIG. 8 is a circuit diagram showing a differential signal amplifier according to the first conventional technique;



FIG. 9A is a view showing a waveform of an input signal according to the first conventional technique; and



FIG. 9B is a view showing a waveform of an internal output terminal according to the first conventional technique.


Claims
  • 1. A differential signal receiver comprising: a waveform shaping circuit selectively outputting an upper limit value having a first potential difference from a first power supply potential, and a lower limit value having a second potential difference from the upper limit value, from a first and a second output terminals according to a differential signal input; andan amplifier comparing voltages of the first and the second output terminals and outputting one of a voltage almost the same as the first power supply potential or a voltage almost the same as a second power supply potential.
  • 2. The differential signal receiver according to claim 1, wherein the waveform shaping circuit comprises: a first potential difference setting device for setting the first potential difference;a second potential difference setting device for setting the second potential difference;a plurality of depletion type transistors for receiving the differential signal; anda current source for supplying a current to the plurality of depletion type transistors.
  • 3. The differential signal receiver according to claim 2, wherein at least one of the first and the second potential difference setting devices is a resistance device.
  • 4. The differential signal receiver according to claim 3, wherein the first and the second potential differences are set according to the current output from the current source and the resistance device.
  • 5. The differential signal receiver according to claim 2, wherein at least one of the first and the second potential difference setting devices is a diode connected transistor.
  • 6. The differential signal receiver according to claim 5, wherein the first and the second potential difference are set according to a threshold voltage of the diode connected transistor.
Priority Claims (1)
Number Date Country Kind
2006-018842 Jan 2006 JP national