This application is related to the following co-pending U.S. patent applications filed on the same day as the present application and having the same assignee: “On-Chip Adaptive Voltage Compensation,” Ser. No. 11/671,485; “Using Temperature Data for Instruction Thread Direction,”; “Using Performance Data for Instruction Thread Direction,” Ser. No. 11/671,627; “Using IR Drop Data for Instruction Thread Direction,” Ser. No. 11/671,613; “Integrated Circuit Failure Prediction,” Ser. No. 11/671,599; “Instruction Dependent Dynamic Voltage Compensation,” Ser. No. 11/671,579; “Temperature Dependent Voltage Source Compensation,” Ser. No. 11/671,568; and “Fan Speed Control from Adaptive Voltage Supply,” Ser. No. 11/671,555; each assigned to the IBM Corporation and herein incorporated by reference.
1. Technical Field
The present invention relates in general to a system and method for regulating voltage to an integrated circuit contained on a semiconductor substrate. In particular, the present invention relates to a system and method for regulating voltage to an integrated circuit in response to digitally measured physical conditions of the integrated circuit while providing data to and receiving inputs from programmable control.
2. Description of the Related Art
The performance of integrated circuits varies during the manufacturing process. Traditionally, these integrated circuits, which are manufactured on semiconductor substrate wafers, are tested and graded upon manufacture completion to determine their performance. Upon being graded, the semiconductor substrates are packaged and sold based on this measure performance. This grading details predicted performance for a specified single voltage to be provided to the integrated circuit for all operating conditions.
The integrated circuit that marginally fails to meet the performance criteria is typically discarded, even though it is fully functional without any defect. This results in yield loss. One way to marginally increase the performance of an integrated circuit is to increase the nominal operating voltage applied to it. So to ensure minimum yield loss due to underperforming integrated circuit samples, they are packaged with a higher than nominal voltage specification marked on the package itself. However, this test for performance is done at a single operating point, i.e. at a fixed temperature and given process, a measurement is made to find out what is the voltage required to attain the minimum performance criteria. In a system though, the temperature and voltages are not constant, so to guard against these variations, a voltage even higher than that needed to achieve minimum performance criteria is actually stamped on the package as the nominal voltage.
Also, calibration of individual integrated samples takes up more test time that increases cost. In such a static test method, since the power supply voltage is set at wafer based on single operating point, the opportunity to reduce power dynamically is lost.
Therefore, there is no provision made for responding to changing operating system conditions of the integrated circuit after it has been graded and packaged.
In accordance with the present invention, an integrated circuit apparatus is provided that includes a temperature measurement circuit within the integrated circuit that provides a temperature signal, a voltage drop measurement circuit within the integrated circuit providing a voltage drop value to a voltage drop register, a frequency measurement circuit within the integrated circuit providing a frequency value to a frequency register, a supervisor circuit connected to the voltage drop register and the frequency register and selectively reading values from or providing values to the voltage drop register and the frequency register, a voltage scaling signal circuit connected to the temperature measurement circuit, the voltage drop register and the frequency register and combining the temperature signal with the values of the voltage drop register and the frequency register to compute a voltage scaling signal value, and a voltage supply connected to the voltage scaling signal circuit and providing a voltage to the integrated circuit proportional to the voltage scaling value.
In one embodiment of the present invention, an electronic system is provided that includes a thermal diode, an addressing circuit connected to a system clock, a digital temperature table connected to the addressing circuit, a comparator connected to the digital temperature table and to the thermal diode, a predicted frequency response table connected to the output of the comparator and providing a predicted frequency response value, a first frequency circuit providing a first frequency value, a second frequency circuit providing a second frequency value, a first differencing circuit connected to the frequency response table and the first frequency circuit providing a first difference value of the first frequency value and the predicted frequency value, a second differencing circuit connected to the first frequency circuit and the second frequency circuit and providing a second difference value of the first frequency value and the second frequency value, a voltage scaling signal circuit connected to the first and second differencing circuits and providing a voltage scaling signal from a combination of the first and second difference values, and a voltage supply providing power to the electronic system in response to a voltage scaling signal received from the voltage scaling signal circuit.
The present invention may be better understood, and its numerous objects, features, and advantages made apparent to those skilled in the art by referencing the accompanying drawings.
The following is intended to provide a detailed description of an example of the invention and should not be taken to be limiting of the invention itself. Rather, any number of variations may fall within the scope of the invention, which is defined in the claims following the description.
The present invention provides a system to measure temperature within a single central processing unit. This is actually accomplished by providing an adaptive power supply (APS) for each central processing unit. Each of these adaptive power supplies determines operating conditions on an integrated circuit and adjust voltage (Vdd) provided to the integrated circuit to either increase performance of the integrated circuit or save power expended by the integrated circuit.
In a preferred embodiment of these adaptive power supplies, three physical condition measurements are made. The first is temperature, which is measured by a thermal diode on the surface of the integrated circuit. The second is the IR (voltage) drop measured by two ring oscillator circuits and the third is the frequency performance of the integrated circuit measured by a single loop oscillator compared to stored predetermined performance values.
The complete control signal provided to the voltage regulation circuit is:
Total Vdd scaling=Frequency response scaling+Temperature related Vdd scaling+IR drop related scaling
All of the measurement circuits are contained on the surface of this integrated circuit device in the preferred embodiment. These measurements are then used to scale an input control signal to a voltage regulation circuit also contained on the surface of the integrated circuit device or alternatively on another integrated circuit. The output of this voltage regulation device provides the integrated circuit operating voltage (Vdd). Thus the voltage supplied to the integrated circuit can be adjusted to either save power or increase performance dynamically during the operation of the chip by under program control. Further the integrated circuit voltage and, therefore, performance can be changed in anticipation of operating environment changes such as a sleep state or the execution of instructions requiring high circuit performance.
This is a dynamic method of varying voltage that takes into account the specifics of the semiconductor manufacturing process, temperature and IR drop effects simultaneously. This method uses available on-chip data to compute adjustment in voltage necessary to either meet target performance or decrease power consumption. The two goals are met using the same circuit. Another advantage of using this method is the flexibility it offers to the users in terms of programmability. On chip voltage can be artificially varied by writing into special registers which provide values used by the power management circuitry to provide the supply voltage Vdd. This feature can be helpful when expecting instructions that require high circuit performance, essentially providing an “on-Demand” performance capability. In other words, to provide on request, additional circuit supply voltage to increase circuit performance.
This method is not limited to a specific technology or type of circuit. It can be applied to a broad type of integrated circuits, especially those that need to deliver higher performance at lower power consumption.
This method also offers reduction in test time for identifying yield and voltage per module. It is a dynamic solution unlike previous static solutions (fuses, etc) that takes into account effects of IR drop.
To measure the process on the substrate, a ring oscillator connected to a temperature compensated voltage source (ex: a bandgap reference) is used. In this case, for a given temperature, the pulse width produced by the ring oscillator is a function of the process on the substrate since temperature and voltage are constant. By using a bandgap reference, the voltage applied to a ring oscillator can be kept constant. But the temperature of the substrate depends upon internal and external operating conditions and it cannot be held constant. To eliminate the effects of varying temperature, another scheme is used in this invention.
First, a target predicted circuit performance number (pcpn) is chosen. This number represents the expected circuit performance based on expected semiconductor manufacturing process. This number represents circuit performances expected under nominal applied voltage across the entire operating temperature range. For this pcpn, a simulation of the ring oscillator supplied by a constant voltage from a bandgap reference is carried out for the entire operating temperature range. This simulation yields pulse widths that are generated at a fixed voltage and pcpn values where only the temperature is varied across the entire operating temperature range. If the substrate pcpn is identical to the desired target performance, then the substrate would also yield identical pulse widths for each value of the operating temperature range.
If the substrate pcpn is different than the desired target performance, then the pulse widths produced by the substrate will be either shorter or longer than those produced by simulation depending upon whether the substrate pcpn was faster or slower than the desired target performance. So a comparison has to be made between the pulse width generated by the ring oscillator on the substrate with a simulated value of the pulse with at the value of the substrate temperature at a fixed voltage. The expected pulse width values at the desired target process for each temperature value within the desired operating temperature range are stored in a Look Up Table (LUT) (for example, 118 in
This resulting pulse width value from the delay lookup table circuit 118 provides a voltage scaling signal in digital form which is converted to an analog voltage signal by D to A converter 122. This scaling voltage signal is provided to a voltage regulator 130 over line 124. The operation result of the circuit 125 would be to increase or decrease the resulting voltage of regulator circuit 130 (chip Vdd) based upon the measured temperature of the integrated circuit measured by thermal diode 102.
Digital temperature sensors are based on the principle that the base-emitter voltage, VBE, of a diode-connected transistor is inversely proportional to its temperature. When operated over temperature, VBE exhibits a negative temperature coefficient of approximately −2 mV/° C. In practice, the absolute value of VBE varies from transistor to transistor. To nullify this variation, the circuit would have to calibrate each individual transistor. A common solution to this problem is to compare the change in VBE of the transistor when two different current values are applied to the emitter of the transistor.
Temperature measurements are made using a diode that is fed by 2 current sources, one at a time. Typically the ratio of these current sources is 10:1. The temperature measurement requires measuring the difference in voltage across the diode produced by applying two current sources.
Line 206 is connected to a “sample and hold” circuit 209 to sample and hold a voltage output of the thermal diode 208. The address counter circuit 222 operates identically to the address counter, circuit 110 of
The frequency response of the integrated circuit (or performance of the integrated circuit) can be measured by using the output of a band gap voltage connected ring oscillator 304 on line 305 of
Returning to path 524, the frequency response value measured in block 510 is provided in path 528 to both the integration block 512 and to the compare block 520 by line 538 as discussed in
Digital Implementation of the Adaptive Voltage Supply
The bandgap reference circuit 618 and the Vdd reference circuit 632 are similar to those discussed and illustrated as block 325 in
One distinction from the adaptive voltage supply illustrated in
In a similar manner, block 902 controls the process value that is used by the adaptive voltage supply. When a software control is implemented, a signal is provided on line 904 to the decision block 906. If an override by a software input is to take place, then the software input value in block 912 is provided by line 916 to the write process register 918 instead of the measured process of block 914. As shown, the inputted measured process value in block 914 is received via line 934 from the difference circuit 932 at this point. The software controls both the write process register in block 918 and the write IR drop register in block 966. Both the IR drop data and the process data are summed in block 936 to provide the overall voltage scaling signal that is output to the voltage regulator at 938 to provide the Vdd supply voltage to the integrated circuit.
Also in a similar manner, block 970 provides a user or software override in order to provide a substituted temperature value in place of the measured temperature value. This is done by providing a signal on line 974 to a decision process 972. If the software is to override the measured value, a signal is sent online 978, to access the software provided temperature value in block 982, which is written by line 984 into the write temperature register 986. However if there is no software override, the decision block 972 provides a signal on line 976 to the register 980 which receives the temperature from line 924 as previously discussed.
It should also be apparent to those skilled in the art that the use of weight registers also provides a greater degree of software control over the operation of the adaptive voltage supply. Therefore by accessing these registers, the power supervisor can both monitor and regulate the operation of each of the adaptive voltage supplies that are contained on the integrated circuit.
While this discussed embodiment shows only a single voltage control circuit on the integrated circuit, it should be apparent that multiple voltage control circuits may be utilized to provide different voltages to different portions of the integrated circuit.
While particular embodiments of the present invention have been shown and described, it will be obvious to those skilled in the art that, based upon the teachings herein, that changes and modifications may be made without departing from this invention and its broader aspects. Therefore, the appended claims are to encompass within their scope all such changes and modifications as are within the true spirit and scope of this invention. Furthermore, it is to be understood that the invention is solely defined by the appended claims. It will be understood by those with skill in the art that if a specific number of an introduced claim element is intended, such intent will be explicitly recited in the claim, and in the absence of such recitation no such limitation is present. For non-limiting example, as an aid to understanding, the following appended claims contain usage of the introductory phrases “at least one” and “one or more” to introduce claim elements. However, the use of such phrases should not be construed to imply that the introduction of a claim element by the indefinite articles “a” or “an” limits any particular claim containing such introduced claim element to inventions containing only one such element, even when the same claim includes the introductory phrases “one or more” or “at least one” and indefinite articles such as “a” or “an”; the same holds true for the use in the claims of definite articles.
Number | Name | Date | Kind |
---|---|---|---|
4417470 | McCracken et al. | Nov 1983 | A |
5375146 | Chalmers | Dec 1994 | A |
5451894 | Guo | Sep 1995 | A |
5457719 | Guo et al. | Oct 1995 | A |
5737342 | Ziperovich | Apr 1998 | A |
5844826 | Nguyen | Dec 1998 | A |
5852616 | Kubinec | Dec 1998 | A |
6058502 | Sakaguchi | May 2000 | A |
6070074 | Perahia et al. | May 2000 | A |
6076157 | Borkenhagen et al. | Jun 2000 | A |
6111414 | Chatterjee et al. | Aug 2000 | A |
6125334 | Hurd | Sep 2000 | A |
6141762 | Nicol et al. | Oct 2000 | A |
6212544 | Borkenhagen et al. | Apr 2001 | B1 |
6625635 | Elnozahy | Sep 2003 | B1 |
6897673 | Savage et al. | May 2005 | B2 |
7093109 | Davis et al. | Aug 2006 | B1 |
7096140 | Norzuyama et al. | Aug 2006 | B2 |
7100061 | Halepete et al. | Aug 2006 | B2 |
7174194 | Chauvel et al. | Feb 2007 | B2 |
7184936 | Bhandari | Feb 2007 | B1 |
7228446 | Jorgenson et al. | Jun 2007 | B2 |
7282966 | Narendra et al. | Oct 2007 | B2 |
7307439 | Takamiya et al. | Dec 2007 | B2 |
7330081 | Asa et al. | Feb 2008 | B1 |
20020046399 | Debling | Apr 2002 | A1 |
20020065049 | Chauvel et al. | May 2002 | A1 |
20030030483 | Seki et al. | Feb 2003 | A1 |
20030057986 | Amick et al. | Mar 2003 | A1 |
20030126476 | Greene et al. | Jul 2003 | A1 |
20030184399 | Lanoue et al. | Oct 2003 | A1 |
20040023688 | Bazarjani et al. | Feb 2004 | A1 |
20040090216 | Carballo et al. | May 2004 | A1 |
20040183613 | Kurd et al. | Sep 2004 | A1 |
20040268280 | Eleyan et al. | Dec 2004 | A1 |
20050116733 | Barr et al. | Jun 2005 | A1 |
20050174102 | Saraswat et al. | Aug 2005 | A1 |
20050278520 | Hirai et al. | Dec 2005 | A1 |
20050289367 | Clark et al. | Dec 2005 | A1 |
20060066376 | Narendra | Mar 2006 | A1 |
20060149974 | Rotem et al. | Jul 2006 | A1 |
20060197697 | Nagata | Sep 2006 | A1 |
20060247873 | Fung et al. | Nov 2006 | A1 |
20070036212 | Leung et al. | Feb 2007 | A1 |
20070074216 | Adachi et al. | Mar 2007 | A1 |
20070096775 | Elgebaly et al. | May 2007 | A1 |
20070192650 | Shiota | Aug 2007 | A1 |
20070260895 | Aguilar et al. | Nov 2007 | A1 |
20090021314 | Boerstler et al. | Jan 2009 | A1 |
20090085651 | Liu et al. | Apr 2009 | A1 |
Number | Date | Country |
---|---|---|
1716161 | Jan 2006 | CN |
WO 2006072106 | Jun 2006 | WO |
Number | Date | Country | |
---|---|---|---|
20080186082 A1 | Aug 2008 | US |