Patent Application
20160314947
The present disclosure relates generally to electron multiplier devices and methods of producing electron multiplier devices.
Electron multiplier devices are used in many applications to multiply incidental charges through secondary emission. Electron multiplier devices can take a single electron, and via secondary emission, can induce emission of more electrons from an emissive material. This process can be repeated to multiply a single detected electron (e.g., an electron passing through the electron multiplier device) into a larger number of electrons that are directed towards a metal anode for detection. Certain electron multiplier devices, such as channel electron multipliers and channeltrons (“CEM”), offer a high dynamic range of electron multiplication to assure an absolutely linear response, which results in electron multiplier devices having capabilities beyond the limits of most analytical instruments. Due to their low mass and high gain, electron multipliers are used in many nuclear physics labs and space applications to count electrons and charged particles (e.g., in a pulse mode of operation). Electron multipliers may be used in mass spectrometry applications, residual gas analyzers, plasma analysis applications, Auger electron spectroscopy applications, electron spectrometers, secondary electron multiplier devices, focused ion beam emitters, and leak detectors.
In general, CEMs are made out of single tube and can be referred to as one dimensional devices. In contrast to CEMs, another geometry of continuous-dynode electron multiplier is called the microchannel plate (“MCP”), which is two-dimensional arrays of microscopic channel electron multipliers. MCP photo-multipliers (“MCP-PMT”) are an evolution from the basic principles of photo-multipliers. MCP-PMTs utilize planes of small pores, which form the amplification sections of the complete MCP-PMT devices. Current MCP-based detectors have shown unique properties such as high gain, high spatial resolution, high timing resolution, and very low background rate. These properties make MCP detectors useful in a wide variety of applications including low-level signal detection, photodetection, gas electron multipliers (“GEM”), time-of-flight (“ToF”), mass spectrometry, molecular and atomic collision studies, electron microscopy, field emission displays, night vision goggles and binoculars, and high speed and resolution cameras. At present, small area conventionally made MCPs are extensively used in photo-detection for visible light night vision applications and used in photodetectors for high energy physics and nuclear physics.
Conventional MCPs are fabricated using multi-fiber glass working techniques to draw, assemble, and etch an array of solid core fibers resulting in channels in a thin wafer of lead silicate glass. Although pore diameters as small as six microns have been achieved, these channels are typically ten to forty microns in diameter, have an aspect ratio (a=(L/D)=pore length/pore diameter) of sixty to one hundred, and have an open area ratio (i.e., fraction of surface covered by pores) of fifty to seventy-five percent. Thermochemical processing (e.g., H2 firing) is used to activate the channel walls for electron multiplication, and metal electrodes are evaporated onto both faces to provide electrical contact. More recently, techniques have been developed for creating capillary glass arrays and subsequently coating the arrays with thin, conformal films that provide electrical conductivity and secondary electron emission properties. Exemplary MCPs manufactured using capillary glass arrays are described in U.S. Pat. No. 8,969,823, entitled “MICROCHANNEL PLATE DETECTOR AND METHODS FOR THEIR FABRICATION,” dated Mar. 3, 2015, which is herein incorporated by reference in its entirety and for all purposes.
However, current MCPs are limited in performance and are expensive to manufacture. The etching required for solid core, lead glass MCPs add to the manufacturing costs and limits the electron gain of the given MCP. Moreover, the hydrogen firing dictates both the MCP resistance and the secondary emission, and so these properties cannot be independently varied. Finally the lead glass utilized is brittle and hygroscopic, which causes MCPs to be prone to breakage during handling. The capillary glass method overcomes some of these limitations; however, fabricating the capillary glass arrays is very labor intensive. For example, the capillary glass method requires manual alignment of thousands of hollow glass tubes, which translates to high manufacturing costs.
One embodiment relates to a digital electron amplifier system. The system includes a base substrate having a top surface, an anode structure, and an electron amplification structure (“EAS”). The EAS includes an insulating oxide layer, a bottom electrode, a top electrode, a resistive layer positioned between the top electrode and the bottom electrode, and a plurality of pores traveling through the insulating oxide layer, the bottom electrode, the resistive layer, and the top electrode. The walls of the plurality of pores are coated with a secondary electron emission coating. The anode structure is exposed at a bottom of each of the pores.
Another embodiment relates to a method of fabricating a digital electron amplifier system on chip. The method includes providing a base substrate having a top surface. The method further includes depositing an insulating layer on the top surface of the base substrate. The method includes providing an anode structure on top of the insulating layer and depositing an insulating oxide layer on top of the anode structure. The method includes forming an electron amplification structure (“EAS”) on top of the insulating oxide layer. The EAS has a bottom electrical contact, a top electrical contact, and a resistive layer positioned in between the bottom electrical contact and the top electrical contact. The method includes forming electron amplification pores. Each of the electron amplification pores passing through the top electrical contact, the resistive layer, the bottom electrical contact, and the insulating oxide layer thereby exposing the anode structure at a bottom of each of the electron amplification pores.
These and other advantages and features of the invention, together with the organization and manner of operation thereof, will become apparent from the following detailed description when taken in conjunction with the accompanying drawings.
Referring to the figures generally, scalable MCPs and methods of producing the scalable MCPs through an atomic layer deposition (“ALD”) fabrication process are described. The ALD fabrication process allows for large area MCPs (e.g., approximately eight inches by eight inches) to be produced significantly less expensive than prior MCP fabrication processes. The ALD fabrication process allows for nanostructured functional coatings, to impart a desired electrical conductivity and electron emissivity onto low cost borosilicate glass micro-capillary arrays (“MCA”) to form the scalable MCPs. The ALD functionalized MCPs have a combination of unique properties, such as high gain (e.g.,>107), high spatial resolution (e.g., one millimeter), high timing resolution (e.g.,<10 ps), very low background rates (e.g.,<0.06 events cm−2 sec−1) and long lifetimes (e.g.,>7 C/cm2). The unique properties of the MCPs formed via the ALD fabrication process make ALD functionalized large area MCPs useful in a wide variety of applications (e.g., low-level signal detection, photodetection, GEMs, ToF analyzers, mass spectrometry, molecular and atomic collision studies, electron microscopy, field emission displays, night vision goggles and binoculars, high speed and resolution cameras, etc.). By applying a conformal neutron sensitive layer to the MCP, the MCP can be used for neutron detection, which has applications in the detection of nuclear sensitive materials.
Referring to
Referring to
The applied bias voltage is generated from a power source 122. The power source 122 applies a high voltage (“HV”) across the electrodes 116. The selection of a particular HV is based at least in part on the desired and at least in part on the MCP geometry and electrical properties. The HV directly provides the electric field according to E =V/d (e.g., in an MCP with a 1.2 mm thickness and a HV of 1.2 kV, E will be 1 MV/m). As discussed above, in some arrangements the HV is in the range of 1.2 kilovolts. In such arrangements, the gain of the MCP 100 may be in the range of 103-105. The generation of secondary electrons is also based on the incident electron energy, angle of incidence and the secondary electron yield (“SEY”) of the emission surface (i.e., the surface coated with the emissive coating 114). The SEY (δ) is defined as the ratio of secondary electrons emitted to primary electron incidents on the surface. For practical reasons, MCPs are typically manufactured with intrinsic resistances in the range of 1MΩ-1G Ω, allowing the bias current to recharge electron depleted pores (i.e., post-avalanche) without drawing too much current (i.e., to prevent over-heating, thermal runaway, and the need for large high voltage power supplies).
Referring to
The EAS 202 is coupled to a second insulating oxide layer 216 having embedded anode lines 218 running through the second insulating oxide layer 216. In some arrangements, the anode lines 218 that form an anode structure are arranged in a serpentine manner. In alternative arrangements, the anode lines 218 are arranged in another shape or structure depending on the application. The anode lines 218 are metal. The anode structure is exposed at a bottom of each of the pores or groups of pores 212. The anode lines 218 are used to provide a current output that is indicative to an amount of electrons detected by the digital electron amplifier 200. The anode lines 218 include contacts 220 (Xl, X2, Yl, and Y2) that allow the coupling of an electronic device to the digital electron amplifier 200. The second insulating oxide layer 216 is coupled to a base substrate 222. In some arrangements, the base substrate is a metallic substrate. The fabrication process for the digital electron amplifier 200 is described in further detail below with respect to method 300.
Referring to
Method 300 begins with the provision of a cleaned base substrate at 302. As shown in
An insulating layer is deposited on the base substrate 402 at 304. The insulating layer isolates the EAS structure bottom electrode and the anode structure thereby preventing an electrical short between the two layers. As shown in
An anode structure is created on the insulating layer at 306. As shown in
An insulating oxide layer is deposited at 308. As shown in
A bottom electrical contact of the EAS is formed at 310. As described above with respect to
A resistive layer is deposited on top of the bottom electrical contact at 312. As shown in
Still referring to
Any of the above described layers formed in steps 304 through 314 may be formed by chemical vapor deposition (“CVD”), atomic layer deposition (“ALD”), physical vapor deposition (“PVD”), chemical printing technology (including three-dimensional printing), solution growth type thin film deposition, and the like.
EAS pores are formed at 316. As shown in
Some digital electron amplifier SoC wafers have multiple EAS sections. For example, as shown in
Generally, the stacking of multiple two-dimensional EAS structures will provide multiple two dimensional dynodes in series. The thickness and pores size and secondary electron emission coefficient of subsequent EAS structure will define the next electrons amplification. In such arrangements, it is possible to precisely control individual dynodes structure properties and first strike. Further, a two-dimensional EAS dynode in series stack will also permit the energetic particle trajectory mapping in a very unique manner. For example, in a multiple EAS structure arrangement, the top most EAS structure may have a single emission (i.e., bounce) of electrons because of the selected aspect ratio. The subsequent underneath EAS structure may permit single or multiple bounces of electrons. As another example, in a multiple stack arrangement of EAS structures, each EAS structure may have only one precisely controlled electron emissions (i.e., bounce). In this example, this type of structure is similar to dynode structures where electrons bounce at various stages are controlled by individual dynode structures.
An SEE layer is deposited on the surfaces of the pores at 318. As shown in
The SEE layer is removed from a bottom portion of the pores at 320. As shown in
In arrangements where there digital electron amplifier SoC wafer has multiple EAS sections, each EAS section can have a different resistive coating material composition, which permits independent control over each EAS structure and the amplification rate. Whereas, if the same resistive coating is applied to each of the multiple EAS sections, then it is possible to simply use only two contact pads for electrical connections.
The digital electron amplifiers having the structure described above with respect to
It should be noted that the term “exemplary” as used herein to describe various embodiments is intended to indicate that such embodiments are possible examples, representations, and/or illustrations of possible embodiments (and such term is not intended to connote that such embodiments are necessarily extraordinary or superlative examples).
The terms “connected” and the like as used herein mean the joining of two members directly or indirectly to one another. Such joining may be stationary (e.g., permanent) or moveable (e.g., removable or releasable). Such joining may be achieved with the two members or the two members and any additional intermediate members being integrally formed as a single unitary body with one another or with the two members or the two members and any additional intermediate members being attached to one another.
References herein to the positions of elements (e.g., “above,” “below,” etc.) are merely used to describe the orientation of various elements in the figures. It should be noted that the orientation of various elements may differ according to other exemplary embodiments, and that such variations are intended to be encompassed by the present disclosure.
The construction and arrangement of the systems and methods as shown in the exemplary embodiments are illustrative only. Although only a few embodiments of the present disclosure have been described in detail, those skilled in the art who review this disclosure will readily appreciate that many modifications are possible (e.g., variations in sizes, dimensions, structures, shapes and proportions of the various elements, values of parameters, mounting arrangements, use of materials, colors, orientations, etc.) without materially departing from the novel teachings and advantages of the subject matter recited. For example, elements shown as integrally formed may be constructed of multiple parts or elements. The elements and/or assemblies of the enclosure may be constructed from any of a wide variety of materials that provide sufficient strength or durability, and in any of a wide variety of colors, textures, and combinations. Additionally, in the subject description, the word “exemplary” is used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, use of the word “exemplary” is intended to present concepts in a concrete manner. Accordingly, all such modifications are intended to be included within the scope of the present inventions. The order or sequence of any process or method steps may be varied or re-sequenced according to alternative embodiments. Any means-plus-function clause is intended to cover the structures described herein as performing the recited function and not only structural equivalents but also equivalent structures. Other substitutions, modifications, changes, and omissions may be made in the design, operating conditions, and arrangement of the preferred and other exemplary embodiments without departing from scope of the present disclosure or from the spirit of the appended claims.
It should be noted that although the diagrams herein may show a specific order and composition of method steps, it is understood that the order of these steps may differ from what is depicted. For example, two or more steps may be performed concurrently or with partial concurrence. Also, some method steps that are performed as discrete steps may be combined, steps being performed as a combined step may be separated into discrete steps, the sequence of certain processes may be reversed or otherwise varied, and the nature or number of discrete processes may be altered or varied. The order or sequence of any element or apparatus may be varied or substituted according to alternative embodiments. Accordingly, all such modifications are intended to be included within the scope of the present disclosure as defined in the appended claims. Such variations will depend on the software and hardware systems chosen and on designer choice. It is understood that all such variations are within the scope of the disclosure. Likewise, software and web implementations of the present disclosure could be accomplished with standard programming techniques with rule based logic and other logic to accomplish the various database searching steps, correlation steps, comparison steps and decision steps.
The foregoing description of embodiments has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure to the precise form disclosed, and modifications and variations are possible in light of the above teachings or may be acquired from this disclosure. The embodiments were chosen and described in order to explain the principals of the disclosure and its practical application to enable one skilled in the art to utilize the various embodiments and with various modifications as are suited to the particular use contemplated. Other substitutions, modifications, changes and omissions may be made in the design, operating conditions and arrangement of the embodiments without departing from the scope of the present disclosure as expressed in the appended claims.
The U.S. Government has rights in this invention pursuant to Contract No. DE-AC-02-06CH11357 between the U.S. Government and the UChicago Argonne, LLC representing Argonne National Laboratory.
