The present invention relates to a digital filter, to a method for determining filter coefficients, and to a design method for constructing digital filters.
In digital signal processing, signals must be frequently processed which have different clock frequencies on the signal processing path. For example, in DSL technologies, signals must be subjected to a sampling rate conversion in order to be forwarded from a clock domain which is operated at a baseband frequency to a further clock domain at a higher sampling frequency. Sampling rate conversions are effected by means of interpolation or decimation filters. An interpolation filter generates from a data stream with a lower sampling rate a data stream having a higher sampling rate, wherein intermediate values are determined from the input signal and are output as output bit stream with a high sampling rate. In this process, the signal is filtered in accordance with a filter function of the interpolation filter. Decimation filters generate from a signal with a high sampling rate an output signal with a lower sampling rate by filtering with a filter function. The ratio of the sampling rate of the input signal to the output signal is called the sampling rate conversion factor.
Achieving a predetermined filter function for a corresponding interpolation or decimation filter requires as a rule many filter stages which, connected in cascade, perform a number of sampling rate conversions and filterings. This sampling rate conversion, which is normal according to the prior art, is required since the various filters of the filter stages are only efficient in certain frequency bands. In the case of up-sampling, for example, that is to say an interpolation of the input signal from a baseband processor to a processor having a higher sampling rate, an FIR filter, a wave digital filter and, for example, a comb filter are provided on the signal path. These filters have, for example, chains of delay elements with feedback as integrator stages.
When such integrator stages are connected in cascade in interpolation or in decimation filters, the bit width is in each case increased due to the integration process which necessitates disadvantageously wider memories for the delay elements. For the simple case of a second-order comb filter function, therefore, a decimation filter in which a necessary signal bit width is limited by resetting registers used as delay elements was proposed in “Voiceband Codec with Digital Filtering”, Candy et al., in IEEE Transactions on Communications Vol. com. -29, No. 6, June 1981. In order to achieve the filter characteristic required in the document, however further fourth-order low-pass filters and second-order high-pass filters are required on a signal path from a high to a low sampling rate.
In order to be able to use signal processing processors today in a flexible manner however, flexible adaptation of the filter characteristic with a predetermined filter function or impulse response function is required, on the one hand, and the computing and storage complexity should be as low as possible. A disadvantage of integrator stages of delay elements with feedback also consists in that quantization errors occurring always propagate due to the integration and cannot be corrected.
In one aspect of the invention, a digital filter for converting a digital input signal into a digital output signal having in each case a different sampling rate is provided, the filter comprising:
a) a digital filter for converting a digital input signal into a digital output signal having in each case a different sampling rate, with a number of filter units which implement in each case mutually independent filter functions with a predetermined recursive filter order on a signal path between an input and an output of the digital filter, wherein each filter unit has at least one delay element which can be reset to a predeterminable value,
b) wherein to each filter unit, a sampling device is allocated which sets at least one resettable delay element to a predetermined value in dependence on a sampling rate conversion factor N,
c) with a weighting network, coupled to the sampling devices, with weighting coefficients, wherein the digital input signal is conducted via the weighting network to a respective sampling device or wherein digital internal sampling signals output by a respective sampling device are conducted to the output of the digital filter via the weighting network, and
d) wherein the filter units and the sampling devices are operated at a first clock rate and the weighting network is operated at a second clock rate.
One aspect forming the basis of the invention consists in assembling a desired filter function of the digital filter from mutually independent filter functions of the filter units. Resetting these filter units prevents, on the one hand, quantization errors from propagating over a large number of clock periods and, on the other hand, a bit width of the signal produced during the processing from increasing considerably. The inventive digital filter is constructed in such a manner that both an interpolation with an interpolation factor can be effected if the input signal is supplied to the sampling devices via the weighting network, and a decimation filter with a decimation factor N can be formed wherein the input signal is first conducted through the filter units and then is coupled via the sampling devices into the weighting network which then determines the decimated output signal.
In the inventive digital filter, the weighting network is operated at the higher sampling rate or clock frequency and the filter units which, as a rule, have storage or delay devices, are operated at the lower sampling or clock rate. The inventive digital filter especially has the advantage that arbitrary target impulse response functions can be achieved by selecting the weighting coefficients. To achieve a predetermined interpolation or decimation factor, it is therefore no longer necessary to have a number of filters and converters but only one inventive digital filter with a clock domain of the first clock rate and a clock domain of the second clock rate. In the case of a parallel arrangement of the inventive filter, the respective signals generated by the weighting network can also be determined or calculated simultaneously and then provided for the respective interpolation or decimation taps.
The filter units may preferably have filter functions which are mutually orthogonal. For example, a respective filter unit can implement a Chebyschev, Butterworth or Bessel filter function of the respective predetermined order.
In a particularly preferred manner, at least one filter unit may be constructed as integrate-and-dump filter. In principle, the inventive filter can be arranged with all possible filter units which have impulse response functions which allow a predetermined target impulse response function to be approximated by a linear combination. Integrate-and-dump filters have the advantage that a corresponding filter unit is in each case reset to a predetermined value which can be, for example, zero, or to a value which is conducted to the sampling device by the weighting network.
In a preferred embodiment, a filter unit constructed as integrate-and-dump filter may comprise a filter function or an impulse response function according to
where K is the recursive order of the filter unit and N is the respective sampling rate conversion factor.
In a further embodiment, a respective filter unit may have a number of resettable delay elements corresponding to the predetermined recursive order, which are interconnected with feedback to form an integrator device. In this arrangement, a respective associated sampling device generates a reset signal for the delay elements. In the arrangement as decimation filter, this reset signal can be a reset or a set-to-zero signal, or in the case of interpolation filters it can be a precharge signal, the value of which is predetermined by the weighting network. The output signal of the digital filter is then formed as the sum of the output signals of the filter unit connected as integrator device.
In a further embodiment, a respective filter unit may have exactly one delay element with feedback. In this case, the integrated delay elements with feedback with their associated sampling devices can be considered in each case as integrate-and-dump filter.
The filter units may be combined to form an integrator stage. A number of resettable delay elements with individual feedback are provided therein, corresponding to a maximum predetermined recursive order of the filter according to the invention. A respective associated sampling device is coupled to an input of a respective delay element with feedback and is set to a precharge value or reset to zero by the sampling device.
The output of each resettable delay element with feedback of the integrator stage may be followed by a shifting device. This shifting device shifts a respective digital signal by a predetermined number of bits. The result is that the bit width increased by the respective integration by a delay element with feedback is initially reduced. The dynamic range of the respective integrate-and-dump filter chain in the integrator stage is thus reduced. The shifting devices also reduce the requirements for the accuracy or quantization of the weighting coefficients. This reduces the number of bits needed for representing the weighting coefficients.
The inventive digital filter may be in the form of an interpolation filter, wherein the weighting network has a delay element chain, coupled to the input of the filter, of series-connected delay elements, wherein delayed internal signals can be picked up at nodes of the delay element chain, and wherein the weighting network generates precharge signals for the sampling devices in such a manner that a respective precharge signal corresponds to the sum of the delayed internal signals weighted with weighting coefficients.
Accordingly, the weighting network accepts input signals delayed by a delay factor in each case and forms from these in each case linear combinations which are represented by the respective precharge signals.
The resettable delay elements may then preferably be reset to a value corresponding to the precharge signal with each Nth clock pulse by the associated sampling device.
The digital filter may be in the form of a decimation filter, wherein the weighting network has a delay element chain, coupled to the output of the filter, of series-connected delay elements, wherein nodes are provided between the delay elements of the delay element chain, and wherein the weighting network generates segment signals for the nodes of the delay element chain in such a manner that a respective segment signal corresponds to a sum of the internal sampling signals weighted with weighting coefficients.
The structure of the weighting network essentially corresponds to the embodiment used in the interpolation, wherein, in particular, the weighting coefficients may be the same in principle. The segment signals correspond to linear combinations of the signals provided by the filter units and gated by the respective sampling device.
In this embodiment, the resettable delay elements are in each case preferably reset to zero by the associated sampling device with an Nth clock pulse.
The delay element chain may preferably have a number of delay elements which corresponds to a maximum predetermined recursive filter order. Thus, a quadratic matrix of weighting coefficients is needed for the weighting network. In principle, however, an embodiment with fewer delay elements is also possible as a result of which the weighting coefficient matrix is smaller.
To each working coefficient which is not equal to zero, a multiplier and an adder may preferably be allocated. The respective multiplier weights a corresponding signal in the weighting network with the weighting coefficient and the respective adder is used for achieving a respective sum in the above-mentioned linear combination.
In a further embodiment of the inventive filter, the output of each filter unit is followed by a shifting device which in each case shifts a digital signal by a predetermined number of bits. This shifting is used for limiting or reducing the bit width of the weighting coefficients and reducing the dynamic range of the filter units, i.e. limiting the respective necessary bit widths of the output signals of the filter units.
The number N of sampling devices may preferably correspond to a predetermined approximation filter order by means of which the digital filter achieves a target filter function.
The inventive digital filter may approximate a target filter function with a length of L interpolation points, wherein the number S of the series-connected delay elements of the delay element chain is
where S is given by rounding up L/N, that is to say the next higher integral number to L/N.
In this manner, a predetermined target filter function is approximated segment by segment, wherein each segment is defined by a set of weighting coefficients. This results in filter orders S (N−1).
The inventive filter may have a symmetric FIR filter function, wherein further filter units coupled to the weighting network via further sampling devices are provided. With a symmetric impulse response function, the symmetry can be preferably utilized as a result of which the number of necessary weighting coefficients can be halved compared with an arbitrary filter function. As a result, the implementation expenditure also becomes considerably lower.
The weighting network may then preferably generate further precharge signals for the further sampling devices in such a manner that a respective further precharge signal corresponds to a sum of the delayed internal signals weighted with weighting coefficients, wherein a respective weighted delayed internal signal is delayed in dependence on the delay of the internal delayed signal before the summation. In this symmetric embodiment of an interpolation filter according to the invention, a segment of the predetermined symmetric target filter function which has already been approximated is achieved mirrored due to the delay of the internal signals.
In an alternative embodiment of the interpolation filter, a further delay element chain with series-interconnected delay elements may be allocated to each further sampling device wherein a respective further precharge signal can be picked up at the delay element chain. In this arrangement, an internal delay signal weighted with a respective weighting coefficient is supplied to the input of each delay element of the respective further delay element chain. This alternative generation of the further precharge signals also leads to a reuse of weighting coefficients already determined, in order to generate a symmetric segment of the target impulse response function.
The further sampling devices may preferably be coupled to a further integrator stage, the output of which is followed by a time reverser. Furthermore, an adder is preferably provided which adds the output signals in the integrator stage and outputs them as the output signal of the filter. The output signal of a symmetric interpolation filter according to the invention is, therefore, composed additively of the two signals of the integrator stage and the further integrator stage.
In an embodiment of the inventive filter, the filter constructed as decimation filter, the weighting network may generate such segment signals that a respective segment signal corresponds to a sum of the sums of the internal sampling signals, weighted with weighting coefficients, with further delayed internal sampling signals. Before the summation, a respective further internal sampling signal generated by a further sampling device is delayed in dependence on the respective node of the delay element chain.
In an alternative embodiment of the version as decimation filter, a further delay element chain with series-interconnected delay elements, which are supplied with a respective further sampling signal, may be allocated to each further sampling device. At outputs of the further delay elements, delayed internal sampling signals can be picked up and the segment signals are generated in such a manner that a respective segment signal corresponds to a sum of the sum, weighted with the weighting coefficients, of the respective internal sampling signals with the respective delayed internal sampling signals. In an embodiment as decimation filter, too, the properties of symmetry of the target impulse response function can be used for halving the number of necessary weighting coefficients.
As an alternative, in the embodiment arranged as decimation filter, a further delay element chain with series-interconnected delay elements can be allocated to each further sampling device. Each further delay element chain is then supplied with a respective further sampling signal, wherein delayed internal sampling signals can be picked up at outputs of the further delay elements. The segment signals are generated in such a manner that a respective segment signal corresponds to a sum of the sums, weighted with the weighting coefficients, of the respective internal sampling signals with the respective delayed internal sampling signals.
The further sampling devices may then preferably be coupled to a further integrator stage, the input of which is preceded by a time reverser which receives the digital input signal of the filter. The time reverser and the additional delayed further sampling signals are used for assembling mutually symmetric segments of a target impulse response function in such a manner that an approximated predetermined target impulse response function is approximated by the decimation filter according to the invention.
The delay elements of the further delay element chain may be in each case preferably set up in such a manner that a delay by z−2 corresponding to the second clock rate is generated.
The filter preferably may have a symmetric FIR filter function and the number S of series-connected delay elements of the delay element chain is
where S is the value of an integral number rounded up to the next higher one with respect to L/2N.
The invention also provides a polyphase filter arrangement with a number P of filter branches with in each case one inventive digital filter, with a switching device which couples a digital polyphase filter input signal into the filter branches in each case time delayed as branch signal, and with a summing device which combines the output signals of the filters to form a polyphase filter input signal. Such a polyphase filter arrangement has the advantage that the individual digital filters can be operated at a reduced clock rate. This is preferably reduced by the factor P.
In one embodiment of the inventive polyphase filter arrangement, a weighting network which is common to the digital filters of the filter branches is provided which is operated at the second clock rate. This has the advantage that a considerable implementation expenditure is saved since the weighting network needs to be provided only once. In addition, the digital filters according to the invention for the filter branches have the advantage that they need the same weighting coefficients for the common weighting network.
Preferably, common sampling devices may then also be provided for the digital filters of the filter branches. The sampling devices are then preferably coupled via switches to the respective filter units or to the delay elements with feedback of the respective integrator devices. The common weighting network is accordingly coupled to the filter units of a filter branch, allocated to the respective filter branches, or to the respective integrator devices of the filter branches, via the sampling devices.
The inventive polyphase filter arrangement may be constructed as interpolation filter, wherein a group of P series-interconnected delay elements is allocated to each filter branch, a branch signal can be picked up in each case at nodes between the delay elements of a group, and wherein the groups are series-connected to one another at an input of the polyphase filter arrangement.
The inventive polyphase filter may be in the form of a decimation filter, wherein a group of P series-interconnected delay elements is allocated to each filter branch, the segment signals are supplied to a respective group clock pulse by clock pulse via adders provided between the delay elements, and wherein the groups are series-connected to one another at an output of the polyphase filter arrangement.
The P series-interconnected delay elements allocated to each filter branch provide for the corresponding signal phase for the respective filter branch.
The invention also provides a method for determining filter coefficients of a digital filter which achieves a predetermined target impulse response function, comprising the steps of:
a) subdividing the target impulse response function into segments, wherein each segment s has a predetermined number of interpolation points, and wherein a set of weighting coefficients is allocated to each segment s,
b) determining independent setup impulse response functions which in each case have a recursive filter order k and depend on a sampling rate conversion factor N,
c) forming a linear combination of the setup impulse response functions for each segment s, wherein the coefficients of the linear combination correspond to the weighting coefficients of the respective segment s and wherein the weighting coefficients Cs,k are selected in such a manner that the linear combination approximates the target impulse response function in the respective segment.
Possible setup impulse response functions to be considered are, for example, Chebyschev polynomials, Butterworth or Bessel filter functions. The weighting coefficients are preferably determined by means of a balancing calculation, particularly by interpolations. A method of the least square deviations can preferably also be used for this purpose.
The setup impulse response functions in each case may correspond to an integrate-and-dump filter having a recursive order k and a reset period of N. Advantageous independent setup impulse response functions are, for example,
where K corresponds to a predetermined maximum recursive filter order.
The target impulse response function preferably has a length L and the number S of segments is
The number of interpolation points or the length of the respective segment, respectively, may correspond to the sampling rate conversion factor N. If necessary, other interpolation points of the target impulse response function, which are set to zero, can also be added in order to provide exactly N interpolation points or taps for each segment.
The number of segments may be equal to a predetermined maximum recursive filter order K.
The weighting coefficients may be determined from a system of equations
where h represents an interpolation point vector, c represents a weighting coefficient vector and W represents a setup impulse response matrix. The following applies: Wn,k=(K−1n+k−1).
This system of equations represented in matrix form can then be solved in approximation by means of known methods, for example by means of least square errors.
The target impulse response function may be selected to be symmetric and the weighting coefficients are determined in such a manner that one pair of weighting coefficients in each case has the same value. A symmetric target impulse response function enables the number of various weighting coefficients to be halved compared with an arbitrary asymmetric target impulse response function.
In a matrix-shaped arrangement of the weighting coefficients, a matrix is thus obtained which has an even number of columns, wherein the entries are symmetric with respect to a perpendicular centre axis. In a particularly preferred manner, the method determines the weighting coefficients for a digital filter according to the invention, wherein the filter units have filter functions proportional to the setup impulse response functions and wherein a respective delayed internal signal or a respective segment signal is allocated to a segment S.
In addition, the invention provides a method for designing a digital filter according to the invention, comprising the steps of:
a) determining a target impulse response function, a maximum recursive filter order K, the sampling rate conversion factor N and a number of segments S;
b) determining the weighting coefficients in accordance with the method according to the invention detailed above;
c) forming a digital filter with the weighting network, wherein a multiplier and an adder is provided for each weighting coefficient which is not equal to zero, and wherein filter units implementing the setup impulse response functions are in each case provided.
The maximum recursive filter order may preferably be selected in such a manner that the maximum deviation of the implemented filter impulse response function from the target impulse response function is below a predetermined tolerance threshold.
An advantageous embodiment of the design method furthermore may provide for step b) for at least one segment:
a) determining a trial set of weighting coefficients in which at least one of the K weighting coefficients is set to zero,
b) determining the weighting coefficients of the set of trial weighting coefficients which are not to zero in such a manner that the linear combination approximates the target impulse response function (HIAF(Z)) in the respective segment,
c) determining a respective maximum deviation of the filter impulse response function implemented by means of the trial set of weighting coefficients, from the target impulse response function in the segment s.
This embodiment provides the advantage that trial sets of weighting coefficients are determined in which some weighting coefficients are zero. It is possible, therefore, to omit the adder and multiplier in constructing the digital filter which means a lower implementation expenditure.
Trial sets of weighting coefficients may preferably be determined and the respective maximum deviation is determined for all combinations of weighting coefficients set to zero. For each segment s with, for example, k associated weighting coefficients, k! sets of trial weighting coefficients must therefore be evaluated.
For implementing the weighting network, those trial sets of weighting coefficients may preferably be selected which have the highest number of weighting coefficients set to zero, the maximum deviations being below a predetermined tolerance threshold.
Although, as a result, extensive calculations for evaluating the sets of trial weighting coefficients are initially performed during the design, the method provides, for the respective implementation, very advantageous sets of weighting coefficients which have as many weighting coefficients as possible which are zero. The slightly increased expenditure in computing power for the design method is thus balanced by a digital filter with particularly advantageous expenditure.
The inventive filter may preferably be hard wired or implemented on a computer, for example by means of a programmable digital signal processor. The method according to the invention for determining the filter coefficients is preferably implemented as computer program and stored on a storage medium, for example a diskette. This computer program product then causes a programmable computer to carry out the determining process.
In the text which follows, the invention is explained in greater detail by means of illustrative embodiments, referring to the attached figures, in which:
In the figures, identical or functionally identical elements have been provided with the same reference numbers unless otherwise specified.
The digital filter 1 has an input 2 for receiving a digital input signal FIN and an output 3 for outputting a filtered digital output signal FOUT. The input 2 is coupled to a weighting network 4 which has a matrix of adders 5ij and multipliers 6ij, the multipliers in each case being supplied with weighting coefficients Cij where i=0 to S−1 and j=0 to K−1. K corresponds to the filter order of the interpolation filter 1 and S designates the number of segments into which a target impulse response function of the filter which was previously selected was split up. Splitting into segments and implementation by means of the filter 1 according to the invention will be explained in greater detail in the text which follows.
The weighting network 4 also provides a chain of delay elements 7i, with i=1 to S−1, which is coupled to the input 2. The weighting network 4 delivers precharge signals Pj, with j=0 to K−1, to sampling or gating devices 8j, where the gating devices 8j generate sampling signals Fj which are conducted to filter units 9j. Each filter unit 9j delivers an output signal Fj which is added to the output signal FOUT via the adder 10j.
The filter units 9j in each case have a filter function of a predetermined recursive filter order, wherein the filter unit 90 is of the first order, the filter unit 91 is of the second order etc., up to filter unit 9K−1 which has a filter function of Kth order.
The weighting network 4 is here operated at a first low clock rate and the filter units 9j are operated at a second higher clock rate. From the input signal FIN, internally delayed signals Qi, with i=0 to S−1, are generated by the series-interconnected delay elements 7i and are applied to nodes 11i. The zeroed internal delayed signal Q0 corresponds to the input signal FIN and the last internal delayed signal QS−1 can be picked up at the output of the last delay element 7S−1.
The weighting network 4 is arranged in such a manner that the precharge signals Pj correspond to linear combinations of the delayed internal signals Qi, wherein the coefficients of a respective linear combination of the weighting coefficients Ci,j correspond to a column of the weighting coefficients shown in matrix form in
where the designation DI stands for “dump integrator”, which, in the text which follows, will be used as synonym for integrate-and-dump filter.
In general, the filter function of a k-th order integrate-and-dump filter, i.e. with k series-interconnected integration stages as shown in
For a third-order integrate-and-dump filter with a sampling rate conversion factor of N=8, an impulse response function is obtained thus:
HDIK−3,N−8(z)=1+3z1+6z2+10z−2+15z−4+21z−5+28z−6+36z7. (Eq. 3)
In
Equation 4 applies as long as there is no resetting by the reset signals RES. The reset signals set the contents of the delay elements or storage elements to zero independently of the value of the sampling signals Sj. The gaters only deliver values unequal to zero, namely corresponding to the precharge signal Pj, on the signal path when the delay elements are reset. For this reason, the delay elements can also be advantageously set with the value of the respective precharge signal at any reset time.
Furthermore, Equation 4 shows that the individual chains of the series-interconnected delay elements 12j can be combined to form an integrator stage which replaces the K filter units. A corresponding embodiment of the interpolation filter according to the invention based on integrate-and-dump filters is shown in
The weighting network 4 corresponds to the illustrative embodiment shown in
Each delay device 14j with feedback in the integrator stage 15 delivers a contribution to the recursive order of the filter, wherein each delay element 14j can be allocated to a filter order between input 2 of the filter and output 3 of the filter. For example, the delay element 140 in each case delivers contributions of the first recursive order for the output signal FOUT.
As an alternative, the delay elements 14j available in the integrator stage 15 can be arranged serially as a chain of delay elements with feedback.
According to the invention, analogously to
As explained with respect to
The weighting network 19 delivers segment signals Ri, with i=0 to S−1, wherein a respective segment signal represents a linear combination of the sampling signals Sj. The respective coefficients of the linear combinations correspond to the weighting coefficients Cij. A chain of delay elements 20i, with i=1 to S−1, is connected to the output 3 of the filter. The segment signals Ri, with i=1 to S−2, are coupled into the delay elements 20i via adders 21i, with i=1 to S−2, which are provided between the delay elements 20i. In this arrangement, the zeroth segment signal R0 is coupled directly via an adder 210 to the output 3 of the decimation filter and the sth segment signal Rs−1 is directly coupled to an input of the last, sth delay element 20s−1. Similar to the embodiments as interpolation filter according to FIGS. 1 to 6, therefore, an output signal FOUT with a low sampling rate is assembled from segments.
A preferred illustrative embodiment of a decimation filter according to the invention is illstrated in
The respective filter transfer function or impulse response function of the filter for sampling rate conversion is mainly determined by the determination of the weighting coefficients Cij. The respective weighting coefficients for implementing a target impulse response function are the same for the interpolation filter or the decimation filter. The variants for the filter units or integrator devices shown in FIGS. 1 to 8 in principle in each case necessitate different matrices of weighting coefficients. However, this matrix is in each case determined in accordance with the same process. In principle, a selected target impulse response function is built up segment by segment by a linear combination of the delayed impulse response functions of the filter units. This will be explained in greater detail in the text which follows. As an example, functions according to Eq. 2 are assumed in the text which follows for the filter functions of the filter units or, respectively, the taps of the filter chains of the integrator stage.
The impulse response function Hn,kGIAD(z), implemented by a filter according to the invention as shown in FIGS. 1 to 8 and which represents a generalized form of integrate-and-dump filters essentially depends on the choice of weighting coefficients Ci,j. The impulse response function can be represented as follows:
where vector H contains the z transformations of the filter units or, in this case, of the integrate-and-dump filters, C corresponds to the matrix of weighting coefficients Cij and vector D represents the chain of delay elements 7i, with i=0 to s−1, of the weighting network 4. The sampling rate of the signals refers to the high clock frequency which is why the delays D are given to the power of the interpolation factor N. Equation 5 describes an impulse response function HN,KGIAD(z) which covers the S segments of length N in each case. GIAD (=generalized integrate and dump) designates the generalized integrate-and-dump filter. Each segment s generates an impulse response of an integrate-and-dump filter of length N, wherein each segment has a delay by N taps or interpolation points, respectively. A respective segment length is therefore dependent on the interpolation or decimation factor or sampling rate conversion factor N. It is now possible to specify an arbitrary target impulse response function for a conversion factor N and adapt the matrix of coefficients in Equation 5 in such a manner that the resultant impulse response function HN,KGIAD(z) approximates this target impulse response function as well as possible.
With a desired target impulse response function in the form of a comb filter function
for example, the weighting coefficients Cij can be precisely calculated. N is here the sampling rate conversion factor and K is the maximum recursive order of the desired filter. The length of a segment is, therefore, N, where the length of the target impulse response function for a comb filter is L=K·N−K+1=K(N−1)+1. As a rule, for practical applications, K<N−1 applies so that a quadratic matrix of weighting coefficients with S=K can be selected, that is to say S=SCFN,K=N in this case. For each segment s, a system of equations (Eq. 7) is thus obtained
The vector on the left-hand side of Equation 10 designates the values of the target impulse response function, in this case the corresponding comb filter function, at interpolation points S N+i, wherein S numbers the segments and i the interpolation points in the segment. The setup impulse response matrix w does not depend on the respective segment since the impulse response functions of the integrate-and-dump filters are orthogonal to one another. The respective weight w can be determined from the general equation for the impulse response functions of the integrate-and-dump filters (Equation 2):
For each segment, this results in a system of equations according to Equation 7. If, for example, a sampling rate conversion factor N=8 is assumed and the target impulse response function of a third-order comb filter is used, the following values are obtained for the interpolation points:
h=[1, 3, 6, 10, 15, 21, 28, 36, 42, 46, 48, 48, 46, 42, 36, 28, 21, 15, 10, 6, 3, 1, 0, 0]. (Eq. 9)
where the first eight values correspond to the segment for S=0 from which the three weighting coefficients C00, C01, C02 in the example selected here can be determined. From the second eight interpolation points, C10, C11, C12 is determined and from the last eight values of the vector h, the weighting coefficients C20, C21, C22 are determined. The particular choice of the integrate-and-dump filter here enables the respective weighting coefficients to be determined precisely, which, combined in a matrix, have the following values:
In the text which follows, an arbitrary target impulse response function HIAF(Z) is assumed for explaining the method for determining the weighting coefficients. For a given maximum filter order K, the sampling rate conversion factor N and the length of the target impulse response function, that is to say the number of interpolation points to be taken into consideration, the weighting coefficients Cij can be determined in such a manner that an impulse response function implemented by means of the filter according to the invention essentially corresponds to the target impulse response function HIAF(Z). For this purpose, the weighting coefficients are determined segment by segment.
Starting with HIAF(Z), a system of equations as in Equation 7 is obtained:
where h is the interpolation point vector, c is the weighting coefficient vector and w is the impulse response matrix. For the integrate-and-dump filters considered here, the equation is
An error vector e is now introduced which has the same dimension as the interpolation point vector h and specifies the magnitude of a respective deviation of the filter created by w C. Thus:
h=W·c+ee=W·c+h. (Eq. 13)
By minimizing the error vector e, for example by means of a method of least error squares, the target impulse response function HIAF(Z) is approximated by the filter according to the invention in the best possible way. A possible residual error or a deviation of the filter impulse response function implemented from the target impulse response function can be specified by ∥e∥=√{square root over (e7e)}.
As a rule, the higher the number of integration stages in the filter units or the integrator device, respectively, the better the approximation becomes. Predetermining a tolerance threshold for the maximum deviation or specifying a measure for the minimum quality of approximation to the target impulse response function HIAF(Z) makes it possible to determine the filter order necessary in each case.
In the text which follows, a second-order IIR Butterworth filter impulse response with a cut-off frequency ωn=0.25 normalized to 3 dB is selected as an example of an arbitrary target impulse response function. The corresponding impulse response function for such a Butterworth filter is:
This Butterworth filter function cannot be completely approximated by a filter according to the invention since it is not possible to implement infinite impulse response functions. For this reason, the target impulse response is cut off after 16 taps in the example chosen here. With a decimation factor of, for example, N=4, S=4 segments are thus obtained in which the target impulse response function Hbut2iir=Hbut2fir(Z) is in each case approximated by the impulse response functions of the filter units of the respective order.
From this, the following is obtained for the weighting coefficients:
The maximum deviation from the target impulse response function or the quality of the approximation, respectively, can be written in a compact way by also arranging the vectors of the weighting coefficients ci and the interpolation point vectors in a matrix:
c=(c9 c1 . . . cS−1) (Eq. 17)
H=(h9 h1 . . . hS−1)
so that an N×S error matrix E can be represented as
H=W·C+E. (Eq. 18)
A measure of the maximum deviation between the target impulse response function and the impulse response function implemented by the filter can thus be expressed as:
In the example of the Butterworth target impulse function shown here, it has been assumed, for example, that Emax=−35.718 dB. With K=3 and N=4, a virtually conjugate impulse response function is obtained as is shown in
Essentially, the maximum order K represents a limit to the possible accuracy or quality of the approximation by the filter according to the invention.
If the maximum recursive order of the filter according to the invention is increased, some of the weighting coefficients can become particularly small. As a rule, an increase in the order creates in the system of equations for determining the weighting coefficients (Eq. 11) more degrees of freedom than are unambiguously determined by the system of equations.
A numeric comparison of the order of magnitude of the weighting coefficients for K=4 and K=5 of the preceding example of the Butterworth filter approximation shows that with a maximum recursive order of K=5, the weighting coefficients Cs,1 are practically zero, or are so small that they can be set to zero without deterioration in the quality of approximation of the filter.
An over approximation by means of increasing the maximum recursive order of the filter thus results, on the one hand, in a better approximation to the target impulse response function but, on the other hand, not necessarily in a greater number of non-disappearing weighting coefficients. These findings enable an improved method for determining the weighting coefficients of a digital filter according to the invention to be specified.
For this purpose, a fourth-order comb filter function with zero points shifted with respect to a fourth-order standard comb filter is considered as target impulse response function:
As a decimation factor, N=16 is here selected where N1=N−2 and N2=N+2 is selected whereas N1=N2=N for the standard comb filter. To accurately approximate the target filter function, particularly in the first two aliasing bands at frequencies fnorm=0.125 and fnorm=0.25, a highest order with K=6 is selected for a decimation or interpolation filter according to the invention. The predetermined tolerance threshold for a deviation of the impulse response function implemented by the filter according to the invention from the target impulse response function according to Equation 19 is selected to be 90 dB.
The implementation and computing effort for such a filter can be reduced by looking for sets of weighting coefficients in which as many weighting coefficients Ci,j as possible are zero or have such small values that they can be set to zero without significantly increasing the deviation of the filter impulse response functions HGIAD(Z) achieved from the target impulse response function. Each weighting coefficient which can be set to zero, therefore, reduces the computing effort or implementation effort since the respective adders and multipliers can be omitted.
When designing a filter according to the invention, therefore, weighting coefficients in a defining equation as specified, for example, in Equation 11, are firstly systematically set to zero and the optimization or interpolation is performed. In this improved design method for determining the filter coefficients or the weighting coefficients, all combinations of coefficients Ci,j set to zero are determined and the respective maximum deviation of the filter impulse response function achieved in this manner from the target impulse response function is calculated. Following this, the set of weighting coefficients which shows most of the disappearing weighting coefficients with a predetermined tolerance threshold for this deviation or quality of approximation of the filter according to the invention is selected.
Using Equation 11 as the basis, a masking matrix M is inserted for implementing the respective boundary condition that certain coefficients should be zero:
where the matrix elements mk of the masking matrix W are in each case set to zero or to 1:=0.1 with k=0 to K−1. For Equation 21, an optimization with regard to the least error squares is then performed for each possible combination of mk=0.1. The set of weighting coefficients, which is optimal due to this search, for a respective segment s can be represented as follows:
Following the example of a comb filter target impulse response function shown in
The improved design method thus initially generates an underdetermined system of equations for determining the weighting coefficients in the respective segment and then in each case uses trial sets of weighting coefficients in which one or more weighting coefficients are set to zero. To achieve the filter according to the invention, the trial sets of weighting coefficients are then selected in which the most weighting coefficients are set to zero and, at the same time, the maximum deviation Emax is below the predetermined tolerance threshold.
A further reduction in the necessary multiplications or the adders and multipliers to be implemented in the weighting network can be achieved when using symmetric target impulse response functions.
Since, according to the invention, the target impulse response function is implemented segment by segment, the segments must be symmetrically distributed to the interpolation points of the target impulse response functions for utilizing the symmetry. This will be explained in greater detail with the example of the comb filter function with shifted zero points:
To utilize the symmetry of these target impulse response functions in the context of the filter arrangements according to the invention, the segments must be placed symmetrically in such a manner that pairs of segments with mutually symmetric target impulse response functions are in each case present.
The number of segments needed for a target impulse response function with even symmetry prepared in this manner is, therefore:
where rounding to the next higher integral number was performed. A corresponding desired symmetric matrix of weighting coefficients CSYM can be written as:
The resultant impulse response function implemented by the filter according to the invention is thus:
HGIAD=W·Csym=H−E, (Eq. 26)
wherein a symmetric impulse response matrix is desirable:
HSYM GIAD=(hs h1 . . . Hs|hsflip1 . . . H1fliphGflip)=(HliftSUM-GIAD|HrightSYM-GIAD) (Eq. 27)
hsflip=(h0,sfliph1,sflip . . . hsflip)T=(hs 1,s . . . h1,sh0,s)T=flipud(hsflip)s
where flipup designates a mapping flipup (a, b, c)=(c, b, a).
The matrix w describing the structure of the filter according to the invention must be modified, therefore. The first two segments, designated by s=0 and s=1 in
HleftSYM-GIAD=Wleftsym·Cleftsym (Eq. 28)
HrightSYM-GIAD=Wrightsym·Crightsym
The symmetric extension with the index “right” must then have the following form:
HrightSYM-GIAD=flipud(HleftSYM-GIAD) (Eq. 29)
Crightsym=fliplr(Cleftsym)
Wrightsym=flipud(Wleftsym).
In the implementation, Equations 27 to 29 amount to a time reversal for the right segments.
For implementing the respective symmetric right-hand segments of the target impulse response function, the internal delayed signals Qi with i=0 to S/2−1, are multiplied by the weighting coefficients and delayed by a delay time which is allocated to the respective weighting coefficients. The internal signals thus weighted and delayed are then combined to form a linear combination and supplied to a respective gating device 108j.
In the illustrative embodiment of the interpolation filter 700 shown in
The delay elements 106ij in each case have a delay of z−2 in the baseband rate. The further symmetric precharge signals Uj, with j=0 to K−1, thus generated in each case are conducted to the filter units or integrate-and-dump filters 114j, with j=0 to K−1, by the further gating devices 108j.
In this arrangement, the integrate-and-dump filters here designated by 14j or 114j, respectively, correspond, for example, to the series-interconnected delay elements shown in
The output of the second chain of delay elements 114j interconnected as integrate-and-dump filters is followed by a time reverser 701 which outputs a second time-reversed filter signal FR. The signals FL and FR are combined by means of an adder 702 to form the filter output signal FOUT.
By means of the arrangement of additional delay elements 106ij with the respective delay factors z−2 in the baseband, the further gater 108j and filter device 114 and the time reverser 107, the symmetric right-hand segments are correctly converted in the filter.
The interpolation filter 700 according to
As an alternative to the chain of further delay elements 106i,j, the weighted internal signals delivered by the multipliers 6i,j can also be first delayed by means of variously arranged delay elements and then combined via an adder chain. A corresponding illustrative embodiment is shown in
A chain of series-interconnected delay elements 106i,j is coupled to a respective further sampling device 118j. The delay elements 106i,j in each case have a delay of z−2 and deliver delayed sampling signals to the adders 105i,j. The respective segment signals Rj are thus obtained as a linear combination of the sums of the first sampling signals S0, which correspond to the left-hand segments, and the respective delayed further (right-hand) sampling signals S0′ of the further sampling device 118j.
The properties of the digital filter for sampling rate conversion according to the invention are particularly suitable for use in polyphase filters. Due to the structure of the respective digital filter with weighting network, integrate-and-dump filter chain and possibly symmetric configuration, they are particularly suitable for use in polyphase filters.
The interpolation filter has a number P of filter branches 911r, with r=1 to P, which in each case have an interpolation filter 912r according to the invention preceded by a delay device 913r. In this arrangement, the delay device 9131 of the first filter branch 9111 does not have any delay, the second delay device 9132 has a delay of z−1/P, where an rth filter branch in each case has a delay device with a delay of z−1+1r. An adder 924 combines the filtered branch signals. At the input end, a switching device 914 is provided which distributes the input signal FIN to the filter branches 911r. The low-rate data stream of the input signal FIN is thus operated at a P-times lower clock frequency by the digital filter arrangement 912r of a respective filter branch.
It is possible, therefore, for example in an embodiment as interpolation polyphase filter, to use the sampling devices jointly and to operate them with a clock frequency which is not reduced. The sampling signals correspondingly present can then be supplied in each case clock pulse by clock pulse to a respective chain of integrate-and-dump filters which form an integrator device in the sense of
The multiplications for calculating the linear combination of internal signals, now delayed, are in each case carried out with a delay of 1/P of the baseband sampling period. The weighting network 4 is thus operated at the usual clock rate but outputs via the respective gating devices 8j or 108j, respectively, sampling signals to the integrate-and-dump filter chains 932, 933 provided P=5-times. The respective filter units or integrator devices for the filters of the P filter branches must be provided P-times. With the symmetric configuration as shown in
An advantage of the polyphase embodiment of the filter according to the invention consists in that due to the sampling rate conversion factor of the individual branches, which is effectively reduced by P, the interpolation points for determining the filter coefficients or the weighting coefficients, respectively, can be spaced apart further from one another. The respective impulse response functions implemented by the filter branches thus cover a greater range of target impulse response functions in absolute terms. Compared with the simple embodiment without polyphase, the interpolation points are spaced apart by in each case P interpolation points, the sampling rate conversion factor N being the same. This may achieve a better approximation to the target impulse response function.
A particular advantage of the polyphase embodiment lies in the reduction of the effective interpolation or decimation factor for the individual branches, the segment length or the number of interpolation points covered by the segments of the target impulse response function depending on the decimation or interpolation factor N, respectively. In the polyphase filter embodiment, a range of interpolation points of the target impulse response function is covered which is P-times longer. As a result, fewer segments and segment connections need to be taken into consideration overall. This makes it possible to achieve better approximations. In an optimum case, a chain of integrate-and-dump filters with a predetermined maximum recursive order would follow the complete length of the target impulse response function. In particular, this also simplifies the search for weighting coefficients which can be set to zero.
A further possibility for making the filter according to the invention more efficient consists in limiting the dynamic range of the integration chains or the integrator devices, respectively. With each integration stage or each integrate-and-dump filter, respectively, of the integrate-and-dump filter chain, the bit width of the corresponding output signal increases. The greater this bit width, the greater the demands which must also be made on the corresponding weighting coefficients with regard to their quantization or accuracy, respectively. Usually, an output signal FOUT with a bit width of only about 16 bits is needed. For a target impulse response shown in
More advantageously scaled weighting coefficients can be achieved by inserting shifting devices between the integrate-and-dump filter units.
With a shift for a second-order interpolation filter according to the invention, with two segments with a shifting factor of S0=0 and S1=3, the following improved weighting matrix is obtained for the abovementioned example of the target impulse response function shown in
The representation of these weighting factors now only requires two bits in each case.
With an interpolation factor N and a chain of K integrate-and-dump filters and a recursive order of K implemented, the number of guard bits to be additionally provided by the dynamic range of the integration can be expressed as follows:
where the guard bits specify the increase in word width per integrate-and-dump filter unit. For N=32 and K=8, for example, D (N, K)=18 guard bits are obtained which, according to the invention, can be compensated for by eight shifting devices.
The present invention supplies digital filters which are suitable for sampling rate conversion and can implement virtually any impulse response functions. The necessary accuracy for implementing a target impulse response function can be selected at virtually any level by a simple determination of weighting coefficients. In addition, various improvements supply particularly advantageous embodiments, the implementation expenditure of which is low because many weighting coefficients can be set to zero. Using, for example, integrate-and-dump filters results in only a moderate increase in guard bits in comparison with conventional integration filters. A particular advantage of the filters according to the invention consists in that sampling rate conversion is implemented by means of only a single filter stage whereas, according to the prior art, variously arranged filters must be provided in various interpolation or decimation stages in order to achieve a predetermined sampling rate conversion factor.
Number | Date | Country | Kind |
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05022259.5 | Oct 2005 | EP | regional |