This application claims the benefit, under 35 U.S.C. §365 of International Application PCT/EP2007/053003, filed Mar. 29, 2007, which was published in accordance with PCT Article 21(2) on Oct. 11, 2007 in English and which claims the benefit of European patent application No. 06290545.0, filed Apr. 3, 2006.
The invention relates to a display device using the DLP (Digital Light Processing) technology. This invention is in the field of digital cinema and content protection, where camcorder acquisition followed by immediate illegal distribution creates important revenue losses for content owners.
Visual contents, be they still or moving images, are in general creations which benefit from copyright-related exclusivity guarantees. Their reproduction is in general permitted only within a strongly defined framework which allows for remuneration of authors and their beneficiaries.
In order to ensure that these legal rules are correctly adhered to, numerous systems have been develop to prevent illegal copies or sufficiently impair their quality as to render them unusable.
Within this framework, patent application EP 1 237 369 aims to combat the copying of images by picture-taking during their display, for example with a camcorder in a cinema auditorium. With this aim, it is proposed that the brightness of the pixels of a pattern be modulated around the value to be displayed at a frequency which renders the pattern invisible to the human eye but which generates artefacts on the sequence filmed by the camcorder. This pattern is commonly called anti-copy pattern. The shape of the pattern can be determined so as to inscribe messages of the type “ILLEGAL COPY” which will appear in the images displayed by the camcorder.
In order for the pattern to be invisible to the human eye, the modulation consists in alternating images in which the pattern is bright with images in which it is dark, the mean brightness of the pattern over several images corresponding to that to be displayed in the images in the absence of a pattern. During the display of these images, the eye carries out integration and in fact perceives the mean brightness. This technique may be also applied to the colour of the images by alternating images in which the pattern is more coloured with images in which it is less so, the mean colour of the pattern over several images corresponding to that to be displayed in the absence of the pattern.
In practice, each image of the initial sequence received at 24 Hz is decomposed into several images at N*24 Hz in which the brightness and/or the colour of some parts of the images are modulated to create the anti-copy pattern as indicated above.
As this anti-copy method has never been implemented in a DLP (Digital Light Processing) based display device, the goal of the present invention is to propose such a display device.
So, the present invention concerns a display device comprising an array of luminous element for displaying video pictures. It further comprises
The modulation means are used for introducing an anti-copy pattern in the video pictures to be displayed as described hereinabove. So, the modulation means modulates at a modulation rate the colour or brightness of pixels of a pattern around values to be displayed. The modulation rate is advantageously half the third rate. The third rate is selected such that the modulation is imperceptible by the human eye but creates artifacts when the displayed video pictures are captured by a video capturing device such a camcorder.
In a preferred embodiment, the addressing of the array is not synchronized to the video data received in order to disturb the video acquisition with a camcorder. In that case, the third rate is not a multiple of the first rate.
Advantageously, the third rate varies dynamically during the displaying of the video pictures in order to increase the disturbance of the video acquisition.
The third varies for example between 120 Hz and 144 Hz. The change of the third rate is preferably made at sequence cuts.
Exemplary embodiments of the invention are illustrated in the drawings and are explained in more detail in the following description. In the drawings:
The principle of the addressing in a DLP based display device is given hereinafter. Such a DLP based display device is a Digital Micro-mirror Device (DMD). The state of a micro-mirror (which is an elementary cell of a DMD) is basically binary (ON or OFF). The physical principle of the micro-mirror is to reflect or not the light depending on a binary information related to the video. Each cell is a mirror which has two possible positions. In a first position, the cell is ON and the light is reflected in the right direction. In the other position, the cell is OFF and no light is reflected in the right position.
In order to render gray shades, the frame is split into several sub-fields.
In order to render up to 256 levels, each cell of the DMD is addressed sequentially at least 8 times during the frame. The display duration of each sub-field is depending on the bit addressed. It is 128 times longer for the Most Significant Bit (bit 128) than for the Least Significant Bit (bit 1). The Least Significant Bit is corresponding to 1/255 of the frame duration when the Most Significant Bit is corresponding to 128/255. This scheme is generally called Pulse Width Modulation (PWM).
In order to avoid any temporal disturbance in the perception of motion picture, more than 8 sub-fields are used to render 256 levels. To this end, the sub-fields corresponding to the Most Significant Bits are split into several parts and displayed at different time locations within the frame. At the end, depending on the addressing speed of the display device, the 8 or 10 initial binary information can be represented by more than 40 or 50 sub-fields.
In the digital cinema, the addressing period for each picture is conventionally 1/24 second. The addressing time of elementary binary information in a DLP display is around 10 μs which let assume the possibility of addressing a large number of binary information per picture. The goal of addressing a large number of binary information is to avoid if possible temporal artefacts due to the binary scheme. So, the same picture information is addressed several times within 1/24s.
According to the invention, the addressing of the DLP display device is modified in order to introduce an anti-copy processing. Anti-copy processing is carried out by using at least two different sub-pictures in the frame as illustrated by
If 6 different sub-pictures are used for the anti-copy processing, the anti-copy block 501 generates 6 different sub-pictures for each initial picture of the video input. These 6 sub-pictures are outputted by the block 500 at a frequency of 144 Hz as illustrated by the block diagram of
In a preferred embodiment, the read operation of the memory 503 is made at a rate which is not a multiple of 24 Hz, i.e. the DLP addressing rate is equal to k*24 Hz in which k is not an integer, in order to disturb an illegal video acquisition by a camcorder. For example, k is comprised between 5 and 6, i.e. the read rate is comprised between 120 Hz and 144 Hz.
In practice, it is very easy to modify precisely this refresh rate thanks to properties of the DLP. The switching time of an elementary time of an elementary cell of the DMD is around 10 μs. So, it is then possible to define addressing scheme with variable length. If k=6 the addressing time for 1 sub-frame is 6940 μs and 8330 μs for k=5. Any sub-frame duration in between will give 5<k<6.
The use of a variable value k which is not an integer optimizes the anti-camcorder in such a way that the content displayed in the DLP is no more synchronized with the video input. The variation of this k value make impossible a constant synchronization of the camcorder with the refresh frequency.
Judder effects can occur with such k*24 Hz addressing scheme since the number of sub-frames is not the same for all the input frames. This judder effect is clearly not very important since the same frame is already repeated 6 times without strong artifact in the today's DLP display device. The difference is that this number of sub-frames varies from one frame to the other one. This is the same principle as the 3-2 pull down mode for film in NTSC standard but it is strongly less visible than 3-2 pull down since we have 6-5 pull down. Anyway, to suppress any artifacts, it can be possible to make an interpolation of the last sub-frame displayed between the 2 adjacent frames.
To optimize again the anti-camcorder effect, the value is advantageously modified dynamically during the film projection. To avoid any visible artifact between two refresh rate values, the change of the value k is carried out at a cut in the video sequence. The change of the value k can be done progressively or not.
Advantageously, the anti-copy processing is more efficient when the modulation rate is half the frequency of the refresh rate. It is the case in
Number | Date | Country | Kind |
---|---|---|---|
06290545 | Apr 2006 | EP | regional |
Filing Document | Filing Date | Country | Kind | 371c Date |
---|---|---|---|---|
PCT/EP2007/053003 | 3/29/2007 | WO | 00 | 9/25/2008 |
Publishing Document | Publishing Date | Country | Kind |
---|---|---|---|
WO2007/113195 | 10/11/2007 | WO | A |
Number | Name | Date | Kind |
---|---|---|---|
6549240 | Reitmeier | Apr 2003 | B1 |
6674561 | Ohnishi et al. | Jan 2004 | B2 |
6707516 | Johnson et al. | Mar 2004 | B1 |
7043019 | Tehranchi et al. | May 2006 | B2 |
7050076 | Nishi et al. | May 2006 | B2 |
7227581 | Correa et al. | Jun 2007 | B2 |
7304656 | Doyen et al. | Dec 2007 | B2 |
7470032 | Damera-Venkata et al. | Dec 2008 | B2 |
7574004 | Mihota | Aug 2009 | B2 |
20020054031 | Elliott et al. | May 2002 | A1 |
20020168069 | Tehranchi et al. | Nov 2002 | A1 |
20040160406 | Yamazaki et al. | Aug 2004 | A1 |
20050052703 | Pettitt et al. | Mar 2005 | A1 |
20050195205 | Abrams, Jr. | Sep 2005 | A1 |
20060061600 | Beuker et al. | Mar 2006 | A1 |
20070097334 | Damera-Venkata et al. | May 2007 | A1 |
Number | Date | Country |
---|---|---|
1237369 | Sep 2002 | EP |
1301034 | Apr 2003 | EP |
2000259126 | Sep 2000 | JP |
2002314938 | Oct 2002 | JP |
2003110967 | Apr 2003 | JP |
2004015742 | Jan 2004 | JP |
2004525569 | Aug 2004 | JP |
2004266345 | Sep 2004 | JP |
WO 0133846 | May 2001 | WO |
WO 02076107 | Sep 2002 | WO |
WO02076107 | Sep 2002 | WO |
2007004366 | Jan 2007 | WO |
Entry |
---|
Search Report Dated Jul. 23, 2007. |
Number | Date | Country | |
---|---|---|---|
20090058875 A1 | Mar 2009 | US |